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ORCID11th DTIS 2016: Istanbul, Turkey
- 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016, Istanbul, Turkey, April 12-14, 2016. IEEE 2016, ISBN 978-1-5090-0336-5
- Ozgur Sinanoglu:
Do you trust your chip? 1 - Yong Zhao, Hans G. Kerkhoff:
A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing. 1-4 - Yassine Naija, Vincent Beroulle, David Hély
, Mohsen Machhout:
Implementation of a secured digital ultralight 14443-type A RFID tag with an FPGA platform. 1-3 - Apostolos P. Fournaris, Louiza Papachristodoulou, Lejla Batina, Nicolas Sklavos:
Residue Number System as a side channel and fault injection attack countermeasure in elliptic curve cryptography. 1-4 - Salih Bayar, Arda Yurdakul:
An efficient mapping algorithm on 2-D mesh Network-on-Chip with reconfigurable switches. 1-4 - Wisam Aljubouri, Spyros Tragoudas, Themistoklis Haniotakis:
Identification of delay defects on embedded paths using one current sensor. 1-4 - Antonio Varriale, Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto, Pascal Trotta, Tiziana Margaria:
SEcube™: An open-source security platform in a single SoC. 1-6 - Leonel Acunha Guimaraes, Rodrigo Possamai Bastos, Thiago Ferreira de Paiva Leite, Laurent Fesquet:
Simple tri-state logic Trojans able to upset properties of ring oscillators. 1-6 - Stefano Di Mascio, Marco Ottavi, Gianluca Furano, Tomasz Szewczyk, Alessandra Menicucci, Luigi Campajola, Francesco Di Capua:
Qualitative techniques for System-on-Chip test with low-energy protons. 1-6 - Phaninder Alladi, Spyros Tragoudas:
Efficient selection of critical paths for delay defects in the presence of process variations. 1-6 - Mário Lopes Ferreira, Amin Barahimi, João Canas Ferreira:
Dynamically reconfigurable FFT processor for flexible OFDM baseband processing. 1-6 - Kiamal Z. Pekmestzi, Kostas Tsoumanis, Constantinos Efstathiou:
Fused modulo 2n + 1 add-multiply unit for weighted operands. 1-6 - Serif Yesil, Suleyman Tosun, Özcan Özturk:
FPGA implementation of a fault-tolerant application-specific NoC design. 1-6 - Rubén Salvador:
Evolvable Hardware in FPGAs: Embedded tutorial. 1-6 - Andreas Peter Burg:
Approximate computing for unreliable silicon. 1 - M. Dekmous, A. Lakhdari, H. Mouhadjer, N. Mekkakia-Maaza:
Analytical optimization of interdigitated structure for biological medium characterization. 1-4 - Faycal Amrani, Mohamed Trabelsi, Abdelhalim A. Saadi, Rachida Touhami:
Lowpass filter design technique for hybrid and monolithic implementation. 1-4 - Ugur Cini, Olcay Kurt:
MAC unit for reconfigurable systems using multi-operand adders with double carry-save encoding. 1-4 - Hamzeh Ahangari, Ihsen Alouani, Özcan Özturk, Smaïl Niar, Atika Rivenq:
Register file reliability enhancement through adjacent narrow-width exploitation. 1-4 - Firas Abdul Ghani, Ercan Kalali, Ilker Hamzaoglu:
FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis. 1-4 - Abdulkadir Akin, Ilker Hamzaoglu:
A high performance hardware for early terminated C-1BT based motion estimation. 1-4 - Radek Hrbacek, Vojtech Mrazek, Zdenek Vasícek:
Automatic design of approximate circuits by means of multi-objective evolutionary algorithms. 1-6 - Alberto Bosio, Philippe Debaud, Patrick Girard, Stephane Guilhot, Miroslav Valka, Arnaud Virazel:
Auto-adaptive ultra-low power IC. 1-6 - David May, Walter Stechele:
Voltage over-scaling in sequential circuits for approximate computing. 1-6 - Mario Barbareschi, Federico Iannucci, Antonino Mazzeo:
An extendible design exploration tool for supporting approximate computing techniques. 1-6 - Lei Xie, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Said Hamdioui, Koen Bertels:
Boolean logic gate exploration for memristor crossbar. 1-6 - Umer Farooq, Muhammad Khurram Bhatti, M. Hassan Aslam:
A novel heterogeneous FPGA architecture based on memristor-transistor hybrid approach. 1-6 - Richard Ruzicka, Radek Tesar:
Lets move polymorphism downwards: On the multifunctional logic based on ambipolar behaviour of semiconductor devices. 1-5 - Hassen Aziza, Haithem Ayari, Santhosh Onkaraiah, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet:
Multilevel operation in oxide based resistive RAM with SET voltage modulation. 1-5 - Ilker Hamzaoglu:
Low power digital video compression hardware design. 1 - Sawssen Lahiani, Samir Ben Salem, Houda Daoud, Mourad Loulou:
Optimizing CMOS analog Variable Gain Amplifier cell for WiMAX receiver. 1-6 - Hala Ghadhab, Mohamed Hadj Said, Fares Tounsi, Brahim Mezghani, Sandeep Goud Surya, V. Ramgopal Rao:
Thikness dependence investigation of the mutual inductance link in concentric planar transformers. 1-5 - Luca Marchetti, Amar Romi, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr:
A discrete implementation of a bidirectional circuit for actuation and read-out of resonating sensors. 1-5 - Hammad Riaz, Abdul Aziz Bhatti, Muhammad Ashraf Tahir, Muhammad Sarwar:
High speed content addressable memory with reduced size and less power consumption. 1-6 - Omid Mirmotahari, Ali Dadashi, Mehdi Azadmehr, Yngvar Berg:
High-speed dynamic dual-rail ultra low voltage static CMOS logic operating at 300 mV. 1-4 - Dennis Noll, Udo Schwalke:
Investigation of transfer-free catalytic CVD graphene on SiO2 by means of conductive atomic force microscopy. 1-4 - Ru Han, Danghui Wang:
Tip-enhanced Raman scattering of 4H-SİC films. 1-4
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