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Bahar Jalali Farahani

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2010 – 2019

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2018
[c6]
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  - conf/isscc/ShahramianHSFB18
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Shahriar Shahramian, Mike Holyoak, Amit Singh, Bahar Jalali Farahani, Yves Baeyens:
A fully integrated scalable W-band phased-array module with integrated antennas, self-alignment and self-test. ISSCC 2018: 74-76
2011
[c5]
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  - conf/iscas/KanagarajF11
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Sudharsan Kanagaraj, Bahar Jalali Farahani:
An online fully-digital calibration of leakage noise in MASH continuous time ΔΣ modulators. ISCAS 2011: 1632-1635

2000 – 2009

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2009
[c4]
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Anand Meruva, Bahar Jalali Farahani:
A 14-b 32MS/s Pipelined ADC with Novel Fast-convergence Comprehensive Background Calibration. ISCAS 2009: 956-959
2008
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Bahar Jalali Farahani, Anand Meruva:
Low Power High Performance Digitally Assisted Pipelined ADC. ISVLSI 2008: 111-116
2007
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Bahar Jalali Farahani, Mohammed Ismail:
Adaptive Noise Cancellation Techniques in Sigma-Delta Analog-to-Digital Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(9): 1891-1899 (2007)
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Anand Meruva, Bahar Jalali Farahani:
Digital Background Calibration of Higher Order Nonlinearities in Pipelined ADCs. ISCAS 2007: 1233-1236
2005
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Bahar Jalali Farahani, Mohammed Ismail:
Adaptive digital techniques to suppress quantization noise of Sigma Delta analog to digital converters. ACM Great Lakes Symposium on VLSI 2005: 442-445

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