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ORCIDLuiz Cláudio Villar dos Santos
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2020 – today
- 2023
[j8]Marleson Graf
, Gabriel A. G. Andrade, Luiz C. V. dos Santos:
EveCheck: An Event-Driven, Scalable Algorithm for Coherent Shared Memory Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 683-696 (2023)- 2020
- [j7]Gabriel A. G. Andrade, Marleson Graf, Luiz C. V. dos Santos:
Chaining and Biasing: Test Generation Techniques for Shared-Memory Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(3): 728-741 (2020) - [j6]Gabriel A. G. Andrade, Marleson Graf, Nícolas Pfeifer, Luiz C. V. dos Santos:
A Directed Test Generator for Shared-Memory Verification of Multicore Chip Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5295-5303 (2020) - [c34]Nícolas Pfeifer, Bruno V. Zimpel, Gabriel A. G. Andrade, Luiz C. V. dos Santos:
A Reinforcement Learning Approach to Directed Test Generation for Shared Memory Verification. DATE 2020: 538-543
2010 – 2019
- 2019
- [c33]Marleson Graf, Olav P. Henschel, Rafael P. Alevato, Luiz C. V. dos Santos:
Spec&Check: An Approach to the Building of Shared-Memory Runtime Checkers for Multicore Chip Design Verification. ICCAD 2019: 1-7 - 2018
- [c32]Gabriel A. G. Andrade, Marleson Graf, Nícolas Pfeifer, Luiz C. V. dos Santos:
Steep coverage-ascent directed test generation for shared-memory verification of multicore chips. ICCAD 2018: 29 - 2017
- [j5]Vinicius S. Livramento, Derong Liu, Salim Chowdhury, Bei Yu, Xiaoqing Xu, David Z. Pan, José Luís Almada Güntzel, Luiz C. V. dos Santos:
Incremental Layer Assignment Driven by an External Signoff Timing Engine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(7): 1126-1139 (2017) - 2016
- [j4]Vinicius S. Livramento, Renan Netto, Chrystian Guth, José Luís Güntzel, Luiz Cláudio Villar dos Santos:
Clock-Tree-Aware Incremental Timing-Driven Placement. ACM Trans. Design Autom. Electr. Syst. 21(3): 38:1-38:27 (2016) - [c31]Gabriel A. G. Andrade, Marleson Graf, Luiz C. V. dos Santos:
Chain-based pseudorandom tests for pre-silicon verification of CMP memory systems. ICCD 2016: 552-559 - [c30]Renan Netto, Vinicius S. Livramento, Chrystian Guth, Luiz C. V. dos Santos, José Luís Güntzel:
Speeding up Incremental Legalization with Fast Queries to Multidimensional Trees. ISVLSI 2016: 36-41 - [c29]Renan Netto, Vinicius S. Livramento, Chrystian Guth, Luiz C. V. dos Santos, José Luís Güntzel:
Evaluating the impact of circuit legalization on incremental optimization techniques. SBCCI 2016: 1-6 - [c28]Felipe Piovezan, Tarcisio E. M. Crocomo, Luiz C. V. dos Santos:
Cache sizing for low-energy Elliptic Curve Cryptography. SBCCI 2016: 1-6 - 2015
- [c27]Vinicius S. Livramento, Chrystian Guth, Renan Netto, José Luís Almada Güntzel, Luiz C. V. dos Santos:
Exploiting Non-Critical Steiner Tree Branches for Post-Placement Timing Optimization. ICCAD 2015: 528-535 - [c26]Chrystian Guth, Vinicius S. Livramento, Renan Netto, Renan Fonseca, José Luís Güntzel, Luiz C. V. dos Santos:
Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient Slack Histogram Compression. ISPD 2015: 141-148 - 2013
- [c25]Emilio Wuerges, Rômulo Silva de Oliveira, Luiz C. V. dos Santos:
Reconciling real-time guarantees and energy efficiency through unlocked-cache prefetching. DAC 2013: 146:1-146:9 - [c24]Leandro S. Freitas, Eberle A. Rambo, Luiz C. V. dos Santos:
On-the-fly verification of memory consistency with concurrent relaxed scoreboards. DATE 2013: 631-636 - [c23]Olav P. Henschel, Luiz C. V. dos Santos:
Pre-silicon verification of multiprocessor SoCs: The case for on-the-fly coherence/consistency checking. ICECS 2013: 843-846 - 2012
- [c22]Eberle A. Rambo, Olav P. Henschel, Luiz C. V. dos Santos:
On ESL verification of memory consistency for system-on-chip multiprocessing. DATE 2012: 9-14 - [c21]Leandro S. Freitas, Gabriel A. G. Andrade, Luiz C. V. dos Santos:
Efficient verification of out-of-order behaviors with relaxed scoreboards. ICCD 2012: 510-511 - [c20]Leandro S. Freitas, Gabriel A. G. Andrade, Luiz C. V. dos Santos:
A template for the construction of efficient checkers with full verification guarantees. ICECS 2012: 280-283 - [c19]Rafael Westphal, José Luís Almada Güntzel, Luiz Cláudio Villar dos Santos:
Energy-efficient multi-task computing on MPSoCs: A case study from a memory perspective. ICECS 2012: 905-908 - 2011
- [c18]Eberle A. Rambo, Olav P. Henschel, Luiz C. V. dos Santos:
Automatic generation of memory consistency tests for chip multiprocessing. ICECS 2011: 542-545 - [c17]Emilio Wuerges, Rômulo Silva de Oliveira, Luiz C. V. dos Santos:
Fast estimation of memory consumption for energy-efficient compilers. ICECS 2011: 719-722 - [c16]Daniel P. Volpato, Alexandre Keunecke Ignácio Mendonça, José Luís Almada Güntzel, Luiz Cláudio Villar dos Santos:
Cache-tuning-aware scratchpad allocation from binaries. SBCCI 2011: 221-226 - 2010
- [c15]Daniel P. Volpato, Alexandre Keunecke Ignácio Mendonça, Luiz C. V. dos Santos, José Luís Almada Güntzel:
A Post-compiling Approach that Exploits Code Granularity in Scratchpads to Improve Energy Efficiency. ISVLSI 2010: 127-132
2000 – 2009
- 2009
- [j3]Felipe Klein, Roberto Leao, Guido Araujo, Luiz C. V. dos Santos, Rodolfo Azevedo:
A Multi-Model Engine for High-Level Power Estimation Accuracy Optimization. IEEE Trans. Very Large Scale Integr. Syst. 17(5): 660-673 (2009) - [c14]Gabriel Marcilio, Luiz C. V. dos Santos, Bruno C. Albertini, Sandro Rigo:
A novel verification technique to uncover out-of-order DUV behaviors. DAC 2009: 448-453 - [c13]Alexandre Keunecke Ignácio Mendonça, Daniel P. Volpato, José Luís Almada Güntzel, Luiz C. V. dos Santos:
Mapping Data and Code into Scratchpads from Relocatable Binaries. ISVLSI 2009: 157-162 - [c12]Emilio Wuerges, Luiz C. V. dos Santos, Olinto J. V. Furtado, Sandro Rigo:
An early real-time checker for retargetable compile-time analysis. SBCCI 2009 - 2008
- [j2]Alexandro Baldassin, Paulo Centoducatte, Sandro Rigo, Daniel C. Casarotto, Luiz C. V. dos Santos, Max R. de O. Schultz, Olinto J. V. Furtado:
An open-source binary utility generator. ACM Trans. Design Autom. Electr. Syst. 13(2): 27:1-27:17 (2008) - 2007
- [c11]Felipe Klein, Guido Araujo, Rodolfo Azevedo, Roberto Leao, Luiz C. V. dos Santos:
A multi-model power estimation engine for accuracy optimization. ISLPED 2007: 280-285 - [c10]Alexandro Baldassin, Paulo Centoducatte, Sandro Rigo, Daniel C. Casarotto, Luiz C. V. dos Santos, Max R. de O. Schultz, Olinto J. V. Furtado:
Automatic Retargeting of Binary Utilities for Embedded Code Generation. ISVLSI 2007: 253-258 - [c9]Felipe Klein, Guido Araujo, Rodolfo Azevedo, Roberto Leao, Luiz C. V. dos Santos:
On the Limitations of Power Macromodeling Techniques. ISVLSI 2007: 395-400 - [c8]Luiz Kawakami, André Knabben, Douglas Rechia, Denise Gasques Bastos, Otavio Pereira, Ricardo Pereira e Silva, Luiz C. V. dos Santos:
An Object-Oriented Framework for Improving Software Reuse on Automated Testing of Mobile Phones. TestCom/FATES 2007: 199-211 - [c7]Max R. de O. Schultz, Alexandre Keunecke Ignácio Mendonça, Felipe G. Carvalho, Olinto J. V. Furtado, Luiz C. V. dos Santos:
A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems. SAMOS 2007: 13-23 - [c6]José O. Carlomagno Filho, Luiz F. P. Santos, Luiz C. V. dos Santos:
An Automatically-Retargetable Time-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code. SAMOS 2007: 86-95 - 2005
- [c5]Leonardo Taglietti, José O. Carlomagno Filho, Daniel C. Casarotto, Olinto J. V. Furtado, Luiz C. V. dos Santos:
Automatic ADL-Based Assembler Generation for ASIP Programming Support. SAMOS 2005: 262-268 - 2003
- [c4]Rogério Xavier de Azambuja, Luiz C. V. dos Santos:
Global scheduling and register allocation based on predicated execution. ISCAS (3) 2003: 232-235 - 2000
- [j1]Luiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, J. Van Eijnhoven, Jochen A. G. Jess:
A code-motion pruning technique for global scheduling. ACM Trans. Design Autom. Electr. Syst. 5(1): 1-38 (2000)
1990 – 1999
- 1999
- [c3]Luiz C. V. dos Santos, Jochen A. G. Jess:
A Reordering Technique for Efficient Code Motion. DAC 1999: 296-299 - [c2]Luiz C. V. dos Santos, Jochen A. G. Jess:
Exploiting State Equivalence on the Fly while Applying Code Motion and Speculation. DATE 1999: 609- - 1996
- [c1]Luiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, Jos T. J. van Eijndhoven, Jochen A. G. Jess:
A Constructive Method for Exploiting Code Motion. ISSS 1996: 51-56
Coauthor Index
aka: José Luís Almada Güntzel
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