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ORCIDJames H. Stathis
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2010 – 2019
- 2019
[c12]Elnatan Mataev, James H. Stathis, Giuseppe La Rosa, Barry P. Linder:
Long Term NBTI Relaxation Under AC and DC Biased Stress and Recovery. IRPS 2019: 1-5- [c11]Narendra Parihar, Uma Sharma, Richard G. Southwick, Miaomiao Wang, James H. Stathis, Souvik Mahapatra:
On the Frequency Dependence of Bulk Trap Generation During AC Stress in Si and SiGe RMG P-FinFETs. IRPS 2019: 1-8 - [c10]Miaomiao Wang, Jingyun Zhang, Huimei Zhou, Richard G. Southwick, Robin Hsin Kuo Chao, Xin Miao, Veeraraghavan S. Basker, Tenko Yamashita, Dechao Guo, Gauri Karve, Huiming Bu, James H. Stathis:
Bias Temperature Instability Reliability in Stacked Gate-All-Around Nanosheet Transistor. IRPS 2019: 1-6 - [c9]Ernest Y. Wu, Baozhen Li, James H. Stathis, Andrew Kim:
Comprehensive Methodology for Multiple Spots Competing Progressive Breakdown for BEOL/FEOL Applications. IRPS 2019: 1-8 - 2018
- [j13]James H. Stathis
, Souvik Mahapatra, Tibor Grasser:
Controversial issues in negative bias temperature instability. Microelectron. Reliab. 81: 244-251 (2018) - [c8]James H. Stathis:
The physics of NBTI: What do we really know? IRPS 2018: 2 - [c7]Ernest Y. Wu, Andrew Kim, Baozhen Li, James H. Stathis:
Elapsed-time statistics of successive breakdown in the presence of variability for dielectric breakdown in BEOL/MOL/FEOL applications. IRPS 2018: 3 - [c6]Miaomiao Wang, Richard G. Southwick, Kangguo Cheng, James H. Stathis:
Lateral profiling of HCI induced damage in ultra-scaled FinFET devices with Id-Vd characteristics. IRPS 2018: 6 - 2017
- [c5]Miaomiao Wang, Xin Miao, James H. Stathis, Richard G. Southwick:
Hot carrier reliability in ultra-scaled sige channel p-FinFETs. ASICON 2017: 666-669 - 2015
- [c4]Ernest Y. Wu, James H. Stathis, Baozhen Li, Barry P. Linder, Kai Zhao, Griselda Bonilla:
A critical analysis of sampling-based reconstruction methodology for dielectric breakdown systems (BEOL/MOL/FEOL). IRPS 2015: 2 - [c3]Miaomiao Wang, Zuoguang Liu, Tenko Yamashita, James H. Stathis, Chia-Yu Chen:
Separation of interface states and electron trapping for hot carrier degradation in ultra-scaled replacement metal gate n-FinFET. IRPS 2015: 4 - [c2]Emily Ray, Barry P. Linder, Raphael Robertazzi, Kevin Stawiasz, Alan J. Weger, Emmanuel Yashchin, James H. Stathis, Peilin Song:
Analyzing path delays for accelerated testing of logic chips. IRPS 2015: 6 - 2014
- [c1]Subhasish Mitra, Pradip Bose, Eric Cheng, Chen-Yong Cher, Hyungmin Cho, Rajiv V. Joshi, Young Moon Kim, Charles R. Lefurgy, Yanjing Li, Kenneth P. Rodbell, Kevin Skadron, James H. Stathis, Lukasz G. Szafaryn:
The resilience wall: Cross-layer solution strategies. VLSI-DAT 2014: 1-11 - 2010
- [j12]James H. Stathis, M. Wang, K. Zhao:
Reliability of advanced high-k/metal-gate n-FET devices. Microelectron. Reliab. 50(9-11): 1199-1202 (2010)
2000 – 2009
- 2009
- [j11]Aditya Bansal, Rahul M. Rao, Jae-Joon Kim, Sufi Zafar, James H. Stathis, Ching-Te Chuang:
Impacts of NBTI and PBTI on SRAM static/dynamic noise margins and cell failure probability. Microelectron. Reliab. 49(6): 642-649 (2009) - 2008
- [j10]R. Pagano, Salvatore Lombardo, Felix Palumbo, Paul Kirsch, S. A. Krishnan, Chadwin D. Young, Rino Choi, Gennadi Bersuker, James H. Stathis:
A novel approach to characterization of progressive breakdown in high-k/metal gate stacks. Microelectron. Reliab. 48(11-12): 1759-1764 (2008) - 2007
- [j9]Esteve Amat, Rosana Rodríguez, Montserrat Nafría, Xavier Aymerich, James H. Stathis:
Influence of the SiO2 layer thickness on the degradation of HfO2/SiO2 stacks subjected to static and dynamic stress conditions. Microelectron. Reliab. 47(4-5): 544-547 (2007) - [j8]Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Xavier Aymerich, James H. Stathis:
Worn-out oxide MOSFET characteristics: Role of gate current and device parameters on a current mirror. Microelectron. Reliab. 47(4-5): 665-668 (2007) - 2006
- [j7]James H. Stathis, Sufi Zafar:
The negative bias temperature instability in MOS devices: A review. Microelectron. Reliab. 46(2-4): 270-286 (2006) - 2003
- [j6]James H. Stathis, Rosana Rodríguez, Barry P. Linder:
Circuit implications of gate oxide breakdown. Microelectron. Reliab. 43(8): 1193-1197 (2003) - [j5]James H. Stathis, Barry P. Linder, Rosana Rodríguez, Salvatore Lombardo:
Reliability of ultra-thin oxides in CMOS circuits. Microelectron. Reliab. 43(9-11): 1353-1360 (2003) - [j4]Rosana Rodríguez, James H. Stathis, Barry P. Linder, Rajiv V. Joshi, Ching-Te Chuang:
Influence and model of gate oxide breakdown on CMOS inverters. Microelectron. Reliab. 43(9-11): 1439-1444 (2003) - 2002
- [j3]James H. Stathis:
Reliability limits for the gate insulator in CMOS technology. IBM J. Res. Dev. 46(2-3): 265-286 (2002) - [j2]Rosana Rodríguez, James H. Stathis, Barry P. Linder, Steven P. Kowalczyk, Ching-Te Chuang, Rajiv V. Joshi, Gregory A. Northrop, Kerry Bernstein, Azeez J. Bhavnagarwala, Salvatore Lombardo:
Analysis of the effect of the gate oxide breakdown on SRAM stability. Microelectron. Reliab. 42(9-11): 1445-1448 (2002) - [j1]Salvatore Lombardo, James H. Stathis, Barry P. Linder:
Dependence of Post-Breakdown Conduction on Gate Oxide Thickness. Microelectron. Reliab. 42(9-11): 1481-1484 (2002)
Coauthor Index
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