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2020 – today
- 2024
[j10]Sujuan Liu
, Kun Liu, Zifeng Xing, Aoran Ge, Peiyuan Wan:
A fast-response RBCOT buck converter with second-order differential and integrator compensation based on FVF. Microelectron. J. 150: 106249 (2024)- [c19]Shengping Lv, Zhijie Chen, Peng Zhang, Peiyuan Wan, Liuxin Lv, Hanjun Jiang:
A Capacitor-Less LDO Regulator Compensated by Adaptive Zero for Zero-Load Stability Enhancement. ISCAS 2024: 1-5 - 2023
- [j9]Zhijie Chen, Xiaoyu Zhang, Yongkuo Ma, Xitong Liang, Xinyu Du, Peiyuan Wan:
A 1.9-ps 8× phase interpolation TDC for time-based analog-to-digital converter with capacitance compensation self-calibration. IEICE Electron. Express 20(3): 20220515 (2023) - [j8]Zheng Wang, Xu Liu, Yunao Chen, Qiumeng Fan, Zhijie Chen, Peiyuan Wan:
Design of analog front-end integrated circuit of tactile sensor for human-machine interface. Integr. 93: 102065 (2023) - [j7]Juzhe Li, Weijian Chen, Xu Liu, Peiyuan Wan, Zhijie Chen:
A 4-Channel Neural Stimulation IC Design With Charge Balancing and Multiple Current Output Modes. IEEE Trans. Biomed. Circuits Syst. 17(5): 1037-1049 (2023) - [j6]Weijian Chen, Weisong Liang, Xu Liu, Zeyu Lu, Peiyuan Wan, Zhijie Chen:
A Low Noise Neural Recording Frontend IC With Power Management for Closed-Loop Brain-Machine Interface Application. IEEE Trans. Biomed. Circuits Syst. 17(5): 1050-1061 (2023) - [c18]Xu Liu, Yukun Jiao, Zeyu Lu, Weijian Chen, Peiyuan Wan, Zhijie Chen:
A Bio-Impedance Measurement Chip Design with AC Current Outputs. ICTA 2023: 1-2 - [c17]Xu Liu, Yukun Jiao, Zeyu Lu, Weijian Chen, Peiyuan Wan, Zhijie Chen:
A Fast Bioimpedance Measurement Chip Design Using Dynamic Current. ICTA 2023: 168-169 - 2022
- [j5]Zhijie Chen, Yu Zhang, Zhiyuan Gao, Peiyuan Wan:
Energy-efficient Fe-based FET logic in LUT circuit with transistor reduction technique. IEICE Electron. Express 19(6): 20220004 (2022) - [j4]Peiyuan Wan, Yucheng Bao, Boyong Jin, Zhijie Chen:
A 8-bit, 1-GHz coarse-fine time-based ADC with split-CDAC residue transfer. IEICE Electron. Express 19(6): 20220074 (2022) - [c16]Ronghao Zhang, Xu Liu, Zhijie Chen, Peiyuan Wan, Tao Chen:
A Neural Recording IC Design with on-chip CMOS Electrode Array for Brain-machine Interface. APCCAS 2022: 1-5 - [c15]Juzhe Li, Xu Liu, Peiyuan Wan, Zhijie Chen:
A 4-Channel Neural Stimulation IC Design with Charge Balancing and Exponential Current Output. APCCAS 2022: 123-127 - [c14]Weisong Liang, Xu Liu, Weijian Chen, Zeyu Lu, Peiyuan Wan, Zhijie Chen:
A Wireless Power Design with High PCE and Fast Transient Response over a Large Loading Range for Multi-channel Neural Stimulators. APCCAS 2022: 128-133 - [c13]Weijian Chen, Xu Liu, Weisong Liang, Zeyu Lu, Peiyuan Wan, Zhijie Chen:
A Low-Noise Neural Signal Amplifier Achieving 1.6 NEF and 2.56 PEF for Brain-Machine Interface. APCCAS 2022: 144-148 - 2021
- [c12]Yucheng Bao, Zhijie Chen, Boyong Jin, Peiyuan Wan:
A 4x folding voltage-to-time converter with adjustable conversion gain and offset for time-based ADC. ASICON 2021: 1-4 - [c11]Yongkuo Ma, Peiyuan Wan, Hongda Zhang, Zhi Wan, Xiaoyu Zhang, Xu Liu, Zhijie Chen:
A 4.39ps, 1.5GS/s Time-to-Digital Converter with 4× Phase Interpolation Technique and a 2-D Quantization Array. A-SSCC 2021: 1-3 - [c10]Qianshui Yu, Chuankai Wang, Zijing Yuan, Xu Liu, Peiyuan Wan, Zhijie Chen:
A 1.65 mW 2.8 GHz Dual-Loops Class-C VCO Achieving 189 dBc/Hz FoM. ICTA 2021: 33-34 - [c9]Juzhe Li, Xu Liu, Peiyuan Wan, Zhijie Chen:
Design of an Exponential Current Generator for Neural Stimulation. ICTA 2021: 137-138
2010 – 2019
- 2019
- [j3]Zhijie Chen, Peiyuan Wan, Ning Li:
Non-Ideal Issues Analysis in a Fully Passive Noise Shaping SAR ADC. IEICE Trans. Electron. 102-C(7): 538-546 (2019) - 2015
- [c8]Ming Li, Haibin Yin, Peiyuan Wan:
A digitally calibrated low-power ring oscillator. ASICON 2015: 1-4 - [c7]Qian Liang, Jinhui Wang, Peiyuan Wan, Ligang Hou, Na Gong:
DCPG: Double-control power gating technique for a 28 nm Cortex™-A9 MPCore Quad-core processor. ASICON 2015: 1-4 - [c6]Haibin Yin, Xiaohong Peng, Peiyuan Wan, Jinhui Wang, Ligang Hou:
Design and testing of CMOS compatible EEPROM. ASICON 2015: 1-4 - 2013
- [j2]Wei Lang, Peiyuan Wan, Pingfen Lin:
A 0.8 V 48 μW 82 dB SNDR 10-kHz BANDWIDTH ΣΔ MODULATOR IN 0.13-μM CMOS. J. Circuits Syst. Comput. 22(4) (2013) - 2011
- [j1]Pingli Huang, Szukang Hsien, Victor Lu, Peiyuan Wan, Seung-Chul Lee, Wenbo Liu, Bo-Wei Chen, Yung-Pin Lee, Wen-Tsao Chen, Tzu-Yi Yang, Gin-Kou Ma, Yun Chiu:
SHA-Less Pipelined ADC With In Situ Background Clock-Skew Calibration. IEEE J. Solid State Circuits 46(8): 1893-1903 (2011) - [c5]Peiyuan Wan, Wei Lang, Di Fang, Wei Cui, Pingfen Lin:
A 1.2-V 250-MS/s 8-bit pipelined ADC in 0.13-µm CMOS. ASICON 2011: 986-989 - [c4]Bei Peng, Guanzhong Huang, Hao Li, Peiyuan Wan, Pingfen Lin:
A 48-mW, 12-bit, 150-MS/s pipelined ADC with digital calibration in 65nm CMOS. CICC 2011: 1-4 - 2010
- [c3]Di Zhu, Jiacheng Wang, Chaoli Zhong, Jie Tian, Yiming Tang, Peiyuan Wan, Ping Lin:
A High Linearity 6th-order active R-MOSFET-C band-pass filter for power-line communication. APCCAS 2010: 843-846 - [c2]Pingli Huang, Szukang Hsien, Victor Lu, Peiyuan Wan, Seung-Chul Lee, Wenbo Liu, Bo-Wei Chen, Yung-Pin Lee, Wen-Tsao Chen, Tzu-Yi Yang, Gin-Kou Ma, Yun Chiu:
SHA-less pipelined ADC converting 10th Nyquist band with in-situ clock-skew calibration. CICC 2010: 1-4 - [c1]Peiyuan Wan, Yun Chiu, Pingfen Lin:
A 5.8-mW, 20-MHz, 4th-order programmable elliptic filter achieving over -80-dB IM3. CICC 2010: 1-4
Coauthor Index
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