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Claudio Passerone
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2020 – today
- 2024
- [c30]Lukas Frickenstein, Pierpaolo Morì, Shambhavi Balamuthu Sampath, Moritz Thoma, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Christian Unger, Claudio Passerone, Walter Stechele:
Pruning as a Binarization Technique. CVPR Workshops 2024: 2131-2140 - [c29]Pierpaolo Morì, Moritz Thoma, Lukas Frickenstein, Shambhavi Balamuthu Sampath, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Walter Stechele, Daniel Mueller-Gritschneder, Claudio Passerone:
MATAR: Multi-Quantization-Aware Training for Accurate and Fast Hardware Retargeting. DATE 2024: 1-6 - [c28]Pierpaolo Morì, Lukas Frickenstein, Shambhavi Balamuthu Sampath, Moritz Thoma, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Christian Unger, Walter Stechele, Daniel Mueller-Gritschneder, Claudio Passerone:
Wino Vidi Vici: Conquering Numerical Instability of 8-bit Winograd Convolution for Accurate Inference Acceleration on Edge. WACV 2024: 53-62 - 2023
- [c27]Pierpaolo Morì, Shambhavi Balamuthu Sampath, Lukas Frickenstein, Manoj Rohit Vemparala, Nael Fasfous, Alexander Frickenstein, Walter Stechele, Claudio Passerone:
WinoTrain: Winograd-Aware Training for Accurate Full 8-bit Convolution Acceleration. DAC 2023: 1-6 - 2022
- [c26]Pierpaolo Morì, Manoj Rohit Vemparala, Nael Fasfous, Saptarshi Mitra, Sreetama Sarkar, Alexander Frickenstein, Lukas Frickenstein, Domenik Helms, Naveen Shankar Nagaraja, Walter Stechele, Claudio Passerone:
Accelerating and pruning CNNs for semantic segmentation on FPGA. DAC 2022: 145-150
2010 – 2019
- 2014
- [c25]Gabriele Camellini, Mirko Felisa, Paolo Medici, Paolo Zani, Francesco Gregoretti, Claudio Passerone, Roberto Passerone:
3DV - An embedded, dense stereovision-based depth mapping system. Intelligent Vehicles Symposium 2014: 1435-1440 - 2011
- [j7]Dante Del Corso, Claudio Passerone, Leonardo Maria Reyneri, Claudio Sansoè, Stefano Speretta, Maurizio Tranchero:
Design of a University Nano-Satellite: the PiCPoT Case. IEEE Trans. Aerosp. Electron. Syst. 47(3): 1985-2007 (2011)
2000 – 2009
- 2009
- [p2]Luciano Lavagno, Claudio Passerone:
Design of Embedded Systems. Embedded Systems Design and Verification 2009: 2 - 2007
- [c24]Dante Del Corso, Claudio Passerone, Leonardo Maria Reyneri, Claudio Sansoè, Marco Borri, Stefano Speretta, Maurizio Tranchero:
Architecture of a Small Low-Cost Satellite. DSD 2007: 428-431 - 2006
- [c23]Claudio Passerone:
Real time operating system modeling in a system level design environment. ISCAS 2006 - 2005
- [j6]Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
Software Development for High-Performance, Reconfigurable, Embedded Multimedia Systems. IEEE Des. Test Comput. 22(1): 28-38 (2005) - [j5]Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
Implementation of a UMTS turbo decoder on a dynamically reconfigurable platform. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(1): 100-106 (2005) - [j4]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe:
Quasi-static scheduling of independent tasks for reactive systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(10): 1492-1514 (2005) - [c22]Luciano Lavagno, Claudio Passerone, Vishal Shah, Yosinori Watanabe:
A Time Slice Based Scheduler Model for System Level Design. DATE 2005: 378-383 - [p1]Luciano Lavagno, Claudio Passerone:
Design of Embedded Systems. The Industrial Information Technology Handbook 2005: 1-14 - [r2]Luciano Lavagno, Claudio Passerone:
Design of Embedded Systems. Embedded Systems Handbook 2005 - [r1]Luciano Lavagno, Claudio Passerone, Alex Kondratyev, Yosinori Watanabe:
Quasi-Static Scheduling of Concurrent Specifications. Embedded Systems Handbook 2005 - 2004
- [c21]Alberto La Rosa, Claudio Passerone, Francesco Gregoretti, Luciano Lavagno:
Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform. DATE 2004: 1218-1223 - [c20]Ivan Blunno, Guy Alain Narboni, Claudio Passerone:
An Automated Methodology for Low Electro-Magnetic Emissions Digital Circuits Design. DSD 2004: 540-547 - 2003
- [j3]Felice Balarin, Yosinori Watanabe, Harry Hsieh, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli:
Metropolis: An Integrated Electronic System Design Environment. Computer 36(4): 45-52 (2003) - [c19]Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
Hardware/Software Design Space Exploration for a Reconfigurable Processor. DATE 2003: 10570-10575 - [c18]Fabio Campi, Andrea Cappelli, Roberto Guerrieri, Andrea Lodi, Mario Toma, Alberto La Rosa, Luciano Lavagno, Claudio Passerone, Roberto Canegallo:
A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems. IPDPS 2003: 171 - 2002
- [c17]Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Marco Sgroi, Yosinori Watanabe:
Modeling and Designing Heterogeneous Systems. Concurrency and Hardware Design 2002: 228-273 - [c16]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe:
Quasi-Static Scheduling of Independent Tasksfor Reactive Systems. ICATPN 2002: 80-100 - [c15]Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe, Guang Yang:
Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model. CODES 2002: 13-18 - [c14]G. Arrigoni, L. Duchini, Claudio Passerone, Luciano Lavagno, Yosinori Watanabe:
False Path Elimination in Quasi-Static Scheduling. DATE 2002: 964-970 - [c13]Felice Balarin, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe:
Processes, Interfaces and Platforms. Embedded Software Modeling in Metropolis. EMSOFT 2002: 407-416 - [c12]Ivan Blunno, Francesco Gregoretti, Claudio Passerone, D. Peretto, Leonardo M. Reyneri:
Designing low electro magnetic emissions circuits through clock skew optimization. ICECS 2002: 417-420 - [c11]Luciano Lavagno, Mihai T. Lazarescu, Stefano Quer, Sergio Nocco, Claudio Passerone, Gianpiero Cabodi:
A Symbolic Approach for the Combined Solution of Scheduling and Allocation. ISSS 2002: 237-242 - 2001
- [c10]Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
A software development tool chain for a reconfigurable processor. CASES 2001: 93-98 - [c9]Claudio Passerone, Yosinori Watanabe, Luciano Lavagno:
Generation of minimal size code for scheduling graphs. DATE 2001: 668-673 - 2000
- [j2]Tullio Cuatto, Claudio Passerone, Claudio Sansoè, Francesco Gregoretti, Attila Jurecska, Alberto L. Sangiovanni-Vincentelli:
A Case Study in Embedded Systems Design: An Engine Control Unit. Des. Autom. Embed. Syst. 6(1): 71-88 (2000) - [c8]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Marc Massot, Sandra Moral, Claudio Passerone, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli:
Task generation and compile-time scheduling for mixed data-control embedded software. DAC 2000: 489-494
1990 – 1999
- 1999
- [c7]H. J. H. N. Kenter, Claudio Passerone, W. J. M. Smits, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli:
Designing digital video systems: modeling and scheduling. CODES 1999: 64-68 - [c6]Gianpiero Cabodi, Paolo Camurati, Claudio Passerone, Stefano Quer:
Computing Timed Transition Relations for Sequential Cycle-Based Simulation. DATE 1999: 8-12 - 1998
- [j1]Claudio Passerone, Claudio Sansoè, Luciano Lavagno, Patrick C. McGeer, Jonathan Martin, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli:
Modeling reactive systems in Java. ACM Trans. Design Autom. Electr. Syst. 3(4): 515-523 (1998) - [c5]Claudio Passerone, Roberto Passerone, Claudio Sansoè, Jonathan Martin, Alberto L. Sangiovanni-Vincentelli, Rick McGeer:
Modeling reactive systems in Java. CODES 1998: 15-19 - [c4]Tullio Cuatto, Claudio Passerone, Luciano Lavagno, Attila Jurecska, Antonino Damiano, Claudio Sansoè, Alberto L. Sangiovanni-Vincentelli:
A Case Study in Embedded System Design: An Engine Control Unit. DAC 1998: 804-807 - 1997
- [c3]Claudio Passerone, Luciano Lavagno, Claudio Sansoè, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli:
Trade-off evaluation in embedded system design via co-simulation. ASP-DAC 1997: 291-297 - [c2]Claudio Passerone, Luciano Lavagno, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli:
Fast Hardware/Software Co-Simulation for Virtual Prototyping and Trade-Off Analysis. DAC 1997: 389-394 - 1995
- [c1]Francesco Gregoretti, Claudio Passerone:
Using a massively parallel architecture for integrated circuits testing. PDP 1995: 332-338
Coauthor Index
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last updated on 2024-10-11 18:18 CEST by the dblp team
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