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ORCIDJorge Semião
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2020 – today
- 2022
[c34]Jorge Semião
, Luís Santos, Marcelino B. Santos:
DRAM Performance Sensor. HCI (7) 2022: 510-521- [c33]Cristian Díaz Martín, Eladio Durán Aranda, Salvador Pérez Litrán, Jorge Semião:
Quasi-Resonant DC-DC Converter Single-Switch for Single-Input Bipolar-Output Applications. IECON 2022: 1-6 - 2021
- [c32]Jorge Semião, Luís Santos, Marcelino B. Santos:
SRAM Performance Sensor. DCIS 2021: 1-6 - 2020
- [p1]Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Internet of Things and Artificial Intelligence - A Wining Partnership? Convergence of Artificial Intelligence and the Internet of Things 2020: 369-390
2010 – 2019
- 2019
- [c31]Salvador P. Litran, Eladio Durán, María Bella Ferrera, Jorge Semião, Rafael S. Barroso:
A Zeta-CSC Converter Combination for Single-Input and Bipolar Output. IECON 2019: 5721-5726 - 2018
- [c30]Dario Cruz, Nelson Pinto, Jânio M. Monteiro, Pedro J. S. Cardoso, Cristiano Cabrita, Jorge Semião, Luís M. R. Oliveira, João M. F. Rodrigues:
Development of an Energy Management System for the Charge Scheduling of Plug-in Electric Vehicles. HCI (8) 2018: 214-225 - [c29]Jorge Semião, Ruben Cabral, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Performance Sensor for Reliable Operation. HCI (8) 2018: 347-365 - 2015
- [j10]Carlos Leong, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Fault-Tolerance in Field Programmable Gate Array with Dynamic Voltage and Frequency Scaling. J. Low Power Electron. 11(4): 517-527 (2015) - [c28]Pedro J. S. Cardoso, Gabriela Schütz, Jorge Semião, Jânio M. Monteiro, João M. F. Rodrigues, Andriy Mazayev, Emanuel Ey, Micael Viegas:
Integration of a Real-Time Stochastic Routing Optimization Software with an Enterprise Resource Planner. GISTAM (Selected Papers) 2015: 124-141 - [c27]Pedro J. S. Cardoso, Gabriela Schütz, Jorge Semião, Jânio M. Monteiro, João M. F. Rodrigues, Andriy Mazayev, Emanuel Ey Vieira, Micael Viegas, Carlos Neves, Sérgio Anastácio:
Integration of a Food Distribution Routing Optimization Software with an Enterprise Resource Planner. GISTAM 2015: 153-161 - [c26]Carlos Leong, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Fault-tolerance in FPGA focusing power reduction or performance enhancement. LATS 2015: 1-6 - 2014
- [c25]Jorge Semião, David Saraiva, Carlos Leong, André Romão, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Performance sensor for tolerance and predictive detection of delay-faults. DFT 2014: 110-115 - [c24]Jânio M. Monteiro, Jorge Eduardo, Pedro J. S. Cardoso, Jorge Semião:
A distributed load scheduling mechanism for micro grids. SmartGridComm 2014: 278-283 - 2013
- [j9]Julio César Vázquez, Víctor H. Champac, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
Process Variations-Aware Statistical Analysis Framework for Aging Sensors Insertion. J. Electron. Test. 29(3): 289-299 (2013) - [c23]Carlos Leong, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira, María Dolores Valdés, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas:
Aging monitoring with local sensors in FPGA-based designs. FPL 2013: 1-4 - 2012
- [j8]Jackson Pachito, Celestino V. Martins, Bruno Jacinto, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Aging-Aware Power or Frequency Tuning With Predictive Fault Detection. IEEE Des. Test Comput. 29(5): 27-36 (2012) - [j7]Judit Freijedo, Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira:
Modeling the Effect of Process, Power-Supply Voltage and Temperature Variations on the Timing Response of Nanometer Digital Circuits. J. Electron. Test. 28(4): 421-434 (2012) - [c22]Jackson Pachito, Celestino V. Martins, Jorge Semião, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira:
The influence of clock-gating on NBTI-induced delay degradation. IOLTS 2012: 61-66 - 2011
- [j6]Judit Freijedo, María Dolores Valdés, Lucía Costas, María José Moure, Juan J. Rodríguez-Andina, Jorge Semião, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira:
Lower VDD Operation of FPGA-Based Digital Circuits Through Delay Modeling and Time Borrowing. J. Low Power Electron. 7(2): 185-198 (2011) - [j5]R. S. Oliveira, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
On-Line BIST for Performance Failure Prediction Under NBTI-Induced Aging in Safety-Critical Applications. J. Low Power Electron. 7(4): 562-572 (2011) - [c21]Vasco Bexiga, Carlos Leong, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira, María Dolores Valdés, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas:
Performance Failure Prediction Using Built-In Delay Sensors in FPGAs. FPL 2011: 301-304 - [c20]Judit Freijedo, Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira:
Modeling the effect of process variations on the timing response of nanometer digital circuits. LATW 2011: 1-5 - [c19]R. S. Oliveira, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
On-line BIST for performance failure prediction under aging effects in automotive safety-critical applications. LATW 2011: 1-6 - [c18]María Dolores Valdés, Judit Freijedo, María José Moure, Juan J. Rodríguez-Andina, Jorge Semião, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira:
Programmable sensor for on-line checking of signal integrity in FPGA-based systems subject to aging effects. LATW 2011: 1-7 - [c17]Celestino V. Martins, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors. VTS 2011: 203-208 - 2010
- [j4]Judit Freijedo, Lucía Costas, Jorge Semião, Juan J. Rodríguez-Andina, María José Moure, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira:
Impact of Power Supply Voltage Variations on FPGA-Based Digital Systems Performance. J. Low Power Electron. 6(2): 339-349 (2010) - [c16]Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira:
Predictive error detection by on-line aging monitoring. IOLTS 2010: 9-14 - [c15]Raul Chipana, Letícia Maria Veiras Bolzani, Fabian Vargas, Jorge Semião, Juan J. Rodríguez-Andina, Isabel C. Teixeira, João Paulo Teixeira:
Investigating the Use of BICS to detect resistive-open defects in SRAMs. IOLTS 2010: 200-201
2000 – 2009
- 2009
- [c14]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies. IOLTS 2009: 223-228 - [c13]Jorge Semião, Judit Freijedo, Marlon Moraes, M. Mallmann, Carlos Lemos Antunes, Juliano Benfica, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Juan J. Rodríguez-Andina, João Paulo Teixeira, Daniel Lupi, Edmundo Gatti, Luis Garcia, Fernando Hernandez:
Measuring clock-signal modulation efficiency for Systems-on-Chip in electromagnetic interference environment. LATW 2009: 1-6 - 2008
- [j3]Jorge Semião, Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Leonardo Bisch Piccoli, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel Maria Cacho Teixeira, João Paulo Teixeira:
Signal Integrity Enhancement in Digital Circuits. IEEE Des. Test Comput. 25(5): 452-461 (2008) - [j2]Judit Freijedo, Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira:
Delay Modeling for Power Noise and Temperature-Aware Design and Test of Digital Systems. J. Low Power Electron. 4(3): 385-391 (2008) - [j1]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Time Management for Low-Power Design of Digital Systems. J. Low Power Electron. 4(3): 410-419 (2008) - [c12]Jorge Semião, João Varela, Judit Freijedo, Juan J. Rodríguez-Andina, Carlos Leong, João Paulo Teixeira, Isabel C. Teixeira:
Robust solution for synchronous communication among multi clock domains. APCCAS 2008: 1107-1110 - [c11]Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. DDECS 2008: 34-37 - [c10]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits. IOLTS 2008: 227-232 - 2007
- [c9]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. DDECS 2007: 295-300 - [c8]Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira:
Improving the Tolerance of Pipeline Based Circuits to Power Supply or Temperature Variations. DFT 2007: 303-311 - [c7]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. IOLTS 2007: 167-172 - [c6]Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Enhancing the Tolerance to Power-Supply Instability in Digital Circuits. ISVLSI 2007: 207-212 - 2006
- [c5]F. Guerreiro, Jorge Semião, A. Pierce, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Functional-Oriented BIST of Sequential Circuits Aiming at Dynamic Faults Coverage. DDECS 2006: 279-284 - [c4]Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira:
Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes. IOLTS 2006: 257-262 - 2001
- [c3]Yervant Zorian, Paolo Prinetto, João Paulo Teixeira, Isabel C. Teixeira, Carlos Eduardo Pereira, Octávio Páscoa Dias, Jorge Semião, Peter Muhmenthaler, W. Radermacher:
Embedded tutorial: TRP: integrating embedded test and ATE. DATE 2001: 34-37 - 2000
- [c2]Octávio Páscoa Dias, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Quality of Electronic Design: From Architectural Level to Test Coverage. ISQED 2000: 197-
1990 – 1999
- 1999
- [c1]Octávio Páscoa Dias, Jorge Semião, Marcelino B. Santos, Isabel Maria Cacho Teixeira, João Paulo Teixeira:
From system level to defect-oriented test: a case study. ETW 1999: 136-141
Coauthor Index
aka: Marcelino Bicho Dos Santos
aka: Isabel Maria Cacho Teixeira
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