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2020 – today
- 2022
[c44]Ranju Mandal
, Brijesh K. Verma, Basim Azam, Henry Selvaraj:
A Novel Optimized Context-Based Deep Architecture for Scene Parsing. ICONIP (6) 2022: 351-364
2010 – 2019
- 2017
- [c43]Ahmed Khamis, Dawid Zydek, Henry Selvaraj:
Improved Genetic Algorithm for Finite-Horizon Optimal Control of Nonlinear Systems. ICSEng 2017: 85-90 - [c42]D. Selvathi, Henry Selvaraj:
FPGA Implementation for Epileptic Seizure Detection Using Amplitude and Frequency Analysis of EEG Signals. ICSEng 2017: 183-192 - [c41]Grzegorz Chmaj, Henry Selvaraj:
Interconnection Networks Efficiency in System-on-Chip Distributed Computing System: Concentrated Mesh and Fat Tree. ICSEng 2017: 277-286 - [c40]Henry Selvaraj, Nikita Ramesh Wanjale:
Analog and Mixed-Signal Verification Using Satisfiability Solver on Discretized Models. ICSEng 2017: 418-424 - [e3]Henry Selvaraj, Grzegorz Chmaj, Dawid Zydek:
25th International Conference on Systems Engineering, ICSEng 2017, Las Vegas, NV, USA, August 22-24, 2017. IEEE Computer Society 2017, ISBN 978-1-5386-0610-0 [contents] - 2016
- [j24]Grzegorz Chmaj, Henry Selvaraj:
Energy-Efficient Computing Solutions for Internet of Things with ZigBee Reconfigurable Devices. Int. J. Softw. Innov. 4(1): 31-47 (2016) - 2015
- [j23]D. Selvathi, Henry Selvaraj, J. Dharani:
FPGA Implementation of Fuzzy Inference System Based Edge Detection Algorithm. Int. J. Comput. Intell. Appl. 14(2): 1550009:1-1550009:21 (2015) - [c39]Grzegorz Chmaj, Henry Selvaraj:
Energy-efficient distributed computing solutions for Internet of Things with ZigBee devices. ICIS 2015: 437-442 - [c38]Grzegorz Chmaj, Henry Selvaraj:
Concentrated mesh and fat tree usage efficiency in System-on-Chip based multiprocessor distributed processing architectures. MECO 2015: 37-40 - [e2]Henry Selvaraj, Dawid Zydek, Grzegorz Chmaj:
Progress in Systems Engineering - Proceedings of the Twenty-Third International Conference on Systems Engineering, ICSEng 2014, Las Vegas, NV, USA, August 19-21, 2014. Advances in Intelligent Systems and Computing 366, Springer 2015, ISBN 978-3-319-08421-3 [contents] - 2014
- [c37]Grzegorz Chmaj, Henry Selvaraj:
Distributed Processing Applications for UAV/drones: A Survey. ICSEng 2014: 449-454 - [c36]Grzegorz Chmaj, Henry Selvaraj:
UAV Cooperative Data Processing Using Distributed Computing Platform. ICSEng 2014: 455-461 - [c35]Luka Daoud, Dawid Zydek, Henry Selvaraj:
A Survey on Design and Implementation of Floating Point Adder in FPGA. ICSEng 2014: 885-892 - 2013
- [c34]Luka Daoud, Dawid Zydek, Henry Selvaraj:
A Survey of High Level Synthesis Languages, Tools, and Compilers for Reconfigurable High Performance Computing. ICSS 2013: 483-492 - [c33]Dawid Krol, Dawid Zydek, Henry Selvaraj:
Matrix Multiplication in Multiphysics Systems Using CUDA. ICSS 2013: 493-502 - [c32]Grzegorz Chmaj, Henry Selvaraj, Laxmi P. Gewali:
Tracker-Node Model for Energy Consumption in Reconfigurable Processing Systems. ICSS 2013: 503-512 - [c31]Mohammad Shokrolah Shirazi, Brendan Morris, Henry Selvaraj:
Fast FPGA-based fault injection tool for embedded processors. ISQED 2013: 476-480 - 2012
- [c30]Grzegorz Chmaj, Dawid Zydek, Yehia Zakarya Elhalwagy, Henry Selvaraj:
Overlay-NoC and H-Phy based computing using modern Chip Multiprocessors. EIT 2012: 1-6 - [c29]Bin Liu, Dawid Zydek, Henry Selvaraj, Laxmi P. Gewali:
Accelerating High Performance Computing Applications: Using CPUs, GPUs, Hybrid CPU/GPU, and FPGAs. PDCAT 2012: 337-342 - 2011
- [j22]Dawid Zydek, Henry Selvaraj, Grzegorz Borowik, Tadeusz Luba:
Energy characteristic of a processor allocator and a network-on-chip. Int. J. Appl. Math. Comput. Sci. 21(2): 385-399 (2011) - [j21]Dawid Zydek, Henry Selvaraj:
Fast and efficient processor allocation algorithm for torus-based chip multiprocessors. Comput. Electr. Eng. 37(1): 91-105 (2011) - [j20]G. Wiselin Jiji, Henry Selvaraj, G. Evelin Suji:
Supervised Classification of White Blood Cells by Fusion of Color Texture Features and Neural Network. Int. J. Comput. Intell. Appl. 10(4): 471-480 (2011) - [c28]Bartosz Kajak, Laxmi P. Gewali, Henry Selvaraj:
Ear-Slicing and Quality Triangulation. ICSEng 2011: 194-199 - [c27]Dawid Zydek, Grzegorz Chmaj, Henry Selvaraj:
Extended Analysis of Resource Assignment in Modern Chip Multiprocessors. ICSEng 2011: 457-458 - [e1]Henry Selvaraj, Dawid Zydek:
21st International Conference on Systems Engineering (ICSEng 2011), Las Vegas, NV, USA, Aug. 16-18, 2011. IEEE 2011, ISBN 978-1-4577-1078-0 [contents] - 2010
- [j19]D. Selvathi, Henry Selvaraj, S. Thamarai Selvi:
Hybrid Approach for Brain Tumor Segmentation in Magnetic Resonance Images Using Cellular Neural Networks and Optimization Techniques. Int. J. Comput. Intell. Appl. 9(1): 17-31 (2010) - [j18]Dawid Zydek, Henry Selvaraj:
Hardware implementation of processor allocation schemes for mesh-based chip multiprocessors. Microprocess. Microsystems 34(1): 39-48 (2010) - [c26]Dawid Zydek, Henry Selvaraj, Laxmi P. Gewali:
Synthesis of Processor Allocator for Torus-Based Chip MultiProcessors. ITNG 2010: 13-18
2000 – 2009
- 2009
- [j17]Laxmi P. Gewali, Dan Mazzella, Henry Selvaraj:
Constrained Disjoint Paths in Geometric Networks. Int. J. Comput. Intell. Appl. 8(2): 141-154 (2009) - [j16]Henry Selvaraj, S. Arivazhagan:
Editorial: Applications of Computational Intelligence. Int. J. Comput. Intell. Appl. 8(2) (2009) - [c25]Dawid Zydek, Henry Selvaraj:
Processor Allocation Problem for NoC-Based Chip Multiprocessors. ITNG 2009: 96-101 - 2008
- [j15]A. R. Nadira Banu Kamal, S. Thamarai Selvi, Henry Selvaraj:
Iteration-Free Fractal Coding for Image Compression Using Genetic Algorithm. Int. J. Comput. Intell. Appl. 7(4): 429-446 (2008) - 2007
- [j14]Ling Wang, Yingtao Jiang, Henry Selvaraj:
Scheduling and optimal voltage selection with multiple supply voltages under resource constraints. Integr. 40(2): 174-182 (2007) - [j13]Dongxin Wen, Ling Wang, Yingtao Jiang, Henry Selvaraj, Xiao-Zong Yang:
Placement-Directed Behavioral Synthesis Scheme for Simultaneous Scheduling Binding and Partitioning with Resources Operating at Multiple Voltages. Int. J. Comput. Their Appl. 14(2): 92-98 (2007) - [j12]Venkatesan Muthukumar, Robert J. Bignall, Henry Selvaraj:
An efficient variable partitioning approach for functional decomposition of circuits. J. Syst. Archit. 53(1): 53-67 (2007) - [c24]Min Tun, Laxmi P. Gewali, Henry Selvaraj:
Interference Aware Routing in Sensor Network. ITNG 2007: 140-146 - 2006
- [j11]Henry Selvaraj, Piotr Sapiecha, Mariusz Rawski, Tadeusz Luba:
Functional Decomposition - the Value and Implication for Both Neural Networks and Digital Designing. Int. J. Comput. Intell. Appl. 6(1): 123-138 (2006) - [j10]D. Selvathi, S. Thamarai Selvi, Henry Selvaraj:
Abnormality Detection in Brain MR Images Using Minimum Error Thresholding Method. Int. J. Comput. Intell. Appl. 6(2): 177-191 (2006) - [j9]Mariusz Rawski, Henry Selvaraj, Tadeusz Luba, Piotr Szotkowski:
Multilevel Synthesis of Finite State Machines Based on Symbolic Functional Decomposition. Int. J. Comput. Intell. Appl. 6(2): 257-271 (2006) - [j8]Henry Selvaraj, S. Thamarai Selvi, D. Selvathi, R. Ramkumar:
Support Vector Machine Based Automatic Classification of Human Brain Using MR Image Features. Int. J. Comput. Intell. Appl. 6(3): 357-370 (2006) - [j7]Ling Wang, Yingtao Jiang, Henry Selvaraj:
Scheduling and Partitioning Schemes for Low Power Designs Using Multiple Supply Voltages. J. Supercomput. 35(1): 93-113 (2006) - 2005
- [j6]Ling Wang, Yingtao Jiang, Henry Selvaraj:
Multiple voltage synthesis scheme for low power design under timing and resource constraints. Integr. Comput. Aided Eng. 12(4): 369-378 (2005) - [j5]Henry Selvaraj, Lech Józwiak:
Reconfigurable embedded systems: Synthesis, design and application. J. Syst. Archit. 51(6-7): 347-349 (2005) - [j4]Venkatesan Muthukumar, Bharath Radhakrishnan, Henry Selvaraj:
Multiple voltage and frequency scheduling for power minimization. J. Syst. Archit. 51(6-7): 382-394 (2005) - [j3]Mariusz Rawski, Henry Selvaraj, Tadeusz Luba:
An application of functional decomposition in ROM-based FSM implementation in FPGA devices. J. Syst. Archit. 51(6-7): 424-434 (2005) - [c23]Mariusz Rawski, Pawel Tomaszewicz, Henry Selvaraj, Tadeusz Luba:
Efficient Implementation of Digital Filters with Use of Advanced Synthesis Methods Targeted FPGA Architectures. DSD 2005: 460-466 - [c22]Henry Selvaraj, Pawel Tomaszewicz, Mariusz Rawski, Tadeusz Luba:
Efficient Application of Modern Logic Synthesis in FPGA-Based Designing of Information and Signal Processing Systems. ITCC (2) 2005: 22-27 - 2004
- [c21]Mariusz Rawski, Henry Selvaraj, Pawel Morawiecki:
Efficient Method of Input Variable Partitioning in Functional Decomposition Based on Evolutionary Algorithms. DSD 2004: 136-143 - [c20]Jianhong Li, Laxmi P. Gewali, Henry Selvaraj, Muthukumar Venkatesan:
Hybrid Greedy/Face Routing for Ad-Hoc Sensor Network. DSD 2004: 574-578 - [c19]Piotr Sapiecha, Henry Selvaraj, Jaroslaw Tomasz Stanczak, Krzysztof Sep, Tadeusz Luba:
A Hybrid Approach to a Classification Problem. Intelligent Information Systems 2004: 99-106 - [c18]Ling Wang, Yingtao Jiang, Henry Selvaraj:
Synthesis scheme for low power designs with multiple supply voltages by tabu search. ISCAS (5) 2004: 261-264 - [c17]Ling Wang, Yingtao Jiang, Henry Selvaraj:
Synthesis Scheme for Low Power Designs with Multiple Supply Voltages by Heuristic Algorithms. ITCC (2) 2004: 829-833 - 2003
- [c16]Mariusz Rawski, Henry Selvaraj, Tadeusz Luba:
An Application of Functional Decomposition in ROM-Based FSM Implementation in FPGA Devices. DSD 2003: 104-111 - [c15]Ling Wang, Henry Selvaraj:
A Scheduling and Partitioning Scheme for Low Power Circuit Operating at Multiple Voltages. DSD 2003: 144-147 - [c14]Michal Pleban, Hubert Niewiadomski, Piotr Buciak, Henry Selvaraj, Piotr Sapiecha, Tadeusz Luba:
NOAH, a tool for argument reduction, serial and parallel decomposition of decision tables. DSD 2003: 248-254 - [c13]Ling Wang, Yingtao Jiang, Henry Selvaraj:
Scheduling and Optimal Voltage Selection with Multiple Supply Voltages under Resource Constraints. VLSI 2003: 272-278 - [c12]Muthukumar Venkatesan, Henry Selvaraj:
Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation. VLSI Design 2003: 51-57 - 2002
- [c11]Ling Wang, Henry Selvaraj:
Performance Driven Circuit Clustering and Partitioning. ITCC 2002: 352-354 - [c10]Henry Selvaraj, Mariusz Rawski, Tadeusz Luba:
FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition. ITCC 2002: 355-360 - 2001
- [j2]Henry Selvaraj, Piotr Sapiecha, Tadeusz Luba:
Functional Decomposition and Its Applications in Machine Learning and Neural Networks. Int. J. Comput. Intell. Appl. 1(3): 259-271 (2001) - [c9]Muthukumar Venkatesan, Robert J. Bignall, Henry Selvaraj:
A variable partition approach for disjoint decomposition. ISCAS (5) 2001: 157-162 - 2000
- [c8]Muthukumar Venkatesan, Robert J. Bignall, Henry Selvaraj:
An Improved Column Compatibility Approach for Partition Based Functional Decomposition. EUROMICRO 2000: 1067- - [c7]Henry Selvaraj, B. Li:
A Parameter to Measure the Efficiency of FPGA Based Logic Synthesis Tools. EUROMICRO 2000: 1212- - [c6]Piotr Sapiecha, Henry Selvaraj, Michal Pleban:
Decomposition of Boolean Relations and Functions in Logic Synthesis and Data Analysis. Rough Sets and Current Trends in Computing 2000: 487-494 - [c5]Venkatesan Muthukumar, Robert J. Bignall, Henry Selvaraj:
An Input-Output Encoding Approach for Serial Decomposition. SBCCI 2000: 61-68
1990 – 1999
- 1999
- [c4]S. Kulkami, Brijesh K. Verma, P. Sharma, Henry Selvaraj:
Content based image retrieval using a neuro-fuzzy technique. IJCNN 1999: 4304-4308 - 1998
- [c3]Henry Selvaraj, Muthukumar Venkatesan:
A Reconfiguarable Printed Character Recognition System Using a Logic Synthesis Tool. EUROMICRO 1998: 10024- - [c2]Henry Selvaraj, Miroslawa Nowicka, Tadeusz Luba:
Decomposition Strategies and their Performance in Fpga-Based Technology Mapping. VLSI Design 1998: 388-393 - 1995
- [j1]Tadeusz Luba, Henry Selvaraj:
A General Approach to Boolean Function Decomposition and its Application in FPGABased Synthesis. VLSI Design 3(3-4): 289-300 (1995) - [c1]Henry Selvaraj, Tadeusz Luba:
A balanced multilevel decomposition method. ED&TC 1995: 594
Coauthor Index
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