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ORCIDJonghoon Oh
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2010 – 2019
- 2019
[c11]Dongkyun Kim, Minsu Park, Sungchun Jang, Jun-Yong Song, Hankyu Chi, Geunho Choi, Sunmyung Choi, Jaeil Kim, Changhyun Kim, Kyung Whan Kim, Kibong Koo, Seonghwi Song, Yongmi Kim, Dong-Uk Lee, Jaejin Lee, Dae Suk Kim, Ki Hun Kwon, Minsik Han, Byeongchan Choi, Hongjung Kim, Sanghyun Ku, Yeonuk Kim, Jong-Sam Kim, Sanghui Kim, Youngsuk Seo, Seungwook Oh, Dain Im, Haksong Kim, Jonghyuck Choi, Jinil Chung, Changhyun Lee, Yongsung Lee, Joo-Hwan Cho, Junhyun Chun, Jonghoon Oh:
A 1.1V 1ynm 6.4Gb/s/pin 16Gb DDR5 SDRAM with a Phase-Rotator-Based DLL, High-Speed SerDes and RX/TX Equalization Scheme. ISSCC 2019: 380-382- [c10]Seong Ju Lee, Byung Deuk Jeon, Kyeong Pil Kang, Dong Yoon Ka, Na Yeon Kim, Yongseop Kim, Yunseok Hong, Mankeun Kang, Jinyong Min, Mingyu Lee, Chunseok Jeong, Kwandong Kim, Doobock Lee, Junghyun Shin, Yuntack Han, Youngbo Shim, Youngjoo Kim, Yongsun Kim, Hyunseok Kim, Jaewoong Yun, Byungsoo Kim, Seokhwan Han, Changwoo Lee, Junyong Song, Ho Uk Song, Il Park, Yongju Kim, Junhyun Chun, Jonghoon Oh:
A 512GB 1.1V Managed DRAM Solution with 16GB ODP and Media Controller. ISSCC 2019: 384-386 - 2018
- [c9]Jin-Hee Cho, Jihwan Kim, Wooyoung Lee, Dong-Uk Lee, Tae-Kyun Kim, Heat Bit Park, Chunseok Jeong, Myeong-Jae Park, Seung Geun Baek, Seokwoo Choi, Byung Kuk Yoon, Young Jae Choi, Kyo Yun Lee, Daeyong Shim, Jonghoon Oh, Jinkook Kim, Seok-Hee Lee:
A 1.2V 64Gb 341GB/S HBM2 stacked DRAM with spiral point-to-point TSV structure and improved bank group data control. ISSCC 2018: 208-210 - [c8]Kyu-Dong Hwang, Boram Kim, Sang-Yeon Byeon, Kyu-Young Kim, Dae-Han Kwon, Hyun-Bae Lee, Geun-Il Lee, Sang-Sic Yoon, Jin-Youp Cha, Soo-Young Jang, Seung-Hun Lee, Yongsuk Joo, Gang-Sik Lee, Sung-Soo Xi, Soo-Bin Lim, Kyung-Ho Chu, Joohwan Cho, Junhyun Chun, Jonghoon Oh, Jinkook Kim, Seok Hee Lee:
A 16Gb/s/pin 8Gb GDDR6 DRAM with bandwidth extension techniques for high-speed applications. ISSCC 2018: 210-212 - [c7]Seokbo Shim, Sungho Kim, Jooyoung Bae, Keunsik Ko, Eunryeong Lee, Kwidong Kim, Kyeongtae Kim, Sangho Lee, Jinhoon Hyun, Insung Koh, Joonhong Park, Minjeong Kim, Sunhye Shin, Dongha Lee, Yunyoung Lee, Sangah Hyun, Wonjohn Choi, Dain Im, Dongheon Lee, Jieun Jang, Sangho Lee, Junhyun Chun, Jonghoon Oh, Jinkook Kim, Seok Hee Lee:
A 16Gb 1.2V 3.2Gb/s/pin DDR4 SDRAM with improved power distribution and repair strategy. ISSCC 2018: 212-214 - 2017
- [c6]Nohhyup Kwak, Saeng-Hwan Kim, Kyong Ha Lee, Chang-Ki Baek, Mun Seon Jang, Yongsuk Joo, Seung-Hun Lee, Wooyoung Lee, Eunryeong Lee, Donghee Han, Jaeyeol Kang, Jung Ho Lim, Jae-Beom Park, Kyung-Tae Kim, Sunki Cho, Sung Woo Han, Jee Yeon Keh, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee:
23.3 A 4.8Gb/s/pin 2Gb LPDDR4 SDRAM with sub-100µA self-refresh current for IoT applications. ISSCC 2017: 392-393 - [c5]Kwangmyoung Rho, Kenji Tsuchida, Dongkeun Kim, Yutaka Shirai, Jihyae Bae, Tsuneo Inaba, Hiromi Noro, Hyunin Moon, Sungwoong Chung, Kazumasa Sunouchi, Jinwon Park, Kiseon Park, Akihito Yamamoto, Seoungju Chung, Hyeongon Kim, Hisato Oyamatsu, Jonghoon Oh:
23.5 A 4Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture. ISSCC 2017: 396-397 - 2016
- [c4]Jong-Chern Lee, Jihwan Kim, Kyung Whan Kim, Young Jun Ku, Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jaejin Lee, Hyeon Gon Kim, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee:
High bandwidth memory(HBM) with TSV technique. ISOCC 2016: 181-182 - [c3]Jong-Chern Lee, Jihwan Kim, Kyung Whan Kim, Young Jun Ku, Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Yeon Ok Kim, Jae-Hwan Kim, Jin Ho Kim, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jeajin Lee, Hyeon Gon Kim, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee:
18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface. ISSCC 2016: 318-319 - [c2]Young Jun Yoon, Byung Deuk Jeon, Byung Soo Kim, Ki Up Kim, Tae Yong Lee, Nohhyup Kwak, Woo-Yeol Shin, Na Yeon Kim, Yunseok Hong, Kyeong Pil Kang, Dong Yoon Ka, Seong Ju Lee, Yong Sun Kim, Young Kyu Noh, Jaehoon Kim, Dong Keum Kang, Ho Uk Song, Hyeon Gon Kim, Jonghoon Oh:
18.4 An 1.1V 68.2GB/s 8Gb Wide-IO2 DRAM with non-contact microbump I/O test scheme. ISSCC 2016: 320-322
2000 – 2009
- 2004
- [c1]Jonghoon Oh, Chang-Sung Jeong:
The DSC Algorithm for Edge Detection. Australian Conference on Artificial Intelligence 2004: 967-972
Coauthor Index
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