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ORCIDMarc Reichenbach
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- affiliation: Friedrich Alexander University of Erlangen-Nuremberg, Department of Computer Science, Erlangen, Germany
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2020 – today
- 2024
[j23]Alexander Lehnert
, Falko Gawantka, Jonas During, Franz Just, Marc Reichenbach:
XplAInable: Explainable AI Smoke Detection at the Edge. Big Data Cogn. Comput. 8(5): 50 (2024)- [j22]Daniel Reiser, Junchao Chen, Johannes Knödtel, Andrea Baroni, Milos Krstic, Marc Reichenbach:
Design and analysis of an adaptive radiation resilient RRAM subsystem for processing systems in satellites. Des. Autom. Embed. Syst. 28(2): 111-137 (2024) - [j21]Alex Orailoglu, Marc Reichenbach, Matthias Jung:
Special Issue on SAMOS 2022. Int. J. Parallel Program. 52(1-2): 1-2 (2024) - [c64]An Braeken, Bruno da Silva, Laurent Segers, Johannes Knödtel, Marc Reichenbach, Cornelia Wulf, Sergio A. Pertuz, Diana Göhringer, Jo Vliegen, Md Masoom Rabbani, Nele Mentens:
Trusted Computing Architectures for IoT Devices. ARC 2024: 241-254 - [c63]Rafael Batista, Matthias Nickel, Alexander Lehnert, Sergio A. Pertuz, Marc Reichenbach, Diana Goehringer, Alisson Brito:
Towards an Embedded System for Failure Diagnosis in Drones Using AI and SAC-DM on FPGA. DATE 2024: 1-2 - [c62]Markus Fritscher, Max Uhlmann, Philip Ostrovskyy, Daniel Reiser, Junchao Chen, Markus Andreas Schubert, Carsten Schulze, Gerhard Kahmen, Dietmar Fey, Marc Reichenbach, Milos Krstic, Christian Wenger:
Area-Efficient Digital Design Using RRAM-CMOS Standard Cells. ISVLSI 2024: 81-87 - [c61]Jianan Wen, Fabian Luis Vargas, Fukun Zhu, Daniel Reiser, Andrea Baroni, Markus Fritscher, Eduardo Pérez, Marc Reichenbach, Christian Wenger, Milos Krstic:
Cycle-Accurate FPGA Emulation of RRAM Crossbar Array: Efficient Device and Variability Modeling with Energy Consumption Assessment. LATS 2024: 1-6 - [c60]Jens Bielefeldt, Kai-Uwe Basener, Roman Krajewski, Hans-Werner Wiesbrock, Marc Reichenbach, Michael Hübner:
DeepTest: Using Machine Learning for Generating new Testsequences. MECO 2024: 1-9 - 2023
- [j20]Alexander Lehnert, Philipp Holzinger, Simon Pfenning, Ralf R. Müller, Marc Reichenbach:
Most Resource Efficient Matrix Vector Multiplication on FPGAs. IEEE Access 11: 3881-3898 (2023) - [j19]Abhinav Vishwakarma, Markus Fritscher, Amelie Hagelauer, Marc Reichenbach:
An RRAM-based building block for reprogrammable non-uniform sampling ADCs. it Inf. Technol. 65(1-2): 39-51 (2023) - [j18]Christian Skubich, Peter Reichel, Marc Reichenbach:
Increasing the Robustness of TERO-TRNGs Against Process Variation. ACM Trans. Reconfigurable Technol. Syst. 16(3): 48:1-48:29 (2023) - [c59]Alexander Lehnert, Hans Rosenberger, Ralf R. Müller, Marc Reichenbach:
More Efficient CMMs on FPGAs: Instantiated Ternary Adders for Computation Coding. ARC 2023: 275-289 - [c58]Johannes Knödtel, Hector Gerardo Muñoz Hernandez, Alexander Lehnert, Gia Bao Thieu, Sven Gesper, Guillermo Payá Vayá, Marc Reichenbach:
TAPRE-HBM: Trace-Based Processor Rapid Emulation Using HBM on FPGAs. ARC 2023: 307-321 - [c57]Safdar Mahmood, Michael Hübner, Marc Reichenbach:
A Design-Space Exploration Framework for Application-Specific Machine Learning Targeting Reconfigurable Computing. ARC 2023: 371-374 - [c56]Farshad Firouzi, Krishnendu Chakrabarty, Naghmeh Karimi, Bahareh J. Farahani, Diana Goehringer, Aurora Gil de Castro, Marc Reichenbach, Kun-Chih Chen:
Welcome Message from the Chairs. COINS 2023: 1 - [c55]Keyvan Shahin, Randolf Rotta, Oscar Archila, Pavlo Mykytyn, Matthias Nattke, Marc Reichenbach, Jörg Nolte, Roman Natarov:
A Modular Communication Architecture for Adaptive UAV Swarms. COINS 2023: 1-6 - [c54]Johannes Knödtel, Marc Reichenbach:
Datapath Optimization for Embedded Signal Processing Architectures utilizing Design Space Exploration. DroneSE/RAPIDO@HiPEAC 2023: 60-65 - [c53]Running Guo, Ruolan Jia, Stefan Pechmann, Marc Reichenbach, Amelie Hagelauer:
A High-speed Low-power Sense Amplifier for the RRAM Array with Multi-level Reading Function using 130-nm Technology. ICECS 2023: 1-4 - [c52]Daniel Reiser, Marc Reichenbach, Tommaso Rizzi, Andrea Baroni, Markus Fritscher, Christian Wenger, Cristian Zambelli, Davide Bertozzi:
Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations. NEWCAS 2023: 1-5 - [c51]Max Uhlmann, Emilio Pérez-Bosch Quesada, Markus Fritscher, Eduardo Pérez, Markus Andreas Schubert, Marc Reichenbach, Philip Ostrovskyy, Christian Wenger, Gerhard Kahmen:
One-Transistor-Multiple-RRAM Cells for Energy-Efficient In-Memory Computing. NEWCAS 2023: 1-5 - [c50]Ralf R. Müller, Hans Rosenberger, Marc Reichenbach:
Linear Computation Coding for Convolutional Neural Networks. SSP 2023: 562-565 - [c49]Markus Fritscher, Alessandro Veronesi, Andrea Baroni, Jianan Wen, Thorsten Spätling, Mamathamba Kalishettyhalli Mahadevaiah, Norbert Herfurth, Eduardo Perez, Markus Ulbricht, Marc Reichenbach, Amelie Hagelauer, Milos Krstic:
Prototyping Reconfigurable RRAM-Based AI Accelerators Using the RISC-V Ecosystem and Digital Twins. ISC Workshops 2023: 500-514 - [e4]Cristina Silvano, Christian Pilato, Marc Reichenbach:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 23rd International Conference, SAMOS 2023, Samos, Greece, July 2-6, 2023, Proceedings. Lecture Notes in Computer Science 14385, Springer 2023, ISBN 978-3-031-46076-0 [contents] - 2022
- [j17]Marc Reichenbach, Matthias Jung, Alex Orailoglu:
Guest Editorial: Special Issue on 2020 IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2020). Int. J. Parallel Program. 50(2): 187-188 (2022) - [j16]Priscile Suawa, Tenia Meisel, Marcel Jongmanns, Michael Hübner, Marc Reichenbach:
Modeling and Fault Detection of Brushless Direct Current Motor by Deep Learning Sensor Data Fusion. Sensors 22(9): 3516 (2022) - [j15]Kwame Owusu Ampadu, Florian Rokohl, Safdar Mahmood, Marc Reichenbach, Michael Hübner:
InjectMeAI - Software Module of an Autonomous Injection Humanoid. Sensors 22(14): 5315 (2022) - [c48]Johannes Knödtel, Sebastian Rachuj, Marc Reichenbach:
Suitability of ISAs for Data Paths Based on Redundant Number Systems: Is RISC-V the best? DSD 2022: 247-253 - [c47]Safdar Mahmood, Stefan Scharoba, Jonas Schorlemer, Christian Schulz, Michael Hübner, Marc Reichenbach:
Detecting Improvised Land-mines using Deep Neural Networks on GPR Image Dataset targeting FPGAs. NorCAS 2022: 1-7 - [c46]Lars Schwenger, Philipp Holzinger, Dietmar Fey, Hector Gerardo Muñoz Hernandez, Marc Reichenbach:
EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis. SAMOS 2022: 43-57 - [c45]Florian Fricke, Stefan Scharoba, Sebastian Rachuj, Andreas Konopik, Florian Kluge, Georg Hofstetter, Marc Reichenbach:
Application Runtime Estimation for AURIX Embedded MCU Using Deep Learning. SAMOS 2022: 235-249 - [c44]Hector Gerardo Muñoz Hernandez, Florian Fricke, Muhammed Al Kadi, Marc Reichenbach, Michael Hübner:
Edge GPU based on an FPGA Overlay Architecture using PYNQ. SBCCI 2022: 1-6 - [e3]Alex Orailoglu, Matthias Jung, Marc Reichenbach:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 21st International Conference, SAMOS 2021, Virtual Event, July 4-8, 2021, Proceedings. Lecture Notes in Computer Science 13227, Springer 2022, ISBN 978-3-031-04579-0 [contents] - [e2]Alex Orailoglu, Marc Reichenbach, Matthias Jung:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 22nd International Conference, SAMOS 2022, Samos, Greece, July 3-7, 2022, Proceedings. Lecture Notes in Computer Science 13511, Springer 2022, ISBN 978-3-031-15073-9 [contents] - 2021
- [j14]Marc Reichenbach, Johannes Knödtel, Sebastian Rachuj, Dietmar Fey:
RISC-V3: A RISC-V Compatible CPU With a Data Path Based on Redundant Number Systems. IEEE Access 9: 43684-43700 (2021) - [j13]Philipp Holzinger, Marc Reichenbach:
The HERA Methodology: Reconfigurable Logic in General-Purpose Computing. IEEE Access 9: 147212-147236 (2021) - [j12]Anne D. Koelewijn, Musa L. Audu, Antonio J. del Ama, Annalisa Colucci, Josep M. Font-Llagunes, Antonio Gogeascoechea, Sandra K. Hnat, Nathan S. Makowski, Juan C. Moreno, Mark J. Nandor, Roger D. Quinn, Marc Reichenbach, Ryan-David Reyes, Massimo Sartori, Surjo R. Soekadar, Ronald J. Triolo, Mareike Vermehren, Christian Wenger, Utku S. Yavuz, Dietmar Fey, Philipp Beckerle:
Adaptation Strategies for Personalized Gait Neuroprosthetics. Frontiers Neurorobotics 15: 750519 (2021) - [c43]Burkhard Ringlein, François Abel, Dionysios Diamantopoulos, Beat Weiss, Christoph Hagleitner, Marc Reichenbach, Dietmar Fey:
A Case for Function-as-a-Service with Disaggregated FPGAs. CLOUD 2021: 333-344 - [c42]Philipp Holzinger, Daniel Reiser, Tobias Hahn, Marc Reichenbach:
Fast HBM Access with FPGAs: Analysis, Architectures, and Applications. IPDPS Workshops 2021: 152-159 - [c41]Steffen Vaas, Peter Ulbrich, Christian Eichler, Peter Wägemann, Marc Reichenbach, Dietmar Fey:
Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design. ISORC 2021: 43-52 - [c40]Markus Fritscher, Johannes Knödtel, Daniel Reiser, Maen Mallah, Stefan Pechmann, Dietmar Fey, Marc Reichenbach:
Simulating large neural networks embedding MLC RRAM as weight storage considering device variations. LASCAS 2021: 1-4 - [c39]Markus Fritscher, Johannes Knödtel, Maen Mallah, Stefan Pechmann, Emilio Pérez-Bosch Quesada, Tommaso Rizzi, Christian Wenger, Marc Reichenbach:
Mitigating the Effects of RRAM Process Variation on the Accuracy of Artificial Neural Networks. SAMOS 2021: 401-417 - [i4]Simon Pfenning, Philipp Holzinger, Marc Reichenbach:
Transparent FPGA Acceleration with TensorFlow. CoRR abs/2102.06018 (2021) - [i3]Marco Breiling, Bijoy Kundu, Marc Reichenbach:
E = AI2. ERCIM News 2021(125) (2021) - 2020
- [c38]Johannes Knödtel, Markus Fritscher, Daniel Reiser, Dietmar Fey, Marco Breiling, Marc Reichenbach:
A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories. MOCAST 2020: 1-6 - [c37]Sebastian Rachuj, Dietmar Fey, Marc Reichenbach:
Impact of Performance Estimation on Fast Processor Simulators. SimuTools (2) 2020: 79-93 - [e1]Alex Orailoglu, Matthias Jung, Marc Reichenbach:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 20th International Conference, SAMOS 2020, Samos, Greece, July 5-9, 2020, Proceedings. Lecture Notes in Computer Science 12471, Springer 2020, ISBN 978-3-030-60938-2 [contents]
2010 – 2019
- 2019
- [j11]Marc Reichenbach, Philipp Holzinger, Konrad Häublein, Tobias Lieske, Paul Blinzer, Dietmar Fey:
Heterogeneous Computing Utilizing FPGAs - A New and Flexible Approach Integrating Dedicated Hardware Accelerators into Common Computing Platforms. J. Signal Process. Syst. 91(7): 745-757 (2019) - [j10]Steffen Vaas, Peter Ulbrich, Marc Reichenbach, Dietmar Fey:
Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands. J. Signal Process. Syst. 91(7): 773-786 (2019) - [c36]Sebastian Rachuj, Marc Reichenbach, Dietmar Fey:
A Generic Functional Simulation of Heterogeneous Systems. ARCS 2019: 128-141 - [c35]Markus Fritscher, Johannes Knödtel, Marc Reichenbach, Dietmar Fey:
Simulating Memristive Systems in Mixed-Signal Mode using Commercial Design Tools. ICECS 2019: 225-228 - [c34]Rashid Ali, Maen Mallah, Martin Leyh, Philipp Holzinger, Marco Breiling, Marc Reichenbach, Dietmar Fey:
A Hardware Inference Accelerator for Temporal Convolutional Networks. NORCAS 2019: 1-7 - 2018
- [j9]Christopher Soell, Marc Reichenbach, Juergen Roeber, Amelie Hagelauer, Robert Weigel, Dietmar Fey:
Case study on memristor-based multilevel memories. Int. J. Circuit Theory Appl. 46(1): 99-112 (2018) - [j8]Lan Shi, Christopher Soell, Benjamin Pfundt, Andreas Baenisch, Marc Reichenbach, Jürgen Seiler, Thomas Ussmueller, Robert Weigel:
A flexible mixed-signal image processing pipeline using 3D chip stacks. J. Real Time Image Process. 14(3): 517-534 (2018) - [j7]Christian Hartmann, Konrad Häublein, Marc Reichenbach, Dietmar Fey:
IPAS: a design framework for analysis, synthesis and optimization of image processing applications for heterogenous computing architectures. J. Real Time Image Process. 14(3): 549-564 (2018) - [j6]Christian Herglotz, Dominic Springer, Marc Reichenbach, Benno Stabernack, André Kaup:
Modeling the Energy Consumption of the HEVC Decoding Process. IEEE Trans. Circuits Syst. Video Technol. 28(1): 217-229 (2018) - [c33]Sebastian Rachuj, Christian Herglotz, Marc Reichenbach, André Kaup, Dietmar Fey:
A Hybrid Approach for Runtime Analysis Using a Cycle and Instruction Accurate Model. ARCS 2018: 85-96 - [c32]Marc Reichenbach, Lukas Liebischer, Steffen Vaas, Dietmar Fey:
Comparison of Lane Detection Algorithms for ADAS Using Embedded Hardware Architectures. DASIP 2018: 48-53 - [c31]Wolfgang Bauer, Philipp Holzinger, Marc Reichenbach, Steffen Vaas, Paul Hartke, Dietmar Fey:
Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems. Euro-Par Workshops 2018: 733-744 - [c30]Sebastian Rachuj, Marc Reichenbach, Steffen Vaas, Dietmar Fey:
Autonomous Driving in the Curriculum of Computer Architecture. EWME 2018: 11-16 - [c29]Johannes Knödtel, Wolffhardt Schwabe, Tobias Lieske, Marc Reichenbach, Dietmar Fey:
A Novel Methodology for Evaluating the Energy Consumption of IP Blocks in System-Level Designs. PATMOS 2018: 46-53 - [c28]Philipp Holzinger, Marc Reichenbach, Dietmar Fey:
A new generic HLS approach for heterogeneous computing: on the feasibility of high-level synthesis in HSA-compatible systems. SAMOS 2018: 18-27 - 2017
- [b1]Marc Reichenbach:
Heterogene Rechnerarchitekturen für intelligente Kameras. University of Erlangen-Nuremberg, Germany, 2017, pp. 1-270 - [j5]Benjamin Pfundt, Marc Reichenbach, Dietmar Fey:
Comprehensive curriculum for reconfigurable heterogeneous computer architecture education. IET Circuits Devices Syst. 11(4): 292-298 (2017) - [j4]Marc Reichenbach, Maximilian Kasparek, Konrad Häublein, Jan Niklas Bauer, Mohammad Alawieh, Dietmar Fey:
Fast heterogeneous computing architectures for smart antennas. J. Syst. Archit. 76: 76-88 (2017) - [c27]Marc Reichenbach, Philipp Holzinger, Konrad Häublein, Tobias Lieske, Paul Blinzer, Dietmar Fey:
LibHSA: One step towards mastering the era of heterogeneous hardware accelerators using FPGAs. DASIP 2017: 1-6 - [c26]Steffen Vaas, Peter Ulbrich, Marc Reichenbach, Dietmar Fey:
The best of both: High-performance anc deterministic real-time executive by application-specific multi-core SoCs. DASIP 2017: 1-6 - [c25]Daniel Wust, Mehrdad Biglari, Johannes Knödtel, Marc Reichenbach, Christopher Söll, Dietmar Fey:
Prototyping memristors in digital system with an FPGA-based testing environment. PATMOS 2017: 1-7 - [c24]Tobias Lieske, Benjamin Pfundt, Steffen Vaas, Marc Reichenbach, Dietmar Fey:
System on chip generation for multi-sensor and sensor fusion applications. SAMOS 2017: 20-29 - 2016
- [c23]Konrad Häublein, Christian Hartmann, Marc Reichenbach, Dietmar Fey:
Fast and Resource Aware Image Processing Operators Utilizing Highly Configurable IP Blocks. ARC 2016: 303-311 - [c22]Benjamin Pfundt, Marc Reichenbach, Christian Hartmann, Konrad Häublein, Dietmar Fey:
Teaching heterogeneous computer architectures using smart camera systems. EWME 2016: 1-6 - [c21]Christopher Soell, Lan Shi, Jürgen Röber, Marc Reichenbach, Robert Weigel, Amelie Hagelauer:
Low-power analog smart camera sensor for edge detection. ICIP 2016: 4408-4412 - [c20]Steffen Vaas, Marc Reichenbach, Dietmar Fey:
An Application-Specific Instruction Set Processor for Power Quality Monitoring. IPDPS Workshops 2016: 181-188 - [c19]Alexander Steg, Marc Reichenbach, Christopher Soell, Lan Shi, Andreas K. Maier, Christian Riess:
Dynamic pixel binning allows spatial and angular resolution tradeoffs to improve image quality in X-ray C-arm CT. ISBI 2016: 577-580 - [c18]Dietmar Fey, Marc Reichenbach, Christopher Söll, Mehrdad Biglari, Jürgen Röber, Robert Weigel:
Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits. MEMSYS 2016: 442-454 - [c17]Tobias Lieske, Marc Reichenbach, Burkhard Ringlein, Dietmar Fey:
Dataflow optimization for programmable embedded image preprocessing accelerators. ReConFig 2016: 1-8 - [c16]Steffen Vaas, Marc Reichenbach, Ulrich Margull, Dietmar Fey:
The R2-D2 toolchain - Automated porting of safety-critical applications to FPGAs. ReConFig 2016: 1-7 - [c15]Konrad Häublein, Marc Reichenbach, Oliver Reiche, M. Akif Ozkan, Dietmar Fey, Frank Hannig, Jürgen Teich:
Hybrid code description for developing fast and resource efficient image processing architectures. SAMOS 2016: 211-218 - 2015
- [j3]Oliver Reiche, Konrad Häublein, Marc Reichenbach, Moritz Schmid, Frank Hannig, Jürgen Teich, Dietmar Fey:
Synthesis and optimization of image processing accelerators using domain knowledge. J. Syst. Archit. 61(10): 646-658 (2015) - [c14]Marc Reichenbach, Maximilian Kasparek, Mohammad Alawieh, Konrad Häublein, Dietmar Fey:
Real-time correlation for locating systems utilizing heterogeneous computing architectures. DASIP 2015: 1-8 - [c13]Christian Herglotz, Jürgen Seiler, André Kaup, Arne Hendricks, Marc Reichenbach, Dietmar Fey:
Estimation of Non-functional Properties for Embedded Hardware with Application to Image Processing. IPDPS Workshops 2015: 190-195 - [c12]Marc Reichenbach, Tobias Lieske, Steffen Vaas, Konrad Häublein, Dietmar Fey:
FAUPU - A design framework for the development of programmable image processing architectures. ReConFig 2015: 1-8 - [c11]Marc Reichenbach, Benjamin Pfundt, Dietmar Fey:
Framework for parameter analysis of FPGA-based image processing architectures. SAMOS 2015: 96-102 - [c10]Bruno Kleinert, Gholam Reza Rahimi, Marc Reichenbach, Dietmar Fey:
Hardware-software co-simulation for medical x-ray control units. SimuTools 2015: 305-307 - [i2]Oliver Reiche, Konrad Häublein, Marc Reichenbach, Frank Hannig, Jürgen Teich, Dietmar Fey:
Automatic Optimization of Hardware Accelerators for Image Processing. CoRR abs/1502.07448 (2015) - [i1]Christian Hartmann, Anna Yupatova, Marc Reichenbach, Dietmar Fey, Reinhard German:
A Holistic Approach for Modeling and Synthesis of Image Processing Applications for Heterogeneous Computing Architectures. CoRR abs/1502.07453 (2015) - 2014
- [j2]Marc Reichenbach, Ralf Seidler, Benjamin Pfundt, Dietmar Fey:
Fast image processing for optical metrology utilizing heterogeneous computer architectures. Comput. Electr. Eng. 40(4): 1158-1170 (2014) - [c9]Marc Reichenbach, Benjamin Pfundt, Dietmar Fey:
Designing and manufacturing of real embedded multi-core CPUs: A holistic teaching approach in computer architecture. EWME 2014: 213-218 - [c8]Konrad Häublein, Marc Reichenbach, Dietmar Fey:
Fast and generic hardware architecture for stereo block matching applications on embedded systems. ReConFig 2014: 1-6 - 2013
- [c7]Benjamin Pfundt, Marc Reichenbach, Björn M. Eskofier, Dietmar Fey:
Smart sensor architectures for embedded biosignal analysis. DASIP 2013: 174-181 - 2012
- [j1]Dietmar Fey, Marc Reichenbach, Marcus Komann, Ralf Seidler:
Realizing real-time centroid detection of multiple objects with marching pixels algorithms on programmable customizing hardware. Concurr. Comput. Pract. Exp. 24(16): 1821-1839 (2012) - [c6]Michael Schmidt, Marc Reichenbach, Dietmar Fey:
A Generic VHDL Template for 2D Stencil Code Applications on FPGAs. ISORC Workshops 2012: 180-187 - [c5]Marc Reichenbach, Ralf Seidler, Dietmar Fey:
Heterogeneous computer architectures: An image processing pipeline for optical metrology. ReConFig 2012: 1-8 - 2011
- [c4]Benjamin Pfundt, Marc Reichenbach:
Optimierung einer parallelen SIMD-Architektur für FPGA und ASIC. Informatiktage 2011: 215-218 - [c3]Marc Reichenbach, Michael Schmidt, Dietmar Fey:
Analytical Model for the Optimization of Self-Organizing Image Processing Systems Utilizing Cellular Automata. ISORC Workshops 2011: 162-171 - [p1]Marc Reichenbach, Ralf Seidler, Dietmar Fey, Benjamin Pfundt:
Generic Emergent Computing in Chip Architectures. Organic Computing 2011: 179-192 - 2010
- [c2]Dietmar Fey, Marcus Komann, Marc Reichenbach, Ralf Seidler:
Realizing Real-Time Centroid Detection of Multiple Objects with Marching Pixels Algorithms. ISORC Workshops 2010: 98-107
2000 – 2009
- 2009
- [c1]Sándor P. Fekete, Dietmar Fey, Marcus Komann, Alexander Kröller, Marc Reichenbach, Christiane Schmidt:
Distributed vision with smart pixels. SCG 2009: 257-266
Coauthor Index
[c62] [c46] [j14] [j12] [c43] [c41] [c40] [c38] [c37] [j11] [j10] [c36] [c35] [c34] [j9] [j7] [c33] [c32] [c31] [c30] [c29] [c28] [j5] [j4] [c27] [c26] [c25] [c24] [c23] [c22] [c20] [c18] [c17] [c16] [c15] [j3] [c14] [c13] [c12] [c11] [c10] [i2] [i1] [j2] [c9] [c8] [c7] [j1] [c6] [c5] [c3] [p1] [c2] [c1]
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