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ORCIDS. Simon Wong
Person information
- affiliation: Stanford University, USA
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2020 – today
- 2023
[i3]Edward H. Lee, Brendan Kelly, Emre Altinmakas, Hakan Dogan, Errol Colak, Steve Fu, Olivia Choudhury, Ujjwal Ratan, Felipe Kitamura, Hernan Chaves, Mourad Said, Eduardo Pontes Reis, Jaekwang Lim, Patricia Yokoo, Corie Mitchell, Jimmy Zheng, Maryam Mohammadzadeh, Golnaz Houshmand
, Wendy Qiu, Joel Hayden, Farnaz Rafiee, Chad Klochko, Nicholas Bevins, S. Simon Wong, Safwan Halabi, Kristen W. Yeom:
Federated Learning on Heterogenous Data using Chest CT. CoRR abs/2303.13567 (2023)- 2022
- [c15]Shengjun Qin, Maryann C. Tung, Emma Belliveau, Shuhan Liu, Jimin Kwon, Wei-Chen Chen, Zizhen Jiang, S. Simon Wong, H.-S. Philip Wong:
8-Layer 3D Vertical Ru/AlOxNy/TiN RRAM with Mega-Ω Level LRS for Low Power and Ultrahigh-density Memory. VLSI Technology and Circuits 2022: 314-315 - 2021
- [j26]Edward H. Lee, Jimmy Zheng, Errol Colak, Maryam Mohammadzadeh, Golnaz Houshmand, Nicholas Bevins, Felipe Kitamura, Emre Altinmakas, Eduardo Pontes Reis, Jae-Kwang Kim, Chad Klochko, Michelle Han, Sadegh Moradian, Ali Mohammadzadeh, Hashem Sharifian, Hassan Hashemi, Kavous Firouznia, Hossein Ghanaati, Masoumeh Gity, Hakan Dogan, Hojjat Salehinejad, Henrique Alves, Jayne Seekins, Nitamar Abdala, Çetin Atasoy, Hamidreza Pouraliakbar, Majid Maleki, S. Simon Wong, Kristen W. Yeom:
Deep COVID DeteCT: an international experience on COVID-19 lung detection and prognosis using chest CT. npj Digit. Medicine 4 (2021)
2010 – 2019
- 2017
- [j25]Edward H. Lee, S. Simon Wong:
Analysis and Design of a Passive Switched-Capacitor Matrix Multiplier for Approximate Computing. IEEE J. Solid State Circuits 52(1): 261-271 (2017) - [j24]Kibum Lee, S. Simon Wong:
Fault-Tolerant FPGA with Column-Based Redundancy and Power Gating Using RRAM. IEEE Trans. Computers 66(6): 946-956 (2017) - [c14]Edward H. Lee, Daisuke Miyashita, Elaina Chai, Boris Murmann, S. Simon Wong:
LogNet: Energy-efficient neural networks using logarithmic computation. ICASSP 2017: 5900-5904 - 2016
- [j23]Tony F. Wu, Karthik Ganesan, Yunqing Alexander Hu, H.-S. Philip Wong, S. Simon Wong, Subhasish Mitra:
TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(4): 521-534 (2016) - [c13]Edward H. Lee, S. Simon Wong:
24.2 A 2.5GHz 7.7TOPS/W switched-capacitor matrix multiplier with co-designed local memory in 40nm. ISSCC 2016: 418-419 - [c12]Kibum Lee, S. Simon Wong:
Fault-Tolerant FPGA with Column-Based Redundancy and Power Gating Using RRAM. ISVLSI 2016: 409-414 - [i2]Edward H. Lee, S. Simon Wong:
Analysis and Design of a Passive Switched-Capacitor Matrix Multiplier for Approximate Computing. CoRR abs/1612.00933 (2016) - 2015
- [j22]Chih-Wei Stanley Yeh, S. Simon Wong:
Compact One-Transistor-N-RRAM Array Architecture for Advanced CMOS Technology. IEEE J. Solid State Circuits 50(5): 1299-1309 (2015) - [j21]Zhiping Zhang, Young Yang Liauw, Chen Chen, S. Simon Wong:
Monolithic 3-D FPGAs. Proc. IEEE 103(7): 1197-1210 (2015) - [c11]Edward H. Lee, Madeleine Udell, S. Simon Wong:
Factorization for analog-to-digital matrix multiplication. ICASSP 2015: 1061-1065 - [i1]Tony F. Wu, Karthik Ganesan, Yunqing Alexander Hu, H.-S. Philip Wong, S. Simon Wong, Subhasish Mitra:
TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits. CoRR abs/1505.02211 (2015) - 2013
- [j20]Jiale Liang, Chih-Wei Stanley Yeh, S. Simon Wong, H.-S. Philip Wong:
Effect of Wordline/Bitline Scaling on the Performance, Energy Consumption, and Reliability of Cross-Point Memory Array. ACM J. Emerg. Technol. Comput. Syst. 9(1): 9:1-9:14 (2013) - [j19]Jeongha Park, Saeroonter Oh, Soyoung Kim, H.-S. Philip Wong, S. Simon Wong:
Impact of III-V and Ge Devices on Circuit Performance. IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1189-1200 (2013) - 2012
- [c10]Young Yang Liauw, Zhiping Zhang, Wanki Kim, Abbas El Gamal, S. Simon Wong:
Nonvolatile 3D-FPGA with monolithically stacked RRAM-based configuration memory. ISSCC 2012: 406-408 - 2011
- [j18]Elaine Ou, S. Simon Wong:
Array Architecture for a Nonvolatile 3-Dimensional Cross-Point Resistance-Change Memory. IEEE J. Solid State Circuits 46(9): 2158-2170 (2011) - [j17]Baoyong Chi, Kasra Omid-Zohoor, Zhihua Wang, S. Simon Wong:
A 65 nm CMOS fully-integrated dynamic reconfigurable differential power amplifier with high gain in both bands. Microelectron. J. 42(6): 855-862 (2011) - 2010
- [c9]Saeroonter Oh, Jeongha Park, S. Simon Wong, H.-S. Philip Wong:
Modeling and analysis of III-V logic FETs for devices and circuits: Sub-22nm technology III-V SRAM cell design. ISQED 2010: 342-346
2000 – 2009
- 2009
- [j16]Andrew Poon, Andrew Chang, Hirad Samavati, S. Simon Wong:
Reduction of Inductive Crosstalk Using Quadrupole Inductors. IEEE J. Solid State Circuits 44(6): 1756-1764 (2009) - [j15]Yun Bai, S. Simon Wong:
Optimization of Driver Preemphasis for On-Chip Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(9): 2033-2041 (2009) - [c8]S. Simon Wong, Abbas El Gamal:
The prospect of 3D-IC. CICC 2009: 445-448 - 2008
- [j14]Hyunwoo Nho, Sei-Seung Yoon, S. Simon Wong, Seong-Ook Jung:
Numerical Estimation of Yield in Sub-100-nm SRAM Design Using Monte Carlo Simulation. IEEE Trans. Circuits Syst. II Express Briefs 55-II(9): 907-911 (2008) - [c7]H. Henry Nho, Mark Horowitz, S. Simon Wong:
A high-speed, low-power 3D-SRAM architecture. CICC 2008: 201-204 - 2007
- [j13]Mingjie Lin, Abbas El Gamal, Yi-Chang Lu, S. Simon Wong:
Performance Benefits of Monolithically Stacked 3-D FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2): 216-229 (2007) - [j12]So-Young Kim, S. Simon Wong:
Closed-Form RC and RLC Delay Models Considering Input Rise Time. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(9): 2001-2010 (2007) - [c6]Richard Chang, David Weber, MeeLan Lee, David K. Su, Katelijn Vleugels, S. Simon Wong:
A Fully Integrated RF Front-End with Independent RX/TX Matching and +20dBm Output Power for WLAN Applications. ISSCC 2007: 564-622 - 2006
- [c5]Mingjie Lin, Abbas El Gamal, Yi-Chang Lu, S. Simon Wong:
Performance benefits of monolithically stacked 3D-FPGA. FPGA 2006: 113-122 - 2004
- [j11]Niranjan A. Talwalkar, C. Patrick Yue, Haitao Gan, S. Simon Wong:
Integrated CMOS transmit-receive switch using LC-tuned substrate bias for 2.4-GHz and 5.2-GHz applications. IEEE J. Solid State Circuits 39(6): 863-870 (2004) - 2003
- [j10]Richard Chang, Niranjan Talwalkar, C. Patrick Yue, S. Simon Wong:
Near speed-of-light signaling over on-chip electrical interconnects. IEEE J. Solid State Circuits 38(5): 834-838 (2003) - [j9]Frank O'Mahony, C. Patrick Yue, Mark A. Horowitz, S. Simon Wong:
A 10-GHz global clock distribution using coupled standing-wave oscillators. IEEE J. Solid State Circuits 38(11): 1813-1820 (2003) - [c4]Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong:
Design of a 10GHz clock distribution network using coupled standing-wave oscillators. DAC 2003: 682-687 - [c3]S. Simon Wong, C. Patrick Yue, Richard Chang, So-Young Kim, Bendik Kleveland, Frank O'Mahony:
On-Chip Interconnect Inductance - Friend or Foe (Invited). ISQED 2003: 389-394 - [c2]Soyoung Kim, Yehia Massoud, S. Simon Wong:
On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1?m Technology and Beyond. ISQED 2003: 401-404 - 2002
- [j8]Bendik Kleveland, Carlos H. Diaz, Dieter Vook, Liam Madden, Thomas H. Lee, S. Simon Wong:
Correction to "exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design". IEEE J. Solid State Circuits 37(2): 255 (2002) - [j7]Theerachet Soorapanth, S. Simon Wong:
A 0-dB IL 2140±30 MHz bandpass filter utilizing Q-enhanced spiral inductors in standard CMOS. IEEE J. Solid State Circuits 37(5): 579-586 (2002) - [j6]Bendik Kleveland, Xiaoning Qi, Liam Madden, Takeshi Furusawa, Robert W. Dutton, Mark A. Horowitz, S. Simon Wong:
High-frequency characterization of on-chip digital interconnects. IEEE J. Solid State Circuits 37(6): 716-725 (2002) - 2001
- [j5]Bendik Kleveland, Carlos H. Diaz, Dieter Vook, Liam Madden, Thomas H. Lee, S. Simon Wong:
Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design. IEEE J. Solid State Circuits 36(10): 1480-1488 (2001)
1990 – 1999
- 1999
- [j4]Masoud Zargari, Justin Leung, S. Simon Wong, Bruce A. Wooley:
A BiCMOS active substrate probe-card technology for digital testing. IEEE J. Solid State Circuits 34(8): 1118-1135 (1999) - [c1]C. Patrick Yue, S. Simon Wong:
Design Strategy of On-Chip Inductors for Highly Integrated RF Systems. DAC 1999: 982-987 - 1998
- [j3]C. Patrick Yue, S. Simon Wong:
On-chip spiral inductors with patterned ground shields for Si-based RF ICs. IEEE J. Solid State Circuits 33(5): 743-752 (1998) - 1993
- [j2]Jaehee You, S. Simon Wong:
Serial-parallel FFT array processor. IEEE Trans. Signal Process. 41(3): 1472-1476 (1993)
1980 – 1989
- 1989
- [j1]Charles G. Sodini, S. Simon Wong, Ping Keung Ko:
A framework to evaluate technology and device design enhancements for MOS integrated circuits. IEEE J. Solid State Circuits 24(1): 118-127 (1989)
Coauthor Index
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