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2010 – 2019
- 2015
[j6]Meng-Fan Chang, Shu-Meng Yang, Chia-Chen Kuo, Ting-Chin Yang, Che-Ju Yeh, Tun-Fei Chien, Li-Yue Huang, Shyh-Shyuan Sheu, Pei-Ling Tseng, Yu-Sheng Chen, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, Ming-Jer Kao:
Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications. IEEE Trans. Circuits Syst. II Express Briefs 62-II(1): 80-84 (2015)- [c4]Stefano Ambrogio, Simone Balatti, Zhongqiang Wang, Yu-Sheng Chen, Heng-Yuan Lee, Frederick T. Chen, Daniele Ielmini:
Data retention statistics and modelling in HfO2 resistive switching memories. IRPS 2015: 7 - 2014
- [j5]Meng-Fan Chang, Chia-Chen Kuo, Shyh-Shyuan Sheu, Chorng-Jung Lin, Ya-Chin King, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, Jui-Jen Wu, Yu-Der Chih:
Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme. IEEE J. Solid State Circuits 49(4): 908-916 (2014) - [c3]Wen-Pin Lin, Shyh-Shyuan Sheu, Chia-Chen Kuo, Pei-Ling Tseng, Meng-Fan Chang, Keng-Li Su, Chih-Sheng Lin, Kan-Hsueh Tsai, Sih-Han Lee, Szu-Chieh Liu, Yu-Sheng Chen, Heng-Yuan Lee, Ching-Chih Hsu, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, Ming-Jer Kao:
A nonvolatile look-up table using ReRAM for reconfigurable logic. A-SSCC 2014: 133-136 - [c2]Li-Yue Huang, Meng-Fan Chang, Ching-Hao Chuang, Chia-Chen Kuo, Chien-Fu Chen, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, Keng-Li Su, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, Ming-Jer Kao:
ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing. VLSIC 2014: 1-2 - 2013
- [j4]Meng-Fan Chang, Shyh-Shyuan Sheu, Ku-Feng Lin, Che-Wei Wu, Chia-Chen Kuo, Pi-Feng Chiu, Yih-Shan Yang, Yu-Sheng Chen, Heng-Yuan Lee, Chen-Hsin Lien
, Frederick T. Chen, Keng-Li Su, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai:
A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes. IEEE J. Solid State Circuits 48(3): 878-891 (2013) - 2012
- [j3]H.-S. Philip Wong, Heng-Yuan Lee, Shimeng Yu, Yu-Sheng Chen, Yi Wu, Pang-Shiu Chen, Byoungil Lee, Frederick T. Chen, Ming-Jinn Tsai:
Metal-Oxide RRAM. Proc. IEEE 100(6): 1951-1970 (2012) - 2011
- [j2]Frederick T. Chen, Heng-Yuan Lee, Yu-Sheng Chen, Yenya Hsu, Lijie Zhang, Pang-Shiu Chen, Weisu Chen, Peiyi Gu, Wenhsing Liu, Sumin Wang, Chen-Han Tsai, Shyh-Shyuan Sheu, Ming-Jinn Tsai, Ru Huang:
Resistance switching for RRAM applications. Sci. China Inf. Sci. 54(5): 1073-1086 (2011) - [j1]Shyh-Shyuan Sheu, Kuo-Hsing Cheng, Meng-Fan Chang, Pei-Chia Chiang, Wen-Pin Lin, Heng-Yuan Lee, Pang-Shiu Chen, Yu-Sheng Chen, Frederick T. Chen, Ming-Jinn Tsai:
Fast-Write Resistive RAM (RRAM) for Embedded Applications. IEEE Des. Test Comput. 28(1): 64-71 (2011) - [c1]Shyh-Shyuan Sheu, Meng-Fan Chang, Ku-Feng Lin, Che-Wei Wu, Yu-Sheng Chen, Pi-Feng Chiu, Chia-Chen Kuo, Yih-Shan Yang, Pei-Chia Chiang, Wen-Pin Lin, Che-He Lin, Heng-Yuan Lee, Peiyi Gu, Sumin Wang, Frederick T. Chen, Keng-Li Su, Chen-Hsin Lien, Kuo-Hsing Cheng, Hsin-Tun Wu, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai:
A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability. ISSCC 2011: 200-202
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