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ORCIDJohn P. Knight
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2000 – 2009
- 2005
[j8]Fred Ma, John P. Knight, Calvin Plett:
Physical resource binding for a coarse-grain reconfigurable array using evolutionary algorithms. IEEE Trans. Very Large Scale Integr. Syst. 13(5): 553-563 (2005)- 2004
- [c6]Fred Ma, John P. Knight, Calvin Plett:
Physical Resource Binding for a Coarse Grain Reconfigurable Array. ERSA 2004: 109-115 - 2002
- [j7]Rolando Ramírez Ortiz, John P. Knight:
Compatible cell connections for multifamily dynamic logic gates. IEEE Trans. Very Large Scale Integr. Syst. 10(3): 327-340 (2002) - 2001
- [j6]Elie Torbey, John P. Knight:
Multiclock selection and synthesis for CDFGs using optimal clock sets and genetic algorithms. IEEE Trans. Very Large Scale Integr. Syst. 9(5): 599-607 (2001)
1990 – 1999
- 1996
- [j5]Raul San Martin, John P. Knight:
Optimizing Power in ASIC Behavioral Synthesis. IEEE Des. Test Comput. 13(2): 58-70 (1996) - 1995
- [c5]Raul San Martin, John P. Knight:
Power-Profiler: Optimizing ASICs Power Consumption at the Behavioral Level. DAC 1995: 42-47 - 1993
- [j4]Raul San Martin, John P. Knight:
Operations research in the high-level synthesis of integrated circuits. Comput. Oper. Res. 20(8): 845-856 (1993) - [c4]Raul San Martin, John P. Knight:
Genetic Algorithms for the Optimization of Integrated Circuits Synthesis. ICGA 1993: 432-438
1980 – 1989
- 1989
- [j3]Pierre G. Paulin, John P. Knight:
Algorithms for high-level synthesis. IEEE Des. Test 6(6): 18-31 (1989) - [j2]Pierre G. Paulin, John P. Knight:
Force-directed scheduling for the behavioral synthesis of ASICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(6): 661-679 (1989) - [c3]Pierre G. Paulin, John P. Knight:
Scheduling and Binding Algorithms for High-Level Synthesis. DAC 1989: 1-6 - 1987
- [c2]Pierre G. Paulin, John P. Knight:
Force-Directed Scheduling in Automatic Data Path Synthesis. DAC 1987: 195-202 - 1986
- [c1]Pierre G. Paulin, John P. Knight, Emil F. Girczyc:
HAL: a multi-paradigm approach to automatic data path synthesis. DAC 1986: 263-270 - 1985
- [j1]Emil F. Girczyc, Raymond J. A. Buhr, John P. Knight:
Applicability of a Subset of Ada as an Algorithmic Hardware Description Language for Graph-Based Hardware Compilation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(2): 134-142 (1985)
Coauthor Index
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