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Majed Valad Beigi
Person information
- affiliation: Northwestern University, Department of Electrical Engineering and Computer Science
- affiliation: Shahid Beheshti University, Faculty of Electrical and Computer Engineering
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2020 – today
- 2024
- [i3]Majed Valad Beigi, Yi Cao, Sudhanva Gurumurthi, Charles Recchia, Andrew C. Walton, Vilas Sridharan:
Corrigendum to: A Systematic Study of DDR4 DRAM Faults in the Field. CoRR abs/2408.15302 (2024) - 2023
- [c12]Majed Valad Beigi, Yi Cao, Sudhanva Gurumurthi, Charles Recchia, Andrew C. Walton, Vilas Sridharan:
A Systematic Study of DDR4 DRAM Faults in the Field. HPCA 2023: 991-1002 - [c11]Gabriel H. Loh
, Michael J. Schulte
, Mike Ignatowski, Vignesh Adhinarayanan, Shaizeen Aga, Derrick Aguren, Varun Agrawal
, Ashwin M. Aji, Johnathan Alsop
, Paul T. Bauman
, Bradford M. Beckmann, Majed Valad Beigi, Sergey Blagodurov, Travis Boraten, Michael Boyer, William C. Brantley, Noel Chalmers, Shaoming Chen, Kevin Cheng, Michael L. Chu, David Cownie, Nicholas Curtis, Joris Del Pino, Nam Duong, Alexandru Dutu, Yasuko Eckert, Christopher Erb, Chip Freitag, Joseph L. Greathouse, Sudhanva Gurumurthi, Anthony Gutierrez, Khaled Hamidouche, Sachin Hossamani, Wei Huang, Mahzabeen Islam, Nuwan Jayasena, John Kalamatianos, Onur Kayiran, Jagadish Kotra, Alan Lee, Daniel Lowell, Niti Madan, Abhinandan Majumdar, Nicholas Malaya, Srilatha Manne, Susumu Mashimo, Damon McDougall
, Elliot Mednick, Michael Mishkin, Mark Nutter, Indrani Paul
, Matthew Poremba, Brandon Potter, Kishore Punniyamurthy, Sooraj Puthoor, Steven E. Raasch, Karthik Rao, Gregory Rodgers, Marko Scrbak, Mohammad Seyedzadeh, John Slice, Vilas Sridharan, René van Oostrum, Eric Van Tassell, Abhinav Vishnu, Samuel Wasmundt, Mark Wilkening, Noah Wolfe, Mark Wyse
, Adithya Yalavarti, Dmitri Yudanov:
A Research Retrospective on AMD's Exascale Computing Journey. ISCA 2023: 81:1-81:14 - 2022
- [c10]Majed Valad Beigi, Sudhanva Gurumurthi, Vilas Sridharan:
Reliability, Availability, and Serviceability Challenges for Heterogeneous System Design. IRPS 2022: 2 - 2020
- [c9]Majed Valad Beigi, Bahareh Pourshirazi, Gokhan Memik, Zhichun Zhu:
DeepSwapper: A Deep Learning Based Page Swap Management Scheme for Hybrid Memory Systems. PACT 2020: 353-354
2010 – 2019
- 2019
- [j4]Bahareh Pourshirazi, Majed Valad Beigi, Zhichun Zhu, Gokhan Memik:
Writeback-Aware LLC Management for PCM-Based Main Memory Systems. ACM Trans. Design Autom. Electr. Syst. 24(2): 18:1-18:19 (2019) - 2018
- [c8]Majed Valad Beigi, Gokhan Memik:
Thermal-aware optimizations of reRAM-based neuromorphic computing systems. DAC 2018: 39:1-39:6 - [c7]Bahareh Pourshirazi, Majed Valad Beigi, Zhichun Zhu, Gokhan Memik:
WALL: A writeback-aware LLC management for PCM-based main memory systems. DATE 2018: 449-454 - [c6]Majed Valad Beigi, Gokhan Memik:
THOR: THermal-aware Optimizations for extending ReRAM Lifetime. IPDPS 2018: 670-679 - 2016
- [c5]Majed Valad Beigi, Gokhan Memik:
TESLA: Using microfluidics to thermally stabilize 3D stacked STT-RAM caches. ICCD 2016: 344-347 - [c4]Majed Valad Beigi, Gokhan Memik:
Therma: Thermal-aware Run-time Thread Migration for Nanophotonic Interconnects. ISLPED 2016: 230-235 - [c3]Majed Valad Beigi, Gokhan Memik:
TAPAS: Temperature-aware Adaptive Placement for 3D Stacked Hybrid Caches. MEMSYS 2016: 415-426 - 2014
- [j3]Majed ValadBeigi
, Farshad Safaei, Bahareh Pourshirazi:
Application-aware virtual paths insertion for NOCs. Microelectron. J. 45(4): 454-462 (2014) - [c2]Majed Valad Beigi, Gokhan Memik:
MIN: a power efficient mechanism to mitigate the impact of process variations on nanophotonic networks. ISLPED 2014: 299-302 - 2013
- [c1]Majed ValadBeigi, Farshad Safaei, Bahareh Pourshirazi:
An Energy-Efficient Reconfigurable NoC Architecture with RF-Interconnects. DSD 2013: 489-496 - [i2]Farshad Safaei, Majed ValadBeigi:
A Probabilistic Approach to Analysis of Reliability in n-D Meshes with Interconnect Router Failures. CoRR abs/1301.5993 (2013) - 2012
- [j2]Farshad Safaei, Majed ValadBeigi:
An efficient routing methodology to tolerate static and dynamic faults in 2-D mesh networks-on-chip. Microprocess. Microsystems 36(7): 531-542 (2012) - [j1]Majed ValadBeigi, Farshad Safaei:
PDR: A protocol for dynamic network reconfiguration based on deadlock recovery scheme. Simul. Model. Pract. Theory 24: 59-70 (2012) - [i1]Majed ValadBeigi, Farshad Safaei, Bahareh Pourshirazi:
DBR: A Simple, Fast and Efficient Dynamic Network Reconfiguration Mechanism Based on Deadlock Recovery Scheme. CoRR abs/1211.5747 (2012)
Coauthor Index
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