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Berkin Akin
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2020 – today
- 2024
- [i10]Danfeng Qin, Chas Leichner, Manolis Delakis, Marco Fornoni, Shixin Luo, Fan Yang, Weijun Wang, Colby R. Banbury, Chengxi Ye, Berkin Akin, Vaibhav Aggarwal, Tenghui Zhu, Daniele Moro, Andrew Howard:
MobileNetV4 - Universal Models for the Mobile Ecosystem. CoRR abs/2404.10518 (2024) - 2022
- [c19]Berkin Akin, Suyog Gupta, Yun Long, Anton Spiridonov, Zhuo Wang, Marie White, Hao Xu, Ping Zhou, Yanqi Zhou:
Searching for Efficient Neural Architectures for On-Device ML on Edge TPUs. CVPR Workshops 2022: 2666-2675 - [c18]Kiran Seshadri, Berkin Akin, James Laudon, Ravi Narayanaswami, Amir Yazdanbakhsh:
An Evaluation of Edge TPU Accelerators for Convolutional Neural Networks. IISWC 2022: 79-91 - [c17]Yanqi Zhou, Xuanyi Dong, Tianjian Meng, Mingxing Tan, Berkin Akin, Daiyi Peng, Amir Yazdanbakhsh, Da Huang, Ravi Narayanaswami, James Laudon:
Towards the Co-design of Neural Networks and Accelerators. MLSys 2022 - [i9]Berkin Akin, Suyog Gupta, Yun Long, Anton Spiridonov, Zhuo Wang, Marie White, Hao Xu, Ping Zhou, Yanqi Zhou:
Searching for Efficient Neural Architectures for On-Device ML on Edge TPUs. CoRR abs/2204.14007 (2022) - 2021
- [c16]Amirali Boroumand, Saugata Ghose, Berkin Akin, Ravi Narayanaswami, Geraldo F. Oliveira, Xiaoyu Ma, Eric Shiu, Onur Mutlu:
Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks. PACT 2021: 159-172 - [c15]Grace Chu, Okan Arikan, Gabriel Bender, Weijun Wang, Achille Brighton, Pieter-Jan Kindermans, Hanxiao Liu, Berkin Akin, Suyog Gupta, Andrew Howard:
Discovering Multi-Hardware Mobile Models via Architecture Search. CVPR Workshops 2021: 3022-3031 - [c14]Yunyang Xiong, Hanxiao Liu, Suyog Gupta, Berkin Akin, Gabriel Bender, Yongzhe Wang, Pieter-Jan Kindermans, Mingxing Tan, Vikas Singh, Bo Chen:
MobileDets: Searching for Object Detection Architectures for Mobile Accelerators. CVPR 2021: 3825-3834 - [i8]Amir Yazdanbakhsh, Christof Angermüller, Berkin Akin, Yanqi Zhou, Albin Jones, Milad Hashemi, Kevin Swersky, Satrajit Chatterjee, Ravi Narayanaswami, James Laudon:
Apollo: Transferable Architecture Exploration. CoRR abs/2102.01723 (2021) - [i7]Yanqi Zhou, Xuanyi Dong, Berkin Akin, Mingxing Tan, Daiyi Peng, Tianjian Meng, Amir Yazdanbakhsh, Da Huang, Ravi Narayanaswami, James Laudon:
Rethinking Co-design of Neural Architectures and Hardware Accelerators. CoRR abs/2102.08619 (2021) - [i6]Amir Yazdanbakhsh, Kiran Seshadri, Berkin Akin, James Laudon, Ravi Narayanaswami:
An Evaluation of Edge TPU Accelerators for Convolutional Neural Networks. CoRR abs/2102.10423 (2021) - [i5]Amirali Boroumand, Saugata Ghose, Berkin Akin, Ravi Narayanaswami, Geraldo F. Oliveira, Xiaoyu Ma, Eric Shiu, Onur Mutlu:
Mitigating Edge Machine Learning Inference Bottlenecks: An Empirical Study on Accelerating Google Edge Models. CoRR abs/2103.00768 (2021) - [i4]Amirali Boroumand, Saugata Ghose, Berkin Akin, Ravi Narayanaswami, Geraldo F. Oliveira, Xiaoyu Ma, Eric Shiu, Onur Mutlu:
Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks. CoRR abs/2109.14320 (2021) - 2020
- [i3]Suyog Gupta, Berkin Akin:
Accelerator-aware Neural Network Design using AutoML. CoRR abs/2003.02838 (2020) - [i2]Yunyang Xiong, Hanxiao Liu, Suyog Gupta, Berkin Akin, Gabriel Bender, Pieter-Jan Kindermans, Mingxing Tan, Vikas Singh, Bo Chen:
MobileDets: Searching for Object Detection Architectures for Mobile Accelerators. CoRR abs/2004.14525 (2020) - [i1]Grace Chu, Okan Arikan, Gabriel Bender, Weijun Wang, Achille Brighton, Pieter-Jan Kindermans, Hanxiao Liu, Berkin Akin, Suyog Gupta, Andrew Howard:
Discovering Multi-Hardware Mobile Models via Architecture Search. CoRR abs/2008.08178 (2020)
2010 – 2019
- 2019
- [j3]Berkin Akin, Alaa R. Alameldeen:
A Case For Asymmetric Processing in Memory. IEEE Comput. Archit. Lett. 18(1): 22-25 (2019) - [c13]Zeshan Chishti, Berkin Akin:
Memory system characterization of deep learning workloads. MEMSYS 2019: 497-505 - [c12]Berkin Akin, Zeshan A. Chishti, Alaa R. Alameldeen:
ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions. MICRO 2019: 126-138 - 2018
- [c11]Christopher Schmidt, Markus Dreseler, Berkin Akin, Amithaba Roy:
A case for hardware-supported sub-cache line accesses. DaMoN 2018: 2:1-2:3 - [c10]Berkin Akin, Chiachen Chou, Jongsoo Park, Christopher J. Hughes, Rajat Agarwal:
Dynamic fine-grained sparse memory accesses. MEMSYS 2018: 85-97 - 2016
- [j2]Berkin Akin, Franz Franchetti, James C. Hoe:
HAMLeT Architecture for Parallel Data Reorganization in Memory. IEEE Micro 36(1): 14-23 (2016) - [j1]Berkin Akin, Franz Franchetti, James C. Hoe:
FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation. J. Signal Process. Syst. 85(1): 67-82 (2016) - 2015
- [c9]Berkin Akin, Franz Franchetti, James C. Hoe:
Data reorganization in memory using 3D-stacked DRAM. ISCA 2015: 131-143 - [c8]Qi Guo, Tze Meng Low, Nikolaos Alachiotis, Berkin Akin, Larry T. Pileggi, James C. Hoe, Franz Franchetti:
Enabling portable energy efficiency with memory accelerated library. MICRO 2015: 750-761 - 2014
- [c7]Berkin Akin, Franz Franchetti, James C. Hoe:
Understanding the design space of DRAM-optimized hardware FFT accelerators. ASAP 2014: 248-255 - [c6]Berkin Akin, James C. Hoe, Franz Franchetti:
HAMLeT: Hardware accelerated memory layout transform within 3D-stacked DRAM. HPEC 2014: 1-6 - [c5]Fazle Sadi, Berkin Akin, Doru-Thom Popovici, James C. Hoe, Larry T. Pileggi, Franz Franchetti:
Algorithm/hardware co-optimized SAR image reconstruction with 3D-stacked logic in memory. HPEC 2014: 1-6 - [c4]Berkin Akin, Franz Franchetti, James C. Hoe:
FFTS with near-optimal memory access through block data layouts. ICASSP 2014: 3898-3902 - 2013
- [c3]Qiuling Zhu, Berkin Akin, Huseyin Ekin Sumbul, Fazle Sadi, James C. Hoe, Larry T. Pileggi, Franz Franchetti:
A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing. 3DIC 2013: 1-7 - 2012
- [c2]Berkin Akin, Peter A. Milder, Franz Franchetti, James C. Hoe:
Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes. FCCM 2012: 188-191 - [c1]Berkin Akin, Peter A. Milder, Franz Franchetti, James C. Hoe:
Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only). FPGA 2012: 271
Coauthor Index
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last updated on 2024-10-07 22:07 CEST by the dblp team
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