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2010 – 2019
- 2014
[j4]Ashish Kumar Singh, Ku He, Constantine Caramanis
, Michael Orshansky:
Modeling and Optimization Techniques for Yield-Aware SRAM Post-Silicon Tuning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(8): 1159-1167 (2014)- 2013
- [j3]Ku He, Andreas Gerstlauer, Michael Orshansky:
Circuit-Level Timing-Error Acceptance for Design of Energy-Efficient DCT/IDCT-Based Systems. IEEE Trans. Circuits Syst. Video Technol. 23(6): 961-974 (2013) - [c9]Ku He, Andreas Gerstlauer, Michael Orshansky:
Low-energy digital filter design based on controlled timing error acceptance. ISQED 2013: 151-157 - 2012
- [c8]Jin Miao, Ku He, Andreas Gerstlauer, Michael Orshansky:
Modeling and synthesis of quality-energy optimal approximate adders. ICCAD 2012: 728-735 - [c7]Ku He, Andreas Gerstlauer, Michael Orshansky:
Low-energy signal processing using circuit-level timing-error acceptance. ICICDT 2012: 1-4 - 2011
- [j2]Yu Wang, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie:
Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation. IEEE Trans. Dependable Secur. Comput. 8(5): 756-769 (2011) - [c6]Ku He, Andreas Gerstlauer, Michael Orshansky:
Controlled timing-error acceptance for low energy IDCT design. DATE 2011: 758-763
2000 – 2009
- 2009
- [c5]Ashish Kumar Singh, Ku He, Constantine Caramanis, Michael Orshansky:
Mitigation of intra-array SRAM variability using adaptive voltage architecture. ICCAD 2009: 637-644 - 2008
- [j1]Yu Wang, Ku He, Rong Luo, Hui Wang, Huazhong Yang:
Two-Phase Fine-Grain Sleep Transistor Insertion Technique in Leakage Critical Circuits. IEEE Trans. Very Large Scale Integr. Syst. 16(9): 1101-1113 (2008) - 2007
- [c4]Yu Wang, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie:
Temperature-aware NBTI modeling and the impact of input vector control on performance degradation. DATE 2007: 546-551 - [c3]Ku He, Rong Luo, Yu Wang:
A power gating scheme for ground bounce reduction during mode transition. ICCD 2007: 388-394 - [c2]Hong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie:
Modeling of PMOS NBTI Effect Considering Temperature Variation. ISQED 2007: 139-144 - [c1]Hong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie:
A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect. PATMOS 2007: 160-170
Coauthor Index
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