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2020 – today
- 2024
[c26]Benjamin Brock
, Robert Cohn, Suyash Bakshi, Tuomas Karna, Jeongnim Kim, Mateusz Nowak, Lukasz Slusarczyk, Kacper Stefanski, Timothy G. Mattson:
Distributed Ranges: A Model for Distributed Data Structures, Algorithms, and Views. ICS 2024: 236-246- [i2]Benjamin Brock, Robert Cohn, Suyash Bakshi, Tuomas Karna, Jeongnim Kim, Mateusz Nowak, Lukasz Slusarczyk, Kacper Stefanski, Timothy G. Mattson:
Distributed Ranges: A Model for Distributed Data Structures, Algorithms, and Views. CoRR abs/2406.00158 (2024)
2010 – 2019
- 2016
- [c25]Nadav Chachmon, Daniel Richins, Robert S. Cohn, Magnus Christensson, Wenzhi Cui, Vijay Janapa Reddi:
Simulation and Analysis Engine for Scale-Out Workloads. ICS 2016: 22:1-22:13 - 2014
- [c24]Robert Cohn, Satinder Singh, Edmund H. Durfee:
Characterizing EVOI-Sufficient k-Response Query Sets in Decision Problems. AISTATS 2014: 131-139 - 2011
- [c23]Robert Cohn, Edmund H. Durfee, Satinder Singh:
Comparing Action-Query Strategies in Semi-Autonomous Agents. AAAI 2011: 1102-1107 - [c22]Robert Cohn, Edmund H. Durfee, Satinder Singh:
Comparing action-query strategies in semi-autonomous agents. AAMAS 2011: 1287-1288 - [c21]Svilen Kanev, Robert Cohn:
Portable trace compression through instruction interpretation. ISPASS 2011: 107-116 - 2010
- [j7]Moshe Bach, Mark Charney, Robert Cohn, Elena Demikhovsky, Tevi Devor, Kim M. Hazelwood, Aamer Jaleel, Chi-Keung Luk, Gail Lyons, Harish Patil, Ady Tal:
Analyzing Parallel Programs with Pin. Computer 43(3): 34-41 (2010) - [c20]Robert Cohn, Michael Maxim, Edmund H. Durfee, Satinder Singh:
Selecting Operator Queries Using Expected Myopic Gain. IAT 2010: 40-47 - [c19]Alex Skaletsky, Tevi Devor, Nadav Chachmon, Robert S. Cohn, Kim M. Hazelwood, Vladimir Vladimirov, Moshe Bach:
Dynamic program analysis of Microsoft Windows applications. ISPASS 2010: 2-12
2000 – 2009
- 2009
- [j6]Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn:
Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction Using Conditional Branch Prediction Hardware. IEEE Trans. Computers 58(9): 1153-1170 (2009) - [c18]Kim M. Hazelwood, Greg Lueck, Robert Cohn:
Scalable support for multithreaded applications on dynamic binary instrumentation systems. ISMM 2009: 20-29 - 2008
- [i1]Erik R. Altman, Bruce R. Childers, Robert S. Cohn, Jack W. Davidson, Koen De Bosschere, Bjorn De Sutter, M. Anton Ertl, Michael Franz, Yuan Xiang Gu, Matthias Hauswirth, Thomas Heinz, Wei-Chung Hsu, Jens Knoop, Andreas Krall, Naveen Kumar, Jonas Maebe, Robert Muth, Xavier Rival, Erven Rohou, Roni Rosner, Mary Lou Soffa, Jens Tröger, Christopher A. Vick:
08441 Final Report - Emerging Uses and Paradigms for Dynamic Binary Translation. Emerging Uses and Paradigms for Dynamic Binary Translation 2008 - 2007
- [c17]Vijay Janapa Reddi, Dan Connors, Robert Cohn, Michael D. Smith:
Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications. CGO 2007: 74-88 - [c16]Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn:
VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization. ISCA 2007: 424-435 - 2006
- [c15]Kim M. Hazelwood, Robert S. Cohn:
A Cross-Architectural Interface for Code Cache Manipulation. CGO 2006: 17-27 - [c14]Satish Narayanasamy, Cristiano Pereira, Harish Patil, Robert Cohn, Brad Calder:
Automatic logging of operating system effects to guide application-level architecture simulation. SIGMETRICS/Performance 2006: 216-227 - 2005
- [j5]David R. Kaeli, Robert Cohn:
Introduction to the special issue. SIGARCH Comput. Archit. News 33(5): 1-2 (2005) - [j4]Heidi Pan, Krste Asanovic, Robert Cohn, Chi-Keung Luk:
Controlling program execution through binary instrumentation. SIGARCH Comput. Archit. News 33(5): 45-50 (2005) - [j3]Vijay Janapa Reddi, Dan Connors, Robert S. Cohn:
Persistence in dynamic code transformation systems. SIGARCH Comput. Archit. News 33(5): 69-74 (2005) - [c13]Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood:
Pin: building customized program analysis tools with dynamic instrumentation. PLDI 2005: 190-200 - 2004
- [c12]Chi-Keung Luk, Robert Muth, Harish Patil, Robert S. Cohn, P. Geoffrey Lowney:
Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture. CGO 2004: 15-26 - [c11]Harish Patil, Robert S. Cohn, Mark Charney, Rajiv Kapoor, Andrew Sun, Anand Karunanidhi:
Pinpointing Representative Portions of Large Intel® Itanium® Programs with Dynamic Instrumentation. MICRO 2004: 81-92 - [c10]Vijay Janapa Reddi, Alex Settle, Daniel A. Connors, Robert S. Cohn:
PIN: a binary instrumentation tool for computer architecture research and education. WCAE 2004: 22 - 2002
- [c9]Chi-Keung Luk, Robert Muth, Harish Patil, Richard Weiss, P. Geoffrey Lowney, Robert S. Cohn:
Profile-guided post-link stride prefetching. ICS 2002: 167-178 - 2001
- [c8]Alex Ramírez, Luiz André Barroso, Kourosh Gharachorloo, Robert S. Cohn, Josep Lluís Larriba-Pey, P. Geoffrey Lowney, Mateo Valero:
Code layout optimizations for transaction processing workloads. ISCA 2001: 155-164 - 2000
- [j2]Robert S. Cohn, P. Geoffrey Lowney:
Design and Analysis of Profile-Based Optimization in Compaq's Compilation Tools for Alpha. J. Instr. Level Parallelism 2 (2000)
1990 – 1999
- 1998
- [j1]Robert S. Cohn, David W. Goodwin, P. Geoffrey Lowney:
Optimizing Alpha Executables on Windows NT with Spike. Digit. Tech. J. 9(4) (1998) - 1996
- [c7]Robert S. Cohn, P. Geoffrey Lowney:
Hot Cold Optimization of Large Windows/NT Applications. MICRO 1996: 80-89 - 1991
- [c6]Robert Cohn:
Source Level Debugging of Automatically Parallelized Code. Workshop on Parallel and Distributed Debugging 1991: 132-143 - 1990
- [c5]Shekhar Borkar, Robert Cohn, George W. Cox, Thomas R. Gross, H. T. Kung, Monica Lam, Margie Levine, Brian Moore, Wire Moore, Craig Peterson, Jim Susman, Jim Sutton, John Urbanski, Jon A. Webb:
Supporting Systolic and Memory Communciation in iWarp. ISCA 1990: 70-81
1980 – 1989
- 1989
- [c4]Robert Cohn, Thomas R. Gross, Monica Lam, P. S. Tseng:
Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor. ASPLOS 1989: 2-14 - 1988
- [c3]Shekhar Borkar, Robert Cohn, George W. Cox, Sha Gleason, Thomas R. Gross:
Warp: an integrated solution of high-speed parallel computing. SC 1988: 330-339 - 1987
- [c2]Marco Annaratone, Emmanuel A. Arnould, Robert Cohn, Thomas R. Gross, H. T. Kung, Monica S. Lam, Onat Menzilcioglu, Ken Sarocky, John Senko, Jon A. Webb:
Architecture of Warp. COMPCON 1987: 264-267 - [c1]Bernd Bruegge, Chang-Hsin Chang, Robert Cohn, Thomas R. Gross, Monica S. Lam, Peter Lieu, Abu Noaman, David Yam:
Programming Warp. COMPCON 1987: 268-271
Coauthor Index
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