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ORCIDManolis Katevenis
Manolis G. H. Katevenis
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- affiliation: Foundation for Research & Technology - Hellas, Greece
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2020 – today
- 2024
[j25]María Engracia Gómez
, Julio Sahuquillo, Andrea Biagioni, Nikos Chrysos, Damien Berton, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Matteo Turisini, Piero Vicini, Roberto Ammendola, Carlotta Chiarini, Chiara De Luca, Fabrizio Capuani, Adrián Castelló, Jose Duro, Eugenio Stabile, Enrique S. Quintana-Ortí, Pascale Bernier-Bruna, Claire Chen, Pierre-Axel Lagadec, Gregoire Pichon, Etienne Walter, Manolis Katevenis, Sokratis Bartzis, Orestis Mousouros, Pantelis Xirouchakis, Vangelis Mageiropoulos, Michalis Gianioudis, Harisis Loukas, Aggelos Ioannou, Nikos Kallimanis, Miguel Sánchez de la Rosa, Gabriel Gomez-Lopez, Francisco Alfaro-Cortés, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Quiles, José L. Sánchez, Gaetan De Gassowski, Matthieu Hautreaux, Stephane Mathieu, Gilles Moreau, Marc Pérache, Hugo Taboada, Torsten Hoefler, Timo Schneider, Matteo Barnaba, Giuseppe Piero Brandino, Francesco De Giorgi, Matteo Poggi, Iakovos Mavroidis, Yannis Papaefstathiou, Nikolaos Tampouratzis, Benjamin Kalisch, Ulrich Krackhardt, Mondrian Nuessle, Wolfgang Frings, Dominik Gottwald, Felime Guimaraes, Max Holicki, Volker Marx, Yannik Müller, Carsten Clauss, Hugo Falter, Xu Huang, Jennifer Lopez Barillao, Thomas Moschny, Simon Pickartz:
RED-SEA Project: Towards a new-generation European interconnect. Microprocess. Microsystems 110: 105102 (2024)- [c47]Michalis Gianioudis, Pantelis Xirouchakis, Charisios Loukas, Evangelos Mageiropoulos, Orestis Mousouros, Sokratis Mpartzis, Aggelos Ioannou, Vassilis Papaefstathiou, Manolis Katevenis, Nikolaos Chrysos:
Low-latency Communication in RISC-V Clusters. HPC Asia 2024: 73-83 - 2023
- [i2]Manolis Ploumidis, Fabien Chaix, Nikolaos Chrysos, Marios Asiminakis, Vassilis Flouris, Nikolaos D. Kallimanis, Nikolaos Kossifidis, Michael Nikoloudakis, Polydoros Petrakis, Nikolaos Dimou, Michalis Gianioudis, Georgios Ieronymakis, Aggelos Ioannou, George Kalokerinos, Pantelis Xirouchakis, Georgios Ailamakis, Astrinos Damianakis, Michael Ligerakis, Ioannis Makris, Theocharis Vavouris, Manolis Katevenis, Vassilis Papaefstathiou, Manolis Marazakis, Iakovos Mavroidis:
The ExaNeSt Prototype: Evaluation of Efficient HPC Communication Hardware in an ARM-based Multi-FPGA Rack. CoRR abs/2307.09371 (2023) - 2022
- [j24]Antonis Psistakis, Nikos Chrysos, Fabien Chaix, Marios Asiminakis, Michalis Gianioudis, Pantelis Xirouchakis, Vassilis Papaefstathiou, Manolis Katevenis:
Optimized Page Fault Handling During RDMA. IEEE Trans. Parallel Distributed Syst. 33(10): 3990-4005 (2022) - [c46]Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Matteo Turisini, Piero Vicini, Roberto Ammendola, Pascale Bernier-Bruna, Claire Chen, Said Derradji, Stéphane Guez, Pierre-Axel Lagadec, Gregoire Pichon, Etienne Walter, Gaetan De Gassowski, Matthieu Hautreaux, Stephane Mathieu, Gilles Moreau, Marc Pérache, Hugo Taboada, Torsten Hoefler, Timo Schneider, Matteo Barnaba, Giuseppe Piero Brandino, Francesco De Giorgi, Matteo Poggi, Iakovos Mavroidis, Yannis Papaefstathiou, Nikolaos Tampouratzis, Benjamin Kalisch, Ulrich Krackhardt, Mondrian Nuessle, Pantelis Xirouchakis, Vangelis Mageiropoulos, Michalis Gianioudis, Harisis Loukas, Aggelos Ioannou, Nikos Kallimanis, Nikos Chrysos, Manolis Katevenis, Wolfgang Frings, Dominik Gottwald, Felime Guimaraes, Max Holicki, Volker Marx, Yannik Müller, Carsten Clauss, Hugo Falter, Xu Huang, Jennifer Lopez Barillao, Thomas Moschny, Simon Pickartz, Francisco J. Alfaro, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Quiles, José L. Sánchez, Adrián Castelló, Jose Duro, María Engracia Gómez, Enrique S. Quintana-Ortí, Julio Sahuquillo, Eugenio Stabile:
RED-SEA: Network Solution for Exascale Architectures. DSD 2022: 712-719 - 2021
- [c45]Evangelos Mageiropoulos, Nikolaos Chrysos, Nikolaos Dimou, Manolis Katevenis:
Using hls4ml to Map Convolutional Neural Networks on Interconnected FPGA Devices. FCCM 2021: 277 - 2020
- [c44]Antonis Psistakis, Nikos Chrysos, Fabien Chaix, Marios Asiminakis, Michalis Giannioudis, Pantelis Xirouchakis, Vassilis Papaefstathiou, Manolis Katevenis:
PART: Pinning Avoidance in RDMA Technologies. NOCS 2020: 1-8
2010 – 2019
- 2019
- [j23]George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Xiaojun Yang, Dionisios N. Pnevmatikatos, Manolis Katevenis:
Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability. Trans. High Perform. Embed. Archit. Compil. 5: 100-120 (2019) - [c43]Giuliano Taffoni, Manolis Katevenis, Renato Panchieri, Gino Perna, Luca Tornatore, David Goz, Antonio Ragagnin, Sara Bertocco, Igor Coretti, Manolis Marazakis, Fabien Chaix, Manolis Ploumidis:
Towards Exascale: Measuring the Energy Footprint of Astrophysics HPC Simulations. eScience 2019: 403-412 - [c42]George Pitsis, Grigorios Tsagkatakis, Christos Kozanitis, Ioannis Kalomoiris, Aggelos Ioannou, Apostolos Dollas, Manolis G. H. Katevenis, Panagiotis Tsakalides:
Efficient Convolutional Neural Network Weight Compression for Space Data Classification on Multi-fpga Platforms. ICASSP 2019: 3917-3921 - [c41]Fabien Chaix, Georgios Ailamakis, Theocharis Vavouris, Astrinos Damianakis, Manolis Katevenis, Iakovos Mavroidis, Aggelos Ioannou, Nikolaos Kossifidis, Nikolaos Dimou, Giorgos Ieronymakis, Manolis Marazakis, Vassilis Papaefstathiou, Vassilis Flouris, Mihailis Ligerakis:
Implementation and Impact of an Ultra-Compact Multi-FPGA Board for Large System Prototyping. H2RC@SC 2019: 34-41 - [c40]Manolis Ploumidis, Nikolaos D. Kallimanis, Marios Asiminakis, Nikos Chrysos, Pantelis Xirouchakis, Michalis Gianoudis, Leandros Tzanakis, Nikolaos Dimou, Antonis Psistakis, Panagiotis Peristerakis, Giorgos Kalokairinos, Vassilis Papaefstathiou, Manolis Katevenis:
Software and Hardware Co-design for Low-Power HPC Platforms. ISC Workshops 2019: 88-100 - [i1]Giuliano Taffoni, Giuseppe Murante, Luca Tornatore, David Goz, Stefano Borgani, Manolis Katevenis, Nikolaos Chrysos, Manolis Marazakis:
Shall numerical astrophysics step into the era of Exascale computing? CoRR abs/1904.11720 (2019) - 2018
- [j22]Manolis Katevenis, Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Bernd Lietzow, Martin L. Kersten:
Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development. Microprocess. Microsystems 61: 58-71 (2018) - [c39]Dimitris Giannopoulos, Nikos Chrysos, Evangelos Mageiropoulos, Giannis Vardas, Leandros Tzanakis, Manolis Katevenis:
Accurate Congestion Control for RDMA Transfers. NOCS 2018: 3:1-3:8 - 2017
- [c38]Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Nikolaos Chrysos, Manolis Katevenis:
The Next Generation of Exascale-Class Systems: The ExaNeSt Project. DSD 2017: 510-515 - [c37]Evangelos Vasilakis, Ioannis Sourdis, Vassilis Papaefstathiou, Antonis Psathakis, Manolis G. H. Katevenis:
Modeling energy-performance tradeoffs in ARM big.LITTLE architectures. PATMOS 2017: 1-8 - 2016
- [j21]Nikolaos Chrysos, Lydia Y. Chen, Christoforos Kachris, Manolis Katevenis:
Discharging the Network From Its Flow Control Headaches: Packet Drops and HOL Blocking. IEEE/ACM Trans. Netw. 24(1): 15-28 (2016) - [c36]Manolis Katevenis, Nikolaos Chrysos, Manolis Marazakis, Iakovos Mavroidis, Fabien Chaix, Nikolaos D. Kallimanis, Javier Navaridas, John Goodacre, Piero Vicini, Andrea Biagioni, Pier Stanislao Paolucci, Alessandro Lonardo, Elena Pastorelli, Francesca Lo Cicero, Roberto Ammendola, P. Hopton, P. Coates, Giuliano Taffoni, Stefano Cozzini, Martin L. Kersten, Y. Zhang, Julio Sahuquillo, Sergio Lechago, C. Pinto, Bernd Lietzow, D. Everett, Gino Perna:
The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems. DSD 2016: 60-67 - 2015
- [j20]Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos:
The Combined Input-Output Queued Crossbar Architecture for High-Radix On-Chip Switches. IEEE Micro 35(6): 38-47 (2015) - [c35]Antonis Psathakis, Vassilis Papaefstathiou, Nikolaos Chrysos, Fabien Chaix, Evangelos Vasilakis, Dionisios N. Pnevmatikatos, Manolis Katevenis:
A Systematic Evaluation of Emerging Mesh-like CMP NoCs. ANCS 2015: 159-170 - 2014
- [j19]Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Iakovos Mavroidis, Manolis Katevenis, Dionisios N. Pnevmatikatos, Dimitrios S. Nikolopoulos:
FPGA prototyping of emerging manycore architectures for parallel programming research using Formic boards. J. Syst. Archit. 60(6): 481-493 (2014) - [c34]Yves Durand, Paul M. Carpenter, Stefano Adami, Angelos Bilas, Denis Dutoit, Alexis Farcy, Georgi Gaydadjiev, John Goodacre, Manolis Katevenis, Manolis Marazakis, Emil Matús, Iakovos Mavroidis, John Thomson:
EUROSERVER: Energy Efficient Node for European Micro-Servers. DSD 2014: 206-213 - [c33]Antonis Psathakis, Vassilis Papaefstathiou, Manolis Katevenis, Dionisios N. Pnevmatikatos:
Design trade-offs in energy efficient NoC architectures. NOCS 2014: 186-187 - [c32]Antonis Psathakis, Vassilis Papaefstathiou, Manolis Katevenis, Dionisios N. Pnevmatikatos:
Design space exploration for fair resource-allocated NoC architectures. ICSAMOS 2014: 141-148 - 2013
- [j18]Christoforos Kachris, George Nikiforos, Vassilis Papaefstathiou, Stamatis G. Kavadias, Manolis Katevenis:
NP-SARC: Scalable network processing in the SARC multi-core FPGA platform. J. Syst. Archit. 59(1): 39-47 (2013) - [c31]Vassilis Papaefstathiou, Manolis Katevenis, Dimitrios S. Nikolopoulos, Dionisios N. Pnevmatikatos:
Prefetching and cache management using task lifetimes. ICS 2013: 325-334 - 2012
- [j17]Stamatis G. Kavadias, Manolis Katevenis, Michail Zampetakis, Dimitrios S. Nikolopoulos:
Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs. Int. J. Parallel Program. 40(6): 583-604 (2012) - [j16]Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos:
Crossbar NoCs Are Scalable Beyond 100 Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 573-585 (2012) - [j15]Darío Suárez Gracia, Giorgos Dimitrakopoulos, Teresa Monreal Arnal, Manolis Katevenis, Víctor Viñals Yúfera:
LP-NUCA: Networks-in-Cache for High-Performance Low-Power Embedded Processors. IEEE Trans. Very Large Scale Integr. Syst. 20(8): 1510-1523 (2012) - [c30]Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Dimitrios Tsaliagkos, Manolis Katevenis, Dionisios N. Pnevmatikatos, Dimitrios S. Nikolopoulos:
Formic: Cost-efficient and Scalable Prototyping of Manycore Architectures. FCCM 2012: 61-64 - [e3]Utpal Banerjee, Kyle A. Gallivan, Gianfranco Bilardi, Manolis Katevenis:
International Conference on Supercomputing, ICS'12, Venice, Italy, June 25-29, 2012. ACM 2012, ISBN 978-1-4503-1316-2 [contents] - 2011
- [j14]Nikolaos Chrysos, Manolis Katevenis:
Distributed WFQ scheduling converging to weighted max-min fairness. Comput. Networks 55(3): 792-806 (2011) - [c29]Pranav Tendulkar, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Dimitrios S. Nikolopoulos, Manolis Katevenis:
Fine-grain OpenMP runtime support with explicit communication hardware primitives. DATE 2011: 891-894 - [c28]Yanping Gao, Christoforos Kachris, Manolis Katevenis:
An efficient sequential iterative matching algorithm for CIOQ switches. ISCC 2011: 558-563 - [c27]Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos:
VLSI micro-architectures for high-radix crossbar schedulers. NOCS 2011: 217-224 - [e2]Manolis Katevenis, Margaret Martonosi, Christos Kozyrakis, Olivier Temam:
High Performance Embedded Architectures and Compilers, 6th International Conference, HiPEAC 2011, Heraklion, Crete, Greece, January 24-26, 2011. Proceedings. ACM 2011, ISBN 978-1-4503-0241-8 [contents] - 2010
- [j13]Manolis Katevenis, Vassilis Papaefstathiou, Stamatis G. Kavadias, Dionisios N. Pnevmatikatos, Federico Silla, Dimitrios S. Nikolopoulos:
Explicit Communication and Synchronization in SARC. IEEE Micro 30(5): 30-41 (2010) - [c26]Nikolaos Chrysos, Lydia Y. Chen, Cyriel Minkenberg, Christoforos Kachris, Manolis Katevenis:
End-to-end congestion management for non-blocking multi-stage switching fabrics. ANCS 2010: 6 - [c25]Stamatis G. Kavadias, Manolis Katevenis, Michail Zampetakis, Dimitrios S. Nikolopoulos:
On-chip communication and synchronization mechanisms with cache-integrated network interfaces. Conf. Computing Frontiers 2010: 217-226 - [c24]Xiaojun Yang, Christoforos Kachris, Manolis Katevenis:
Efficient implementation of CIOQ switches with sequential iterative matching algorithms. FPT 2010: 433-436 - [c23]Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos:
A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6% of Their Area. NOCS 2010: 87-95 - [c22]Christoforos Kachris, George Nikiforos, Stamatis G. Kavadias, Vassilis Papaefstathiou, Manolis Katevenis:
Network Processing in Multi-core FPGAs with Integrated Cache-Network Interface. ReConFig 2010: 328-333
2000 – 2009
- 2009
- [c21]George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Manolis Katevenis, Dionisios N. Pnevmatikatos, Xiaojun Yang:
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability. ICSAMOS 2009: 149-156 - 2008
- [j12]Dimitrios Simos, Ioannis Papaefstathiou, Manolis Katevenis:
Building an FoC Using Large, Buffered Crossbar Cores. IEEE Des. Test Comput. 25(6): 538-548 (2008) - [c20]Manolis Katevenis:
Towards unified mechanisms for inter-processor communication. ICSAMOS 2008 - [e1]Per Stenström, Michel Dubois, Manolis Katevenis, Rajiv Gupta, Theo Ungerer:
High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings. Lecture Notes in Computer Science 4917, Springer 2008, ISBN 978-3-540-77559-1 [contents] - 2007
- [j11]Aggelos Ioannou, Manolis Katevenis:
Pipelined heap (priority queue) management for advanced scheduling in high-speed networks. IEEE/ACM Trans. Netw. 15(2): 450-461 (2007) - [c19]George Michelogiannakis, Dionisios N. Pnevmatikatos, Manolis Katevenis:
Approaching Ideal NoC Latency with Pre-Configured Routes. NOCS 2007: 153-162 - [c18]Vassilis Papaefstathiou, Dionisios N. Pnevmatikatos, Manolis Marazakis, Giorgos Kalokairinos, Aggelos Ioannou, Michael Papamichael, Stamatis G. Kavadias, Giorgos Mihelogiannakis, Manolis Katevenis:
Prototyping Efficient Interprocessor Communication Mechanisms. ICSAMOS 2007: 26-33 - 2006
- [c17]Nikolaos Chrysos, Manolis Katevenis:
Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics. INFOCOM 2006 - 2005
- [j10]Georgios Sapountzis, Manolis Katevenis:
Benes switching fabrics with O(N)-complexity internal backpressure. IEEE Commun. Mag. 43(1): 88-94 (2005) - [c16]Nikolaos Chrysos, Manolis Katevenis:
Scheduling in switches with small internal buffers. GLOBECOM 2005: 6 - [c15]Manolis Katevenis, Giorgos Passas:
Variable-size multipacket segments in buffered crossbar (CICQ) architectures. ICC 2005: 999-1004 - 2004
- [c14]Nikolaos Chrysos, Manolis Katevenis:
Multiple priorities in a two-lane buffered crossbar. GLOBECOM 2004: 1180-1186 - [c13]Manolis Katevenis, Giorgos Passas, Dimitrios Simos, Ioannis Papaefstathiou, Nikolaos Chrysos:
Variable packet size buffered crossbar (CICQ) switches. ICC 2004: 1090-1096 - 2002
- [j9]Evangelos P. Markatos, Dionisios N. Pnevmatikatos, Michail Flouris, Manolis Katevenis:
Web-conscious storage management for web proxies. IEEE/ACM Trans. Netw. 10(6): 735-748 (2002) - 2001
- [j8]Manolis Katevenis, Iakovos Mavroidis, Georgios Sapountzis, Evangelia Kalyvianaki, Ioannis Mavroidis, Georgios Glykopoulos:
Wormhole IP over (connectionless) ATM. IEEE/ACM Trans. Netw. 9(5): 650-661 (2001) - [c12]Aggelos Ioannou, Manolis Katevenis:
Pipelined heap (priority queue) management for advanced scheduling in high-speed networks. ICC 2001: 2043-2047 - [c11]Aggelos Nikologiannis, Manolis Katevenis:
Efficient per-flow queueing in DRAM at OC-192 line rate using out-of-order execution techniques. ICC 2001: 2048-2052
1990 – 1999
- 1999
- [j7]Manolis Katevenis, Evangelos P. Markatos, Penny Vatsolaki, Chara Xanthaki:
The Remote Enqueue Operation on Networks of Workstations. Informatica (Slovenia) 23(1) (1999) - [j6]George Kornaros, Dionisios N. Pnevmatikatos, Panagiota Vatsolaki, George Kalokerinos, Chara Xanthaki, Dimitrios Mavroidis, Dimitrios N. Serpanos, Manolis Katevenis:
ATLAS I: implementing a single-chip ATM switch with backpressure. IEEE Micro 19(1): 30-41 (1999) - [c10]Evangelos P. Markatos, Manolis Katevenis, Dionisios N. Pnevmatikatos, Michail Flouris:
Secondary Storage Management for Web Proxies. USENIX Symposium on Internet Technologies and Systems 1999 - 1998
- [j5]Manolis Katevenis, Dimitrios N. Serpanos, George Dimitriadis:
ATLAS I: a single-chip, gigabit ATM switch with HIC/HS links arid multi-lane back-pressure. Microprocess. Microsystems 21(7-8): 481-490 (1998) - [c9]Evangelos P. Markatos, Manolis Katevenis, Penny Vatsolaki:
The Remote Enqueue Operation on Networks of Workstations. CANPC 1998: 1-14 - [c8]Manolis Katevenis, Dimitrios N. Serpanos, Emmanuel Spyridakis:
Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch. HPCA 1998: 47-56 - 1997
- [j4]Manolis Katevenis, Evangelos P. Markatos, George Kalokerinos, Apostolos Dollas:
Telegraphos: A Substrate for High-Performance Computing on Workstation Clusters. J. Parallel Distributed Comput. 43(2): 94-108 (1997) - [c7]George Kornaros, Christoforos E. Kozyrakis, Panagiota Vatsolaki, Manolis Katevenis:
Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control. ARVLSI 1997: 127-144 - [c6]Manolis Katevenis, Panagiota Vatsolaki, Dimitrios N. Serpanos, Evangelos P. Markatos:
ATLAS: A Single-Chip ATM Switch for NOWs. CANPC 1997: 88-101 - [c5]Evangelos P. Markatos, Manolis Katevenis:
User-Level DMA without Operating System Kernel Modification. HPCA 1997: 322-331 - 1996
- [c4]Evangelos P. Markatos, Manolis Katevenis:
Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters. HPCA 1996: 144-153 - 1995
- [c3]Manolis Katevenis, Panagiota Vatsolaki, Aristides Efthymiou:
Pipelined Memory Shared Buffer for VLSI Switches. SIGCOMM 1995: 39-48 - 1991
- [j3]Manolis Katevenis, Stefanos Sidiropoulos, Costas Courcoubetis:
Weighted Round-Robin Cell Multiplexing in a General-Purpose ATM Switch Chip. IEEE J. Sel. Areas Commun. 9(8): 1265-1279 (1991) - [c2]Manolis Katevenis, Nestoras Tzartzanis:
Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory. ASPLOS 1991: 15-27
1980 – 1989
- 1987
- [j2]Manolis Katevenis:
Fast switching and fair control of congested flow in broadband networks. IEEE J. Sel. Areas Commun. 5(8): 1315-1326 (1987) - [c1]Andrei Vladimirescu, David Weiss, Manolis Katevenis, Zvika Bronstein, Alon Kifir, Karja Danuwidjaja, K. C. Ng, Niraj Jain, Steven Lass:
A Vector Hardware Accelerator with Circuit Simulation Emphasis. DAC 1987: 89-94 - 1982
- [j1]Daniel T. Fitzpatrick, John K. Foderaro, Manolis G. H. Katevenis, Howard A. Landman, David A. Patterson, James B. Peek, Zvi Peshkess, Carlo H. Séquin, Robert W. Sherburne, Korbin S. Van Dyke:
A RISCy approach to VLSI. SIGARCH Comput. Archit. News 10(1): 28-32 (1982)
Coauthor Index
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