"A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit ..."

Hiroki Morimura, Satoshi Shigematsu, Shinsuke Konaka (1999)

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DOI: 10.1145/313817.313829

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Hiroki Morimura, Satoshi Shigematsu, Shinsuke Konaka:
A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit configurable macrocells. ISLPED 1999: 12-17

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