"Investigation of determinant factors of minimum operating voltage of logic ..."

Tadashi Yasufuku et al. (2011)

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DOI: —

access: closed

type: Conference or Workshop Paper

metadata version: 2012-08-13

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  - electronic edition @ acm.org
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  dblp key:
  - conf/islped/YasufukuIFHNTS11
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  persistent URL:
  - https://dblp.org/rec/conf/islped/YasufukuIFHNTS11
Tadashi Yasufuku, Satoshi Iida, Hiroshi Fuketa, Koji Hirairi, Masahiro Nomura, Makoto Takamiya, Takayasu Sakurai:
Investigation of determinant factors of minimum operating voltage of logic gates in 65-nm CMOS. ISLPED 2011: 21-26

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