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Computer Science > Logic in Computer Science

arXiv:2107.02354v1 (cs)
[Submitted on 6 Jul 2021]

Title:Alethe: Towards a Generic SMT Proof Format (extended abstract)

Authors:Hans-Jörg Schurr (University of Lorraine, CNRS, Inria, and LORIA), Mathias Fleury (Johannes Kepler University Linz), Haniel Barbosa (Universidade Federal de Minas Gerais), Pascal Fontaine (University of Liège)
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Abstract:The first iteration of the proof format used by the SMT solver veriT was presented ten years ago at the first PxTP workshop. Since then the format has matured. veriT proofs are used within multiple applications, and other solvers generate proofs in the same format. We would now like to gather feedback from the community to guide future developments. Towards this, we review the history of the format, present our pragmatic approach to develop the format, and also discuss problems that might arise when other solvers use the format.
Comments: In Proceedings PxTP 2021, arXiv:2107.01544
Subjects: Logic in Computer Science (cs.LO)
ACM classes: I.2.3
Cite as: arXiv:2107.02354 [cs.LO]
  (or arXiv:2107.02354v1 [cs.LO] for this version)
  https://doi.org/10.48550/arXiv.2107.02354
Journal reference: EPTCS 336, 2021, pp. 49-54
Related DOI: https://doi.org/10.4204/EPTCS.336.6

Submission history

From: EPTCS [view email] [via EPTCS proxy]
[v1] Tue, 6 Jul 2021 02:36:15 UTC (109 KB)
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