Serial presence detect: Difference between revisions

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DDR3 SDRAM: How did I miss the colspan? Fixed.
Fix link to JEDEC standard 21-C
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The SPD EEPROM is accessed using [[SMBus]], a variant of the [[I²C]] protocol. This reduces the number of communication pins on the module to just two: a clock signal and a data signal. The EEPROM shares ground pins with the RAM, has its own power pin, and has three additional pins (SA0–2) to identify the slot, which are used to assign the EEPROM a unique address in the range 0x50–0x57. Not only can the communication lines be shared among 8 memory modules, the same SMBus is commonly used on motherboards for system health monitoring tasks such as reading power supply voltages, [[Central processing unit|CPU]] temperatures, and fan speeds.
 
(SPD EEPROMs also respond to I²C addresses 0x30–0x37 if they have not been write protected, and an extension uses addresses 0x18–0x1F to access an optional on-chip temperature sensor.<ref>[http://www.jedec.org/downloadsites/default/files/searchdocs/4_01_04R184_01_04R21.pdf JEDEC Standard 21-C section 4.1.4] "Definition of the TSE2002av Serial Presence Detect (SPD) EEPROM with Temperature Sensor (TS) for Memory Module Applications"</ref>)
 
===SDR SDRAM===