UltraSPARC T1

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Sun Microsystems' UltraSPARC T1 microprocessor, known until its 14 November 2005 announcement by its development codename "Niagara" , is a multithreading, multicore CPU. Designed to lower the energy consumption of server computers, the CPU uses typically 72 W of power at 1.2 GHz.

File:Sun UltraSPARC T1.png
Sun UltraSPARC T1 (Niagara 8 Core)

The T1 is a derivative of the UltraSPARC series of microprocessors. It is Sun's first multicore processor with multithreading. The processor is available with four, six or eight CPU cores, each core able to handle four threads concurrently. Thus the processor is capable of processing up to 32 threads concurrently.

Similar to how high-end Sun SMP systems work, the UltraSPARC T1 can be partitioned. Thus, several cores can be partitioned for running a single or group of processes and/or threads, whilst the other cores deal with the rest of the processes on the system.

Cores

The T1's cores are less complex than those of current high end processors in order to allow 8 cores to fit on the same die. The microprocessor's cores do not feature out-of-order execution, or a sizable amount of cache. A large cache is not required because the UltraSPARC T1 addresses memory latency by multithreading. Cache misses are masked by switching to another thread, so cache misses are not as significant. For a single threaded processor, cache misses are much more significant, so large caches are necessary to reduce cache misses.

The UltraSPARC T1 was designed from scratch as a multi-threaded, special-purpose processor, and thus introduces a whole new architecture for obtaining high performance. Rather than try to make each core as intelligent and optimized as they can, Sun's goal was to run as many concurrent threads as possible, and maximize utilization of each core's pipeline.

The approach appears to have worked well. Current benchmarks suggest each core in the UltraSPARC T1 is more powerful than the circa 2001, single-core, single-threaded UltraSPARC III, and executes the full SPARC v9 instruction set.

Target market

The microprocessor is unique in its abilities, and as such is targeted at a particular market. Rather than being used for high-end number-crunching and ultra-high performance applications, the chip will be targeted at network-facing high-demand servers, such as high-traffic web servers; anywhere where there is a high-number of separate threads. One of the limitations of the UltraSPARC T1 design is that a single floating point unit is shared between all 8 cores, making the T1 unsuitable for applications performing a lot of floating point mathematics. However, since the processor's intended market does not typically make much use of floating-point operations, Sun does not expect this to be a problem.

"Rock"

The UltraSPARC T1 is designed for single CPU systems only and is not capable of SMP. Future Sun CMT UltraSPARC processors, such as Rock, will support multiple chip server architectures. The Rock processor targets traditional data facing workloads such as databases. As such, it is seen as the logical follow-on to Sun's SMP processors such as UltraSPARC III.

Rock also targets floating point workloads, unlike UltraSPARC T1. Sun has publicly disclosed a feature in the Rock processor called "Hardware Scout", which uses multithreaded hardware to perform prefetching.

Rock is not a successor to UltraSPARC T1. Sun has publicly disclosed plans for a Niagara2 processor which will target the same network facing workloads as UltraSPARC T1.

Open-source

On March 21, 2006, Sun made the UltraSPARC T1 source code available under the GNU General Public License (GPL).

  • Verilog source code of the UltraSPARC T1 design;
  • Verification suite and simulation models;
  • ISA specification (UltraSPARC Architecture 2005);
  • The Solaris 10 OS simulation images.