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==Architecture==
==Architecture==


Prominent 32-bit instruction set architectures include the [[IBM System/360]], the [[Digital Equipment Corporation|DEC]] [[VAX]], the [[ARM architecture|ARM]], and the [[Intel]] [[IA-32]].
Prominent 32-bit instruction set architectures include the [[IBM System/360]], the [[Digital Equipment Corporation|DEC]] [[VAX]], the [[ARM architecture|ARM]], the [[MIPS architecture|MIPS]], and the [[Intel]] [[IA-32]].


== Images ==
== Images ==

Revision as of 16:31, 1 November 2009

In computer architecture, 32-bit integers, memory addresses, or other data units are those that are 32 bits (4 octets) wide. Also, 32-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers, address buses, or data buses of that size.

The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295 or −2,147,483,648 through 2,147,483,647 using two's complement encoding. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory.

The external address and data buses are often wider than 32 bits but both of these are stored and manipulated internally in the processor as 32-bit quantities. For example, the Pentium Pro processor is a 32-bit machine, but the external address bus is 36 bits wide, and the external data bus is 64 bits wide.[1]

Architecture

Prominent 32-bit instruction set architectures include the IBM System/360, the DEC VAX, the ARM, the MIPS, and the Intel IA-32.

Images

In digital images/pictures, 32-bit can refer to 24-bit truecolor images with an 8-bit alpha channel.

32-bit file format

A 32-bit file format is a binary file format for which each elementary information is defined on 32 bits (or 4 Bytes). An example of such a format is the Enhanced Metafile Format.

Notes

  1. ^ Gwennap, "Intel’s P6 Uses Decoupled Superscalar Design".

References

  • Gwennap, Linley (16 February 1995). "Intel’s P6 Uses Decoupled Superscalar Design". Microprocessor Report.

See also