Multirotor unmanned aerial vehicles (UAVs) have gained significant popularity in recent years due to their high maneuverability and vertical take-off and landing capability. The new roles require that the future multirotor UAVs will need to fly in a variety of challenging environments and the flight performance may significantly degrade due to the shift from nominal flight conditions. As their usage expands to increasingly challenging environments, the need for reliable and high-performance flight behavior becomes more pressing. The dissertation addresses these difficulties through a series of research efforts aimed at improving the overall flight performance of multirotor UAVs in challenging conditions.

First, an experimental study was conducted to identify a data-driven ground effect model for a small quadcopter, which takes into account the interference among the rotors and was validated through flight experiments. An adaptive control scheme was then developed to counter the model uncertainty resulting from the complex aerodynamics, leading to improved command tracking performance when the UAV is in the ground effect region. The effectiveness of the developed controller was demonstrated on a real quadcopter, with results showing superior performance compared to a traditional PID controller.

Second, the effect of wind on a hovering octocopter was investigated and modeled through field experiments. A data-driven approach was used to model the wind effects on the bare airframe by directly measuring the wind and including it as a control input. A state space model that explicitly considers the wind effect was identified from real flight data using a system identification approach. The validation results show that a significant error reduction can be achieved by considering wind effects and adding a correction term. The identified model can serve as a foundation for the future development of model-based controllers for outdoor multirotor aircraft, enhancing their flight performance in windy conditions.

Lastly, a vision-based control solution was developed in order to navigate the UAVs inside complex, unstructured, and GPS-denied environments. The proposed solution leverages imitation learning and a variational autoencoder neural network to enable the autonomous agent to learn reactive strategies from human experience effectively and efficiently. The learning frame- work and the developed controller were demonstrated in simulated riverine environments first and then validated in a real orchard on a custom-built quadcopter, with results outperforming existing baseline algorithms. The proposed vision-based control solution is expected to significantly enhance the performance of multirotor UAVs in complex and GPS-denied environments, where traditional navigation methods may not be applicable.

This thesis summarizes our work in the past four years in the field of transport studies of the topological insulator materials and thermoelectric properties of graphene. The first half of the thesis is focused on the transport properties of topological insulator material-Bi₂Se₃. In our research, we systematically tune the position of the chemical potential in p-type Ca-doped Bi₂Se₃ thin devices first by eliminating excess holes with controlled post-fabrication electron beam irradiation that results in an insulating bulk state. In spite of the fact that the energetic electron beam creates defects to localize the bulk carriers and inevitably to cause additional scattering, we find a tenfold increase in carrier mobility associated with the extended states in the band gap. In addition, the resistance undergoes a fivefold increase and passes the maximum as the chemical potential is further tuned by electrostatic gating. A cusp-like low-field magnetoresistance feature also emerges which is indicative of strong spin-orbit interaction. The observed gate-tunable high-mobility is a signature of massless Dirac fermions in the band gap of Bi₂Se₃.

The second half of this thesis is focused on graphene. Our work first reported the thermoelectric study of graphene and demonstrated the anomalous thermoelectric transport of massless Dirac fermions. As a direct consequence of the linear dispersion of massless particles, we find that the Seebeck coefficient Sxx diverges with 1 / |n_2D|^½, where n_2D is the carrier density. We observe a very large Nernst signal S_xy (~ 50 μV/K at 8 T) at the Dirac point, and an oscillatory dependence of both S_xx and S_xy on n_2D at low temperatures. Our results underscore the anomalous thermoelectric transport in graphene, which may be used as a highly sensitive probe for impurity bands near the Dirac point.

This thesis presents experimental work on the synthesis and characterization of materials for topological superconductivity. First, an introduction to the theory of conventional and topological superconductors is presented along with an overview of current experimental work in the field. There are two main material systems considered in this work: Au (111) and NbSe$_2$ thin films. The Au (111) approach is a hybrid superconducting system that seeks to leverage the strong spin-orbit interaction in the surface states of Au (111) films to engineer Majorana zero modes. Tunneling experiments presented on these films reveal the presence of surface state superconductivity and enhanced Zeeman effect from large Land e g-factors. The NbSe$_2$ approach explores the synthesis of this material in wafer scale substrates and the effects of lattice strain on the superconducting properties of the films. Raman spectroscopy reveals that in-plane strain, controlled by synthesis temperature, is responsible for altering the electronic properties of the material.

CPU-FPGA heterogeneous architectures are attracting ever-increasing attention in an attempt to advance computational capabilities and energy efficiency in today's datacenters. Such architectures provide programmers with the ability to reprogram the FPGAs for flexible acceleration of many workloads. However, this advantage is often overshadowed by two critical issues: 1) the poor programmability of FPGAs and 2) the severe overhead of CPU-FPGA integration. For one thing, the conventional RTL-based FPGA design practice significantly slows down the application development cycle. Although recent advances in high-level synthesis (HLS) have improved the FPGA programmability to some extent, it still leaves programmers facing the challenge of manually identifying the optimal design configuration in a tremendous design space. This challenge thus demands intimate knowledge of hardware intricacies to address and a great deal of effort even for hardware experts. For another, even with a high-quality FPGA accelerator that achieves an orders-of-magnitude performance/watt gain for a computation kernel, such an impressive gain can often be dramatically offset by the extra CPU-FPGA data communication overhead, resulting in a much reduced system-wide speedup, or even slowdown.

This thesis aims to address these two issues so as to facilitate the adoption of FPGAs in datacenters. To improve the FPGA programmability, we propose a methodology that automates the heavy code reconstruction from software programs towards behavioral descriptions of high-quality FPGA designs, through well-defined architecture templates. Specifically, we propose the composable, parallel and pipeline (CPP) microarchitecture as an accelerator design template. This well-defined architecture template derives high-quality accelerator designs for a broad class of computation kernels, and substantially reduce the overall design space. Also, it enables the introduction of the CPP analytical model that quantifies the performance-resource trade-offs among different configurations of the CPP template. This in turn leads to fast design space exploration to identify the optimal CPP configuration in a reasonable time. On top of the architecture template and its analytical model, we develop the AutoAccel framework to automatically transform an input computation kernel program into the optimal CPP-based design for it. For general application developers, AutoAccel supplies a nearly push-button experience to produce an FPGA accelerator with good performance; for FPGA design experts, it greatly reduces the effort of manual design space exploration and code reconstruction; it thus substantially improves the FPGA programmability in both cases.

To come up with an efficient CPU-FPGA integration methodology, we first conduct a quantitative analysis on the microarchitectures of state-of-the-art CPU-FPGA platforms, with a key focus on the effective latency and bandwidth of the CPU-FPGA data communication. The analysis results reveal three important factors that affect the efficiency of CPU-FPGA integration: 1) payload size of every data transfer, 2) the complicated, multi-stage CPU-FPGA data transfer routine, and 3) sharing of the FPGA resource among CPU threads. We then propose three techniques: batch processing, fully-pipelined data communication stack and FPGA-as-a-Service (FaaS) framework, for these three factors, respectively. Batch processing packs small inputs into a large payload; the fully-pipelined stack overlaps various data transfer stages and the compute stage; both improves the data processing throughput. The FaaS framework treats the CPU threads as clients, and the FPGA as the server, and shares the server among the clients via the canonical client-server paradigm. These three techniques form our proposed methodology for efficient CPU-FPGA integration, which is demonstrated through the JVM-FPGA integration process for the genome sequencing application.

In this dissertation, I report my work on making two-dimensional van der Waals heterostructure devices. Chapter one introduces the main concepts of the band structure of graphene and the quantum Hall effect. These are the necessary theoretical foundation to understand transport experiment results in the following chapters. Chapter two includes the device fabrication techniques and recipes for fabrication. In Chapter three, I illustrate different characterization methods to study the properties of van der Waals heterostructure devices. Chapter four presents more detailed work on transport measurements of twisted bilayer graphene devices.