Acer Aspire E5-573G V3-574G Quanta ZRT ZRTA DA0ZRTMB6D0

5 4 3 2 1
ZRT/ZRTA_GDDR3 BWD ULT SYSTEM BLOCK DIAGRAM

BOM
15@ : For 15W CPU
28@ : For 28W CPU
6515@ : For 6515 stuff
Dual Channel DDR III VRAM AC@ : For IOAC
DDR3L-SODIMM CHA 1066/1333/1600 MHZ GPU DDR3 DM@ : Dual MIC
BRODWELL ULT 15W N16S-GT P20,P21 DR@ : For Dual Rank
P14 PCIE-5
N16V-GM
EV@ : Optimus
MCP 1168pins PCI-E x4
D
TX/RX GM@ :N16V-GM /WO GC6 D
DDR3L-SODIMM CHB IMC

DC+GT3 X'TAL 27MHz
GS@ : G sensor
P15
40 mm X 24 mm
CLK GT@ :N16S-GT /GC6
SATA0 P16~P19 IV@ : iGPU
SATA - HDD EDP KBL@ : Keyboard backlight
P27 SATA eDP Conn. NAC@ : Non IOAC
P23
eDP
SATA ODD SATA1 NGS@ : Non G sensor
P27 NTPM@ : Non TPM
S28@ : 28W Change BOM
DDI2 ITE6515
VGA Conn. P23 SM@ : Single MIC
P22 SP@ : Special
DP
SR@ : Single Rank
DDI1
HDMI Conn. TPM@ : TPM
Cardreader USB2-7 Integrated PCH P24
TPN_N@ : For TPM 2.0
CONN. 2in 1 RTS5170 USB3-1,-2
P27 (cardreader) P27
TPN_S@ : For TPM 1.2
USB3.0/2.0
USB2-6 USB2-0,-1 USB3 Port*2
CCD(Camera) MB side
P22 P30
C
USB2.0 C
USB2-5 CLK
Touch Screen
P22
PCI-E x1 PCIE-4
USB2-4
Blue Tooth NGFF CARD
P24 WLAN+BT
X'TAL P28
32.768KHz
RTL8111H RJ45
PCIE-3
P25
I/O board X'TAL 24MHz
USB2-2 10/100/1G P25
USB2 IO*1 I/O Board Conn. CLK

P27 P8 BATTERY RTC
P2~P13 X'TAL 25MHz
Azalia IHDA
SPI SPI ROM
LPC
8M P8
EC
B Int. D-MIC ALC255 TPM(option) B
D-MIC BQ24737RGRR TPS51216RUKR Thermal Protection
AUDIO CODEC IT8987 P27 Batery Charger P31 +1.35V_SUS P35 Discharger P36
P28 P28 P31
TPS51225RUKR TPS54318RTER
+3V/+5V P32 +1.5V P36
D-MIC
TPS51624RSM UP1658RQKF
P28 +VCCIN P33 +VGPU_CORE P37
Universal HP Speaker*2 Touch PAD Fan Driver TPS51211DSCR PS51211DSCR

P28 P28
K/B Con. (Fan signal) +1.05V_S5/+1.05V +1.5V_GFX/1.05V_GFX/3V_GFX
P29 P29 P29 P34 P38
BACKLIGHT
(OPTION) P29
A A
https://t.me/schematicslaptop
https://t.me/biosarchive
Quanta Computer Inc.
PROJECT : ZRT/ZRTA
Size Document Number Rev
3A
Block Diagram
Date: Wednesday, February 11, 2015 Sheet 1 of 44
5 4 3 2 1
5 4 3 2 1
Haswell ULT (DISPLAY,eDP)

U37A HSW_ULT_DDR3L
eDP Panel
[24] INT_HDMITX0N C54 C45 EDP_TXN0 EDP_TXN0 [23]
D C55 DDI1_TXN0 EDP_TXN0 B46 EDP_TXP0 D
[24] INT_HDMITX0P DDI1_TXP0 EDP_TXP0 EDP_TXP0 [23]
B58 A47 EDP_TXN1
HDMI
[24] INT_HDMITX1N DDI1_TXN1 EDP_TXN1 EDP_TXN1 [23]

[24] INT_HDMITX1P C58 B47 EDP_TXP1 EDP_TXP1 [23]
B55 DDI1_TXP1 EDP_TXP1
[24] INT_HDMITX2N DDI1_TXN2
[24] INT_HDMITX2P A55 C47 EDP_TXN2 EDP_TXN2 [23]
A57 DDI1_TXP2 EDP_TXN2 C46 EDP_TXP2
[24] INT_HDMICLK- DDI1_TXN3 EDP_TXP2 EDP_TXP2 [23]
B57 A49 EDP_TXN3
[24] INT_HDMICLK+ DDI1_TXP3 DDI EDP EDP_TXN3 EDP_TXN3 [23]
B49 EDP_TXP3 EDP_TXP3 [23]
C51 EDP_TXP3
[22] CRT_TXN0 DDI2_TXN0
[22] CRT_TXP0 C50 A45 EDP_AUXN EDP_AUXN [23]
CRT
C53 DDI2_TXP0 EDP_AUXN B45 EDP_AUXP

[22] CRT_TXN1 DDI2_TXN1 EDP_AUXP EDP_AUXP [23]
[22] CRT_TXP1
B54
C49 DDI2_TXP1 D20 EDP_RCOMP R353 24.9/F_4
DDI2_TXN2 EDP_RCOMP +VCCIOA_OUT
ITE FAE suggest CAP B50 A43 DP_UTIL R705 *0_4 PCH_BRIGHT
DDI2_TXP2 EDP_DISP_UTIL
should be at PCH side. A53
DDI2_TXN3
B53
DDI2_TXP3
eDP_RCOMP
R706 *0_4
Trace length < 100 mils
Trace width = 20 mils
1 OF 19 Trace spacing = 25 mils
C C
+3V
HSW_ULT_DDR3L
U37I
PCI_PIRQA# R316 10K_4
PCI_PIRQB# R635 10K_4
PCI_PIRQC# R328 10K_4
PCI_PIRQD# R640 10K_4
PCH_BRIGHT B8 B9 DGPU_SELECT# R653 10K_4
[23] PCH_BRIGHT EDP_BKLCTL DDPB_CTRLCLK HDMI_DDCCLK_SW [24]
[23] PCH_BLON PCH_BLON A9 C9 HDMI_DDCDATA_SW [24] CRT_CLK R365 2.2K_4
C6 EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA D9 CRT_CLK CRT_DATA R363 2.2K_4
[23] EDP_VDD_EN EDP_VDDEN DDPC_CTRLCLK D11 CRT_DATA TPD_INT#_D R327 100K_4
DDPC_CTRLDATA
PCI_PIRQA# U6
PIRQA/GPIO77 +3V
PCI_PIRQB# P4 +3V C5
N4 PIRQB/GPIO78 DDPB_AUXN B6
PCI_PIRQC#
PIRQC/GPIO79 +3V DISPLAY DDPC_AUXN
CRT_AUXN CRT_AUXN [22]
PCI_PIRQD# N2
PIRQD/GPIO80 +3V DDPB_AUXP
B5
+3V
PCI_PME# AD4 +3V_S5 A6 CRT_AUXP CRT_AUXP [22]
TP87 PME PCIE DDPC_AUXP
TPD_INT#_D U7 +3V
DGPU_SELECT# L1 GPIO55 CRT_AUXN
GPIO52 +3V R691 *100K_4
BOARD_ID4 L3 +3V C8 INT_HDMI_HPD [24]
[10] BOARD_ID4 R5 GPIO54 DDPB_HPD A8
[10] BOARD_ID1
BOARD_ID1
GPIO51 +3V DDPC_HPD CRT_HPD [22] CRT_AUXP R692 *100K_4
BOARD_ID2 L4 +3V D6
[10] BOARD_ID2 GPIO53 EDP_HPD EDP_HPD [23]
B B
R360 R686
4.7K_4
9 OF 19 100K_4
+3V
2
3 1 TPD_INT#_D
[29,31] TPD_INT#
Q23
2N7002K
A A

PROJECT : ZRT/ZRTA
https://t.me/schematicslaptop Size Document Number Rev
3A
https://t.me/biosarchive Haswell 3/5 (DDI/eDP)
5 4 3 2 1
5 4 3 2 1
Change Data and DQS to interleave.
Haswell ULT (DDR3L) Haswell Processor (DDR3)

HSW_ULT_DDR3L HSW_ULT_DDR3L
U37C U37D
[14] M_A_DQ0 M_A_DQ0 AH63 AU37 M_A_CLK0# [14]

M_A_DQ1 AH62 SA_DQ0 SA_CLK#0 AV37 M_A_DQ32 AY31 AM38
[14] M_A_DQ1 SA_DQ1 SA_CLK0 M_A_CLK0 [14] [14] M_A_DQ32 SB_DQ0 SB_CK#0 M_B_CLK0# [15]
[14] M_A_DQ2 M_A_DQ2 AK63 AW36
M_A_CLK1# [14] [14] M_A_DQ33 M_A_DQ33AW31 AN38
M_B_CLK0 [15]
M_A_DQ3 AK62 SA_DQ2 SA_CLK#1 AY36 M_A_DQ34 AY29 SB_DQ1 SB_CK0 AK38
[14] M_A_DQ3 SA_DQ3 SA_CLK1 M_A_CLK1 [14] [14] M_A_DQ34 SB_DQ2 SB_CK#1 M_B_CLK1# [15]
[14] M_A_DQ4 M_A_DQ4 AH61 [14] M_A_DQ35 M_A_DQ35AW29 AL38 M_B_CLK1 [15]
M_A_DQ5 AH60 SA_DQ4 AU43 M_A_DQ36 AV31 SB_DQ3 SB_CK1
D
[14] M_A_DQ5 SA_DQ5 SA_CKE0 M_A_CKE0 [14] [14] M_A_DQ36 SB_DQ4 D
[14] M_A_DQ6 M_A_DQ6 AK61 AW43
M_A_CKE1 [14] [14] M_A_DQ37 M_A_DQ37 AU31 AY49
M_B_CKE0 [15]
M_A_DQ7 AK60 SA_DQ6 SA_CKE1 AY42 M_A_DQ38 AV29 SB_DQ5 SB_CKE0 AU50
[14] M_A_DQ7 SA_DQ7 SA_CKE2 [14] M_A_DQ38 SB_DQ6 SB_CKE1 M_B_CKE1 [15]
[14] M_A_DQ8 M_A_DQ8 AM63 AY43
[14] M_A_DQ39 M_A_DQ39 AU29 AW49
M_A_DQ9 AM62 SA_DQ8 SA_CKE3 M_A_DQ40 AY27 SB_DQ7 SB_CKE2 AV50
[14] M_A_DQ9 SA_DQ9 [14] M_A_DQ40 SB_DQ8 SB_CKE3
[14] M_A_DQ10 M_A_DQ10 AP63 AP33 M_A_CS#0 [14] [14] M_A_DQ41 M_A_DQ41AW27
M_A_DQ11 AP62 SA_DQ10 SA_CS#0 AR32 M_A_DQ42 AY25 SB_DQ9 AM32
[14] M_A_DQ11 SA_DQ11 SA_CS#1 M_A_CS#1 [14] [14] M_A_DQ42 SB_DQ10 SB_CS#0 M_B_CS#0 [15]
[14] M_A_DQ12 M_A_DQ12 AM61 [14] M_A_DQ43 M_A_DQ43AW25 AK32
M_B_CS#1 [15]
M_A_DQ13 AM60 SA_DQ12 AP32 M_A_DQ44 AV27 SB_DQ11 SB_CS#1
[14] M_A_DQ13 SA_DQ13 SA_ODT0 TP26 [14] M_A_DQ44 SB_DQ12
[14] M_A_DQ14 M_A_DQ14 AP61 [14] M_A_DQ45 M_A_DQ45 AU27 AL32 M_B_ODT0 TP25
M_A_DQ15 AP60 SA_DQ14 AY34 M_A_DQ46 AV25 SB_DQ13 SB_ODT0
[14] M_A_DQ15 SA_DQ15 SA_RAS M_A_RAS# [14] [14] M_A_DQ46 SB_DQ14
M_B_DQ0 AP58 AW34 M_A_DQ47 AU25 AM35
[15] M_B_DQ0 SA_DQ16 SA_WE M_A_WE# [14] [14] M_A_DQ47 SB_DQ15 SB_RAS M_B_RAS# [15]
[15] M_B_DQ1 M_B_DQ1 AR58 AU34 M_A_CAS# [14] [15] M_B_DQ32 M_B_DQ32 AM29 AK35 M_B_WE# [15]
M_B_DQ2 AM57 SA_DQ17 SA_CAS M_B_DQ33 AK29 SB_DQ16 SB_WE AM33
[15] M_B_DQ2 SA_DQ18 [15] M_B_DQ33 SB_DQ17 SB_CAS M_B_CAS# [15]
[15] M_B_DQ3 M_B_DQ3 AK57 AU35
M_A_BS#0 [14] [15] M_B_DQ34 M_B_DQ34 AL28
M_B_DQ4 AL58 SA_DQ19 SA_BA0 AV35 M_B_DQ35 AK28 SB_DQ18 AL35
[15] M_B_DQ4 SA_DQ20 SA_BA1 M_A_BS#1 [14] [15] M_B_DQ35 SB_DQ19 SB_BA0 M_B_BS#0 [15]
[15] M_B_DQ5 M_B_DQ5 AK58 AY41
M_A_BS#2 [14] [15] M_B_DQ36 M_B_DQ36 AR29 AM36
M_B_BS#1 [15]
M_B_DQ6 AR57 SA_DQ21 SA_BA2 M_B_DQ37 AN29 SB_DQ20 SB_BA1 AU49
[15] M_B_DQ6 SA_DQ22 M_A_A[15:0] [14] [15] M_B_DQ37 SB_DQ21 SB_BA2 M_B_BS#2 [15]
[15] M_B_DQ7 M_B_DQ7 AN57 AU36 M_A_A0 [15] M_B_DQ38 M_B_DQ38 AR28 M_B_A[15:0] [15]
M_B_DQ8 AP55 SA_DQ23 SA_MA0 AY37 M_A_A1 M_B_DQ39 AP28 SB_DQ22 AP40 M_B_A0
[15] M_B_DQ8 SA_DQ24 SA_MA1 [15] M_B_DQ39 SB_DQ23 SB_MA0
[15] M_B_DQ9 M_B_DQ9 AR55 AR38 M_A_A2
[15] M_B_DQ40 M_B_DQ40 AN26 AR40 M_B_A1
SA_DQ25 SA_MA2 SB_DQ24 SB_MA1
[15] M_B_DQ10 M_B_DQ10 AM54 AP36 M_A_A3 [15] M_B_DQ41 M_B_DQ41 AR26 AP42 M_B_A2
M_B_DQ11 AK54 SA_DQ26 SA_MA3 AU39 M_A_A4 M_B_DQ42 AR25 SB_DQ25 SB_MA2 AR42 M_B_A3
[15] M_B_DQ12 M_B_DQ12 AL55 AR36 M_A_A5
[15] M_B_DQ43 M_B_DQ43 AP25 AR45 M_B_A4
M_B_DQ13 AK55 SA_DQ28 SA_MA5 AV40 M_A_A6 M_B_DQ44 AK26 SB_DQ27 SB_MA4 AP45 M_B_A5
[15] M_B_DQ14 M_B_DQ14 AR54 AW39M_A_A7
[15] M_B_DQ45 M_B_DQ45 AM26 AW46 M_B_A6
M_B_DQ15 AN54 SA_DQ30 DDR CHANNEL A SA_MA7 AY39 M_A_A8 M_B_DQ46 AK25 SB_DQ29 SB_MA6 AY46 M_B_A7
[14] M_A_DQ16 M_A_DQ16 AY58 AU40 M_A_A9 [15] M_B_DQ47 M_B_DQ47 AL25 AY47 M_B_A8
M_A_DQ17 AW58 SA_DQ32 SA_MA9 AP35 M_A_A10 M_A_DQ48 AY23 SB_DQ31 DDR CHANNEL B SB_MA8 AU46 M_B_A9
[14] M_A_DQ17 SA_DQ33 SA_MA10 [14] M_A_DQ48 SB_DQ32 SB_MA9
[14] M_A_DQ18 M_A_DQ18 AY56 AW41M_A_A11
[14] M_A_DQ49 M_A_DQ49AW23 AK36 M_B_A10
M_A_DQ19 AW56 SA_DQ34 SA_MA11 AU41 M_A_A12 M_A_DQ50 AY21 SB_DQ33 SB_MA10 AV47 M_B_A11
[14] M_A_DQ19 SA_DQ35 SA_MA12 [14] M_A_DQ50 SB_DQ34 SB_MA11
[14] M_A_DQ20 M_A_DQ20 AV58 AR35 M_A_A13 [14] M_A_DQ51 M_A_DQ51AW21 AU47 M_B_A12
M_A_DQ21 AU58 SA_DQ36 SA_MA13 AV42 M_A_A14 M_A_DQ52 AV23 SB_DQ35 SB_MA12 AK33 M_B_A13
C
[14] M_A_DQ21 SA_DQ37 SA_MA14 [14] M_A_DQ52 SB_DQ36 SB_MA13 C
[14] M_A_DQ22 M_A_DQ22 AV56 AU42 M_A_A15
[14] M_A_DQ53 M_A_DQ53 AU23 AR46 M_B_A14
M_A_DQ23 AU56 SA_DQ38 SA_MA15 M_A_DQ54 AV21 SB_DQ37 SB_MA14 AP46 M_B_A15
[14] M_A_DQ23 SA_DQ39 [14] M_A_DQ54 SB_DQ38 SB_MA15
[14] M_A_DQ24 M_A_DQ24 AY54 AJ61 M_A_DQS#0 M_A_DQS#0 [14] [14] M_A_DQ55 M_A_DQ55 AU21
M_A_DQ25 AW54 SA_DQ40 SA_DQSN0 AN62 M_A_DQS#1 M_A_DQ56 AY19 SB_DQ39 AW30 M_A_DQS#4
[14] M_A_DQ25 SA_DQ41 SA_DQSN1 M_A_DQS#1 [14] [14] M_A_DQ56 SB_DQ40 SB_DQSN0 M_A_DQS#4 [14]
[14] M_A_DQ26 M_A_DQ26 AY52 AM58 M_B_DQS#0 M_B_DQS#0 [15] [14] M_A_DQ57 M_A_DQ57AW19 AV26 M_A_DQS#5
M_A_DQS#5 [14]
M_A_DQ27 AW52 SA_DQ42 SA_DQSN2 AM55 M_B_DQS#1 M_A_DQ58 AY17 SB_DQ41 SB_DQSN1 AN28 M_B_DQS#4
[14] M_A_DQ27 SA_DQ43 SA_DQSN3 M_B_DQS#1 [15] [14] M_A_DQ58 SB_DQ42 SB_DQSN2 M_B_DQS#4 [15]
[14] M_A_DQ28 M_A_DQ28 AV54 AV57 M_A_DQS#2 M_A_DQS#2 [14] [14] M_A_DQ59 M_A_DQ59AW17 AN25 M_B_DQS#5
M_B_DQS#5 [15]
M_A_DQ29 AU54 SA_DQ44 SA_DQSN4 AV53 M_A_DQS#3 M_A_DQ60 AV19 SB_DQ43 SB_DQSN3 AW22 M_A_DQS#6
[14] M_A_DQ29 SA_DQ45 SA_DQSN5 M_A_DQS#3 [14] [14] M_A_DQ60 SB_DQ44 SB_DQSN4 M_A_DQS#6 [14]
[14] M_A_DQ30 M_A_DQ30 AV52 AL43 M_B_DQS#2 M_B_DQS#2 [15] [14] M_A_DQ61 M_A_DQ61 AU19 AV18 M_A_DQS#7 M_A_DQS#7 [14]
M_A_DQ31 AU52 SA_DQ46 SA_DQSN6 AL48 M_B_DQS#3 M_A_DQ62 AV17 SB_DQ45 SB_DQSN5 AN21 M_B_DQS#6
[14] M_A_DQ31 SA_DQ47 SA_DQSN7 M_B_DQS#3 [15] [14] M_A_DQ62 SB_DQ46 SB_DQSN6 M_B_DQS#6 [15]
M_B_DQ16 AK40 M_A_DQ63 AU17 AN18 M_B_DQS#7
[15] M_B_DQ16 SA_DQ48 [14] M_A_DQ63 SB_DQ47 SB_DQSN7 M_B_DQS#7 [15]
[15] M_B_DQ17 M_B_DQ17 AK42 AJ62 M_A_DQS0 M_A_DQS0 [14] [15] M_B_DQ48 M_B_DQ48 AR21
M_B_DQ18 AM43 SA_DQ49 SA_DQSP0 AN61 M_A_DQS1 M_B_DQ49 AR22 SB_DQ48 AV30 M_A_DQS4
[15] M_B_DQ18 SA_DQ50 SA_DQSP1 M_A_DQS1 [14] [15] M_B_DQ49 SB_DQ49 SB_DQSP0 M_A_DQS4 [14]
[15] M_B_DQ19 M_B_DQ19 AM45 AN58 M_B_DQS0 M_B_DQS0 [15] [15] M_B_DQ50 M_B_DQ50 AL21 AW26 M_A_DQS5 M_A_DQS5 [14]
M_B_DQ20 AK45 SA_DQ51 SA_DQSP2 AN55 M_B_DQS1 M_B_DQ51 AM22 SB_DQ50 SB_DQSP1 AM28 M_B_DQS4
[15] M_B_DQ20 SA_DQ52 SA_DQSP3 M_B_DQS1 [15] [15] M_B_DQ51 SB_DQ51 SB_DQSP2 M_B_DQS4 [15]
[15] M_B_DQ21 M_B_DQ21 AK43 AW57 M_A_DQS2 M_A_DQS2 [14] [15] M_B_DQ52 M_B_DQ52 AN22 AM25 M_B_DQS5 M_B_DQS5 [15]
SA_DQ53 SA_DQSP4 SB_DQ52 SB_DQSP3
[15] M_B_DQ22 M_B_DQ22 AM40 AW53 M_A_DQS3 M_A_DQS3 [14] [15] M_B_DQ53 M_B_DQ53 AP21 AV22 M_A_DQS6 M_A_DQS6 [14]
M_B_DQ23 AM42 SA_DQ54 SA_DQSP5 AL42 M_B_DQS2 M_B_DQ54 AK21 SB_DQ53 SB_DQSP4 AW18 M_A_DQS7
[15] M_B_DQ23 SA_DQ55 SA_DQSP6 M_B_DQS2 [15] [15] M_B_DQ54 SB_DQ54 SB_DQSP5 M_A_DQS7 [14]
[15] M_B_DQ24 M_B_DQ24 AM46 AL49 M_B_DQS3 M_B_DQS3 [15] [15] M_B_DQ55 M_B_DQ55 AK22 AM21 M_B_DQS6 M_B_DQS6 [15]
M_B_DQ25 AK46 SA_DQ56 SA_DQSP7 M_B_DQ56 AN20 SB_DQ55 SB_DQSP6 AM18 M_B_DQS7
[15] M_B_DQ25 SA_DQ57 [15] M_B_DQ56 SB_DQ56 SB_DQSP7 M_B_DQS7 [15]
[15] M_B_DQ26 M_B_DQ26 AM49 AP49
+VREF_CA_CPU [15] M_B_DQ57 M_B_DQ57 AR20
M_B_DQ27 AK49 SA_DQ58 SM_VREF_CA AR51 M_B_DQ58 AK18 SB_DQ57
[15] M_B_DQ27 SA_DQ59 SM_VREF_DQ0 +VREFDQ_SA_M3 [15] M_B_DQ58 SB_DQ58
[15] M_B_DQ28 M_B_DQ28 AM48 AP51 +VREFDQ_SB_M3 [15] M_B_DQ59 M_B_DQ59 AL18
M_B_DQ29 AK48 SA_DQ60 SM_VREF_DQ1 M_B_DQ60 AK20 SB_DQ59
[15] M_B_DQ29 SA_DQ61 [15] M_B_DQ60 SB_DQ60
[15] M_B_DQ30 M_B_DQ30 AM51 [15] M_B_DQ61 M_B_DQ61 AM20
M_B_DQ31 AK51 SA_DQ62 M_B_DQ62 AR18 SB_DQ61
[15] M_B_DQ31 SA_DQ63 [15] M_B_DQ62 SB_DQ62
[15] M_B_DQ63 M_B_DQ63 AP18
SB_DQ63
B B
3 OF 19 4 OF 19
A A

PROJECT : ZRT/ZRTA
3A
Haswell 2/5 (DDR3 I/F)
5 4 3 2 1
5 4 3 2 1
H_PECI (50ohm)
Haswell ULT (SIDEBAND)
Route on microstrip only
D
Spacing >18 mils D
Trace Length: 0.4~6.125 iches
H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches HSW_ULT_DDR3L
U37B
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches PROC_DETECT D61
TP106 PROC_DETECT
CATERR# K61 MISC
TP99 CATERR
H_PECI N62 J62 XDP_PRDY#
[31] H_PECI PECI PRDY XDP_PRDY# [13]
K62 XDP_PREQ#
PREQ E60 XDP_PREQ# [13]
XDP_TCK0 TCK,TMS
PROC_TCK E61 XDP_TCK0 [8,13]
XDP_TMS_CPU Trace Length < 9000mils
H_PROCHOT# H_PROCHOT#_R K63 JTAG PROC_TMS E59 XDP_TRST# XDP_TMS_CPU [13]
[31,32,36] H_PROCHOT# R662 56_4
PROCHOT PROC_TRST F63 XDP_TRST# [8,13]
THERMAL XDP_TDI_CPU
PROC_TDI F62 XDP_TDI_CPU [13]
XDP_TDO_CPU
PROC_TDO XDP_TDO_CPU [13]
H_PWRGOOD_R C61
PROCPWRGD PWR
J60 XDP_BPM#0
BPM#0 H60 XDP_BPM#0 [13]
XDP_BPM#1
BPM#1 H61 XDP_BPM#1 [13]
SM_RCOMP[0:2] XDP_BPM#2 BPM#[0:7]
BPM#2 TP103
Trace length < 500 mils H62 XDP_BPM#3 Trace Length 1~6 inches
AU60 BPM#3 K59 TP102
SM_RCOMP_0 XDP_BPM#4 Length match < 300 mils
Trace width = 12~15 mils SM_RCOMP_1 AV60 SM_RCOMP0 DDR3L BPM#4 H63 XDP_BPM#5
TP46
Trace spacing = 20 mils SM_RCOMP_2 AU61 SM_RCOMP1 BPM#5 K60 XDP_BPM#6
TP104
C TP100 C
CPU_DRAMRST# AV15 SM_RCOMP2 BPM#6 J61 XDP_BPM#7
SM_DRAMRST DSW BPM#7 TP47
DDR_PG_CTRL AV61
SM_PG_CNTL1
2 OF 19
B B
DRAM COMP XDP PU/PD DDR3L ODT GENERATION +1.35V_SUS

+1.05V_VCCST
R254 200/F_4 SM_RCOMP_0 +5V_S5 +3VSUS U7
XDP_TDO_CPU R659 51_4
5 1
VCC NC
1
R250 120/F_4 SM_RCOMP_1
1
XDP_TCK0 R340 51_4
XDP_TRST# R578 *51_4 R164 R162 C152 2 R167 *short_4 DDR_PG_CTRL
A
R260 100/F_4 SM_RCOMP_2 220K/F_4 *220K/F_4 0.1u/10V_4
2
2
2
4 3
[35] DDR_VTTT_PG_CTRL Y GND
+1.35V_SUS 74AUP1G07GW
PU/PD of CPU DRAMRST
3
+1.35V_SUS R87 66.5/F_4
+VCCIO_OUT M_A_ODT0_DIMM [14]
2 Q8
2N7002K R86 66.5/F_4 M_A_ODT1_DIMM [14]
1
H_PROCHOT# R663 *62_4

R551 R84 66.5/F_4
+1.05V_VCCST M_B_ODT0_DIMM [15]
470_4
1
A A
R85 66.5/F_4 M_B_ODT1_DIMM [15]
R664 62_4
CPU DRAM
2
CPU_DRAMRST# R552 *short_4

DDR3_DRAMRST# [14,15]
1
H_PWRGOOD_R R682 10K_4 C488

*0.1u/10V_4
PROJECT : ZRT/ZRTA
2

3A
Haswell 1/5 (PEG/DMI/FDI)
5 4 3 2 1
5 4 3 2 1
VDDQ Output Decoupling Recommendations

VCCST PWRGD
330uFx2 7343 BOT socket side
CRB is via +1.05V PG
22uFx11 0805 5 onTOP, 6 on BOT inside socket cavity
+3V_S5 U28
10uFx10 0805 5 onTOP, 5 on BOT inside socket cavity +1.05V_VCCST
5 1
VCC NC
C466
R681 0.1u/10V_4 2 VCCST_PWRGD_EN
10K_4 A
D Haswell ULT (POWER) VCCST_PWRGD R503 *short_4VCCST_PWRGD_R 4

Y GND
3 D
C465 74AUP1G07GW
+1.35V_SUS *0.1u/10V_4
+ C556
*470u/2V_7343 R489 *0_4 HWPG_1.05V_EC
R208 *short_1206 +1.35V_CPU
3
HSW_ULT_DDR3L
R209 *short_1206 +1.35V_CPU 1.4A U37L
+VCCIN 32A Q43 Reserve from EC
L59 C36 +VCCIN
+1.35V_CPU J58 RSVD VCC C40 2
RSVD VCC HWPG_1.05V_EC# [31]
C44
AH26 VCC C48 C256 C329 C312 C289 C279 C335
C190 C187 C226 C220 C188 C191 AJ31 VDDQ VCC C52 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 *2N7002K
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AJ33 VDDQ VCC C56
VDDQ VCC
1
AJ37 E23
AN33 VDDQ VCC E25
AP43 VDDQ VCC E27
AR48 VDDQ VCC E29 R107 *short_4
VDDQ VCC PCH_PWROK [7,31]
+ AY35 E31 VCCST_PWRGD_EN R108 *0_4 EC_PWROK [7,31]
C489 C217 C227 C181 C219 AY40 VDDQ VCC E33 C270 C245 C552 C275 C240 C259
*470u/2V_7343 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 AY44 VDDQ VCC E35 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 1A-6 2013/10/21 Del APWORK.
AY50 VDDQ VCC E37
VDDQ VCC E39
F59 VCC E41
+VCCIN VCC VCC
N58 E43
R666 100/F_4 AC58 RSVD VCC E45
+VCCIN RSVD VCC
C E47 C
R676 *short_4 VCC_SENSE_R E63 VCC E49 C548 C252 C260 C339 C550 C261
[36] VCC_SENSE VCC_SENSE VCC
AB23 E51 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8
A59 RSVD VCC E53
300mA +VCCIO_OUT VCCIO_OUT VCC +1.05V +VCCIO_OUT
300mA +VCCIOA_OUT E20 E55
AD23 VCCIOA_OUT VCC E57
AA23 RSVD VCC F24 R351 *0_8
AE59 RSVD VCC F28
R332 *10K_4 RSVD VCC F32
+1.05V_VCCST VCC
H_CPU_SVIDART# L62 F36 C283 C246 C250 C251 C337 C554 C263
VRON_CPU R333 10K_4 IMVP_PWRGD H_CPU_SVIDCLK N63 VIDALERT HSW ULT POWER VCC F40 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 *4.7u/10V_6
H_CPU_SVIDDAT L63 VIDSCLK VCC F44
VCCST_PWRGD B59 VIDSOUT VCC F48
[13] VCCST_PWRGD VCCST_PWRGD VCC
VRON_CPU F60 F52
[36] VRON_CPU VR_EN VCC
[10,36] IMVP_PWRGD IMVP_PWRGD C59 F56
VR_READY VCC G23
D63 VCC G25
R319 *short_4 PWR_DEBUG_R H59 VSS VCC G27 C549 C253 C334 C236 C545 C234
[13] PWR_DEBUG PWR_DEBUG VCC
P62 G29 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8
R323 150_6 ULT_RVSD_69 P60 VSS VCC G31
+1.05V_VCCST TP43 RSVD_TP VCC
ULT_RVSD_70 P61 G33
TP44
ULT_RVSD_71 N59 RSVD_TP VCC G35 SVID Layout note: need routing together
TP49
TP97 ULT_RVSD_72 N61 RSVD_TP VCC G37 and ALERT need between CLK and DATA.
T59 RSVD_TP VCC G39
1006 add RSVD VCC
AD60 G41
AD59 RSVD VCC G43 +VCCIO_OUT +1.05V_VCCST
RSVD VCC VCC Output Decoupling Recommendations
AA59 G45
AE60 RSVD VCC G47
RSVD VCC 470uFx4 7343 TOP socket side
B
AC59 G49 B
AG58 RSVD VCC G51
RSVD VCC 22uFx8 0805 4 on TOP, 4 on BOT near socket edge
U59 G53 R651 R652
V59 RSVD VCC G55 *130/F_4 130/F_4
1006 Del RSVD VCC 22uFx11 0805 TOP, inside socket cavity
G57
AC22 VCC H23 H_CPU_SVIDDAT R650 *short_4
VCCST VCC 10uFx11 0805 BOT, inside socket cavity VR_SVID_DATA [36]
+1.05V +1.05V_VCCST AE22 J23
AE23 VCCST VCC K23
+1.05V_VCCST VCCST VCC Place PU resistor
R345 *short_8 K57 close to CPU
AB57 VCC L22 +1.05V_VCCST +VCCIO_OUT
AD57 VCC VCC M23
C235 AG57 VCC VCC M57
*4.7u/10V_6 C24 VCC VCC P57
C28 VCC VCC U57
VCC VCC Place PU resistor
+VCCIN C32 W57 close to CPU R637 R636
VCC VCC 75_4 *75_4
12 OF 19
H_CPU_SVIDART# R631 43_4 VR_SVID_ALERT# [36]
+3V
HWPG_1.05V for DDR=1.5V
H_CPU_SVIDCLK R628 *short_4 VR_SVID_CLK [36]
+3V
R78
*4.7K_4
A A
R94 HWPG_1.05V [31]
*4.7K_4
3
3
R77
R99 *4.7K_4 2 2 *100K/F_4
+1.05V
Q9
1
C72 *MMBT3904-7-F C73 Q7

PROJECT : ZRT/ZRTA
1
*1000p/50V_4 *1000p/50V_4 *DTC144EU

10/30 reserve Size Document Number Rev
3A
DDR=1.5V ,This block POP Haswell 4/5 (POWER)
5 4 3 2 1
5 4 3 2 1
Haswell ULT (CFG,RSVD)

U37S HSW_ULT_DDR3L
D CFG0 AC60 AV63 D

[13] CFG0 CFG0 RSVD_TP
[13] CFG1 CFG1 AC62 AU63
CFG2 AC63 CFG1 RSVD_TP
[13] CFG2 CFG2
CFG3 AA63
[13] CFG3 CFG3
CFG4 AA60 C63
[8,13] CFG4 CFG4 RSVD_TP
CFG5 Y62 C62
[13] CFG6 CFG6 Y61 B43
CFG7 Y60 CFG6 RSVD
[13] CFG7 CFG7
CFG8 V62 A51
CFG9 V61 B51
CFG10 V60
[13] CFG10 CFG10
[13] CFG11 CFG11 U60 L60
CFG12 T63 CFG11 RSVD_TP
[13] CFG12 CFG12 RESERVED
CFG13 T62 N60
[13] CFG13 CFG13 RSVD
CFG14 T61
[13] CFG14 CFG14
CFG15 T60 W23
[13] CFG15 CFG15 RSVD Y22
AA62 RSVD AY15 OPI_COMP1
NOA_STBN_0 R555 49.9/F_4
[13] NOA_STBN_0 CFG16 PROC_OPI_RCOMP
NOA_STBN_1 U63
[13] NOA_STBN_1 CFG18
NOA_STBP_0 AA61 AV62
[13] NOA_STBP_0 U62 CFG17 RSVD D58
NOA_STBP_1
[13] NOA_STBP_1 CFG19 RSVD
R618 49.9/F_4 CFG_RCOMP V63 P22
CFG_RCOMP VSS N21
C
A5 VSS C
REFPKG_OCC
TP109 RSVD P20
1A-10 20131025 reserve A5 ball to 100k PU 3VPCU. E1 RSVD R20
1A-12 20131028 reserve A5 ball toTP. D1 RSVD RSVD
J20 RSVD
H18 RSVD
R689 8.2K_4 TD_IREF B12 RSVD
TD_IREF
19 OF 19 https://t.me/schematicslapto
Processor Strapping
1 0
CFG0
(DEFAULT) NORMAL OPERATION; NO STALL STALL CFG0 R289 *1K_4
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1 CFG1
(DEFAULT) NORMAL OPERATION PCH-LESS MODE R606 *1K_4
PCH/ PCH LESS MODE SELECTION
B B
CFG3 DISABLED ENABLED CFG3 R610 *1K_4

PHYSICAL_DEBUG_ENABLED (DFX PRIVACY) NO PHYSICAL DISPLAY PORT ATTACHED AN EXTERNAL DISPLAY PORT DEVICE IS
TO CONNECTED
EMBEDDED DISPLAY PORT TO THE EMBEDDED DISPLAY PORT
CFG 8 DISABLED(DEFAULT); IN THIS CASE, NOA ENABLED; NOA WILL BE AVAILABLE

ALLOW THE USE OF NOA ON LOCKED UNITS WILL BE DISABLED IN LOCKED UNITS AND REGARDLESS OF THE LOCKING OF THE UNIT CFG8 R614 *1K_4
ENABLED IN UN-LOCKED UNITS
CFG9 NO VR SUPPORTING SVID IS PRESENT. THE

VRS SUPPORTING SVID PROTOCOL ARE CFG9 R619 *1K_4
NO SVID PROTOCOL CAPABLE VR CHIP WILL NOT GENERATE (OR RESPOND TO)
CONNECTED PRESENT SVID ACTIVITY
A A
CFG10 POWER FEATURES ACTIVATED POWER FEATURES (ESPECIALLY CLOCK CFG10 R295 *1K_4
SAFE MODE BOOT DURING RESET GATINE ARE NOT ACTIVATED
PROJECT : ZRT/ZRTA
Haswell 5/5 (CFG/GND) 3A

5 4 3 2 1
5 4 3 2 1
Haswell ULT PCH (PM)

R597 *0_4 U37H HSW_ULT_DDR3L
[31] PCH_SUSACK#
PCH_SUSPWRACK R596 *0_4 SUSACK#_R SYSTEM POWER MANAGEMENT
SYS_RESET# Deep Sx
[13] SYS_RESET# AK2 AW7 DSWVREN
SUSACK DSWVRMEN DSWVREN [8]
C237 *1u/6.3V_4 AC3 AV5 DPWROK_R R543 *0_4 DPWROK [31]
SYS_RESET DPWROK
SYS_PWROK R276 *short_4 SYS_PWROK_R AG2
SYS_PWROK DSW WAKE
AJ5 PCIE_LAN_WAKE# PCIE_LAN_WAKE# [25,28]
D R279 *0_4 R546 *0_4 EC_PWROK_R AY7 D
EC_PWROK R282 *0_4 R283 *0_4 APWROK_R AB5 PCH_PWROK
APWROK
PCI_PLTRST# AG7
PLTRST +3V_S5 +3V CLKRUN/GPIO32
V5 CLKRUN# CLKRUN# [27,31]
+3V_S5 SUS_STAT/GPIO61
AG4 GPIO61
TP74
+3V_S5 AE6 PCH_SUSCLK PCH_SUSCLK [28]
SUSCLK/GPIO62 AP5
DSW SLP_S5/GPIO63
PCH_SLP_S5# PCH_SLP_S5# [13]
[31] RSMRST# R548 *short_4 PCH_RSMRST# AW6
AV4 RSMRST
[31] PCH_SUSPWRACK_R R583 *0_4 PCH_SUSPWRACK
SUSWARN/SUSPWRDNACK/GPIO30 +3V_S5
R265 *short_4 PCH_PWRBTN# AL7 DSW DSW AJ6 SUSC#
[31] DNBSWON# PWRBTN SLP_S4 SUSC# [13,31]
[32] ACPRESENT R294 *short_4 PCH_ACPRESENT AJ8
ACPRESENT/GPIO31 DSW DSW SLP_S3
AT4 SUSB# SUSB# [13,31]
PCH_BATLOW# AN4 DSW DSW AL5 PCH_SLP_A#
BATLOW/GPIO72 SLP_A PCH_SLP_A# [13]
1C1-1 2014/02/19 add R692 for SUSPWRACK# to EC. PCH_SLP_S0#_R AF3 +3V_S5 DSW AP4 PCH_SLP_SUS#
TP77 SLP_S0 SLP_SUS PCH_SLP_SUS# [31]
TP28
PCH_SLP_WLAN# AM5
SLP_WLAN/GPIO29 DSW DSW SLP_LAN
AJ7 PCH_SLP_LAN#
TP32
8 OF 19
C C
Power Sequence R285 *short_4 APWROK_R
[31] APWORK
[5,31] PCH_PWROK R559 *short_4 EC_PWROK_R
https://t.me/schematicslaptop EC_PWROK R284 *0_4 SYS_PWROK_R

Speed up 250ms to boot up
R106 R280
https://t.me/biosarchive 100K_4
RSMRST# R549 *short_4 DPWROK_R for EC power on 250 ms 10K_4
Non Deep Sx
PCH PM PU/PD PLTRST# Buffer Deep Sx Circuit Non Deep Sx

+3V +3V
R220 *Short_6
C202 0.1u/10V_4
CLKRUN# R638 8.2K_4 +3V_S5 +3VCC_S5
5
SYS_RESET# R612 10K_4

2 1 3
4 PLTRST# [13,16,25,27,28,31]
B PCI_PLTRST# 1 R212 Q14 B
PCH_RSMRST# R554 10K_4 C178 *100K_4 *AO3413
2
SYS_PWROK R277 *10K_4 U15 *0.33u/10V_6
3
DPWROK_R R553 100K/F_4 TC7SH08FU R227

PCH_SUSCLK R306 *10K_4 100K_4
R211
*0_6
+3V_S5
3
PCH_SUSPWRACK R590 *10K_4
GPIO61 R603 *10K_4 SYSPWOK
1C-5 2014/01/16 Change R264 from 10k to 1k +3V_S5 PCH_SLP_SUS# 2
for wake on lan issue.
+3V_S5 C249 *0.1u/10V_4 Q16
*2N7002K
PCH_ACPRESENT R287 10K_4
1
5
PCH_BATLOW# R255 8.2K_4

PCIE_LAN_WAKE# R298 1K_4 2 EC_PWROK
EC_PWROK [5,31]
PCH_PWRBTN# R267 *10K_4 DSW PU [13] SYS_PWROK SYS_PWROK 4
1 IMVP_PWRGD_3V [10]
A +3VPCU A
U17
3
R293 *10K_4 TC7SH08FU R297

R256
R296
*8.2K_4
*1K_4 R305 *0_4
10K_4 Quanta Computer Inc.
R264 *10K_4
PROJECT : ZRT/ZRTA
3A
LPT 1/6 (DMI/FDI/VGA)
5 4 3 2 1
5 4 3 2 1
RTC Clock 32.768KHz (RTC)

C506 15p/50V_4 RTC_X1
Haswell ULT PCH (RTC/HDA/SATA/SPI)
1
Y2 R577
Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)
32.768KHZ 10M_4
U37E HSW_ULT_DDR3L
C498 15p/50V_4 RTC_X2
2
RTC_X1 AW5
RTC_X2 AY5 RTCX1
1B-1 AU6 RTCX2 J5 U37G HSW_ULT_DDR3L
R562 1M_4 SM_INTRUDER#
RTC Circuitry (RTC) +3V_RTC
+3V_RTC
PCH_INTVRMEN AV7 INTRUDER SATA_RN0/PERN6_L3 H5
SATA_RXN0 [27]
D AV6 INTVRMEN SATA_RP0/PERP6_L3 B15 SATA_RXP0 [27] AU14 AN2 D
Trace width = 30 mils
SRTC_RST#
SRTCRST
RTC
SATA_TN0/PETN6_L3 SATA_TXN0 [27] HDD [27,28,31] LPC_LAD0 LAD0 +3V_S5 SMBALERT#
D25 +3V_RTC
[13] RTC_RST#
RTC_RST# AU7
RTCRST SATA_TP0/PETP6_L3
A15
SATA_TXP0 [27] [27,28,31] LPC_LAD1
AW12
LAD1
+3V_S5 SMBALERT/GPIO11
SMBCLK
AP2 SMB_PCH_CLK
R528 *Short_6 +3V_RTC_2 R219 AY12 LPC +3V_S5 AH1 SMB_PCH_DAT
+3VPCU [27,28,31] LPC_LAD2 LAD2 SMBDATA
RTC_RST#
SATA_RN1/PERN6_L2
J8
SATA_RXN1 [27] [27,28,31] LPC_LAD3 AW11
LAD3
SMBUS
+3V_S5 AL2 SMB0ALERT#
VCCRTC_2 R525 1K_4 +3V_RTC_1 H8 [27,28,31] LPC_LFRAME#
AV12 +3V_S5 SML0ALERT/GPIO60 AN1 VGA_MBCLK
1
SATA_RP1/PERP6_L2 A17 SATA_RXP1 [27] LFRAME SML0CLK AK1
20K/F_4
SATA_TN1/PETN6_L2 SATA_TXN1 [27] ODD +3V_S5 SML0DATA
VGA_MBDATA
BAT54C B17 +3V_S5 AU4 SMB1ALERT#
SATA_TP1/PETP6_L2 SATA_TXP1 [27] SML1ALERT/PCHHOT/GPIO73 SMB1ALERT# [29]
C182 J1 +3V_S5 AU3 SMB_ME1_CLK
AW8 J6 SML1CLK/GPIO75 AH3
+3V_RTC_[0:2] 2.2u/6.3V_4 *JUMP HDA_BCLK_R +3V_S5 SMB_ME1_DAT
2
HDA_SYNC_R AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6 PCH_SPI_CLK AA3 SML1DATA/GPIO74
Trace width = 20 mils R214 HDA_RST#_R AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14 PCH_SPI_CS0# Y7 SPI_CLK AF2 CL_CLK
HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 SPI_CS0 CL_CLK TP83
1
BT1 SRTC_RST# AY10 AUDIO SATA C15 Y4 AD2 CL_DAT

[26] PCH_AZ_CODEC_SDIN0 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1 SPI_CS1 CL_DATA TP85
AU12 AC2 SPI C-LINK AF4 CL_RST#
HDA_SDI1/I2S1_RXD SPI_CS2 CL_RST TP40
20K/F_4 HDA_SDO_R AU11 F5 PCH_SPI_SI AA2
BAT_CONN AW10 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 E5 PCH_SPI_SO AA4 SPI_MOSI
2
C185 C186 AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17 PCH_SPI_IO2 Y6 SPI_MISO

1u/6.3V_4 2.2u/6.3V_4 AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17 AF1 SPI_IO2
PCH_SPI_IO3
I2S1_SCLK SATA_TP3/PETP6_L0 SPI_IO3
1A-22013/10/16 Chage +3V_RTC_0 to VCCTC_2. +3V SATA0GP/GPIO34

V1 VGPU_EN VGPU_EN [38] 7 OF 19
+3V U1 ODD_PRSNT#
SATA1GP/GPIO35 ODD_PRSNT# [27]
+3V V6 DEVSLP_ODD
HDA [26] PCH_AZ_CODEC_RST# R236 33_4 HDA_RST#_R +3V
SATA2GP/GPIO36 AC1 GPIO37
DEVSLP_ODD [27]
SATA3GP/GPIO37 TP91
[4,13] XDP_TRST# AU62
HDA_SDO_R XDP_TCK1 AE62 PCH_TRST A12 SATA_IREF R690
[26] PCH_AZ_CODEC_SDOUT R572 33_4 [13] XDP_TCK1 *short_4 +V1.05S_ASATA3PLL
XDP_TDI AD61 PCH_TCK SATA_IREF L11 +3V
[26] PCH_AZ_CODEC_BITCLK
R570 33_4 HDA_BCLK_R
[13] XDP_TDI
[13] XDP_TDO
R592 *short_4 PCH_JTAG_TDOAE61
PCH_TDI RSVD K10 SMBus +3V_S5
AD62 PCH_TDO RSVD C12 SATA_RCOMP R688 GPIO37
[13] XDP_TMS JTAG 3.01K/F_4 +V1.05S_ASATA3PLL 10K_4 R615
AL11 PCH_TMS SATA_RCOMP U3 SATA_LED# R626 10K_4 +3V
C C490 AC4 RSVD SATALED DEVSLP_ODD *10K_4 R312 R589 10K_4 SMB0ALERT# C
*10p/50V_4 R581 *short_4 PCH_JTAGX AE63 RSVD R556 10K_4 SMB1ALERT#
[4,13] XDP_TCK0 JTAGX
PCH_EDM AV2 SATA_RCOMP *10K_4 R622 VGPU_EN 10K_4 R625 R271 10K_4 SMBALERT#
TP70 RSVD
Impedance = 50 ohm 1A-14 2013/12/02 change GPIO36 to PD.
R237 33_4 HDA_SYNC_R 1A-10 2013/10/25 reserve AV2 ball to GND. Trace length < 500 mils
[26] PCH_AZ_CODEC_SYNC
1A-12 2013/10/28 reserve AV2 ball to TP. Trace spacing = 15 mils 1B-2 2013/12/04 change GPIO36/GPI037 to PU. R238 2.2K_4 SMB_PCH_CLK
C221 *10p/50V_4 5 OF 19 R249 2.2K_4 SMB_PCH_DAT
R595 2.2K_4 VGA_MBDATA
R258 2.2K_4 VGA_MBCLK
PCH SPI ROM(8M+4M)
15ohm CS01502JB12
PCH JTAG
JTAG_TCK,JTAG_TMS MP remove(Intel) +3V_S5 R308 *Short_6 +3V_PCH_ME +3V_PCH_ME +3V
Trace Length < 9000mils
+1.05V_S5 U38
PCH_SPI_CS0# 1 8
XDP_TMS R585 51_4 CS# VCC
XDP_TDI R586 51_4 SPI_SO_8M 2 7 SPI_HOLD_IO3_ME R235 R252
PCH_JTAG_TDO
PCH_JTAGX
R591
R587
51_4
*1K_4 SPI_WP_IO2_ME 3
IO1/DO IO3/HOLD#
6 SPI_CLK_8M
SMBus(PCH) Q18
4.7K_4 4.7K_4
IO2/WP# CLK 5
XDP_TCK1 R580 *51_4 5 SPI_SI_8M C254
4 IO0/DI SMB_PCH_DAT 3 4
GND 0.1u/10V_4 CLK_SDATA [13,14,15,29]
W25Q64FW -- 8MB 2
B 6 1 B
SMB_PCH_CLK
ULT Strapping Table CLK_SCLK [13,14,15,29]
Pin Name Strap description Sampled Configuration note PCH_XDP_WLAN/S5 2N7002DW DDR_TP/S0
0 = Default enable (iPD 20K)
GPIO81(SPKR) No reboot on TCO Timer PWROK R304 *1K_4 SPKR
+3V SPKR [10,26]
expiration 1 =Disable No-Reboot mode
0 = Default can program ME (iPD 20K) HDA_SDO_R
[31] PCH_SPI_CLK_EC PCH_SPI_CLK_EC R593 15_4 SMBus(EC) +3V_S5
HDA_SDO Flash Descriptor Security PWROK R573 *short_4
ME_WR# [31]
Override / Intel ME Debug Mode 1 =can't program ME PCH_SPI_CLK R602 15_4 SPI_CLK_8M
INTVRMEN Integrated 1.05V VRM enable ALWAYS 1=Should be always pull-up +3V_RTC R545 330K_4 PCH_INTVRMEN R558 *330K_4 C522 *22p/50V_4 R241 R259
*2.2K_4 *2.2K_4
Q19
0 = Default disable (iPD 20K) PCH_SPI_SI_EC R598 15_4 5
[10] GPIO66 [31] PCH_SPI_SI_EC
GPIO66 Top-Block Swap override
1 = Enable TBS function R356 *1K_4 GPIO66 R361 *1K_4 3 4 SMB_ME1_CLK
+3V [19,31] 2ND_MBCLK
PCH_SPI_SI R604 15_4 SPI_SI_8M
0 = Default SPI (iPD 20K) [10] GPIO86
2
GPIO86 Boot BIOS Strap Bit
R343 *1K_4 GPIO86 R346 *1K_4 R605 *1K_4
1 =LPC +3V +3V_PCH_ME
6 1 SMB_ME1_DAT
[19,31] 2ND_MBDATA
0 = Default enable w/o PCH_SPI_IO3 R600 15_4 SPI_HOLD_IO3_ME
confidentiality(iPD 20K)
[10] GPIO15 +3V_PCH_ME
R648 *1K_4 EC/S5 *2N7002DW PCH/S5
GPIO15 TLS(Transport layer security)
A 1 =Default enable with +3V_S5 R317 8.2K_4 GPIO15 R307 *1K_4 PCH_SPI_IO2 R657 15_4 SPI_WP_IO2_ME A
2ND_MBCLK R240 *short_4SMB_ME1_CLK
confidentiality 2ND_MBDATA R263 *short_4SMB_ME1_DAT
0 = Enable an external display [31] PCH_SPI_SO_EC PCH_SPI_SO_EC R649 15_4

CFG4 port is connected to the eDP CFG4 PCH_SPI_SO SPI_SO_8M
DP presence strap R611 1K_4 R658 15_4
1 =disable
[6,13] CFG4
+3V_PCH_ME R313 10K_4
PROJECT : ZRT/ZRTA
[7] DSWVREN
DSWVREN Deep Sx well on die VR enable 1=Should be always pull-up [31] SPI_CS0#_UR_ME R639 *short_4 PCH_SPI_CS0# Size Document Number Rev
+3V_RTC R557 330K_4 DSWVREN R567 *330K_4 LPT 2/6 (SATA/HDA/SPI) 3A

5 4 3 2 1
https://t.me/biosarchive https://t.me/schematicslaptop
5 4 3 2 1
Haswell ULT PCH (PCIE,USB3.0,USB2.0) Haswell ULT PCH (CLOCK) XTAL24_IN C539 12p/50V_4
3
4
1A-6 2013/10/21 reversal PEG lan for layout.
1A-8 2013/10/21 Swap PEG to nomroal mode. U37K HSW_ULT_DDR3L 1A-1 2013/10/15 following up acer define and swap USB3 and USB2 R707 Y3
USB2 port. 1M_4 24MHz
[16] PEG_RX#0 F10 DSW AN8 USBP0- [30]
1
2
E10 PERN5_L0 USB2N0 AM8
[16] PEG_RX0 PERP5_L0 DSW USB2P0 USBP0+ [30] MB USB3.0
D XTAL24_OUT D
[16] PEG_TX#0 C532 [email protected]/10V_4 C_PEG_TX#0 C23 DSW AR7 USBP1- [30] C541 12p/50V_4
C533 [email protected]/10V_4 C_PEG_TX0 C22 PETN5_L0 USB2N1 AT7 HSW_ULT_DDR3L
[16] PEG_TX0 PETP5_L0 DSW USB2P1 USBP1+ [30] MB USB3.0 U37F
[16] PEG_RX#1 F8 DSW AR8

E8 PERN5_L1 USB2N2 AP8
[16] PEG_RX1 PERP5_L1 DSW USB2P2 DB USB2.0
PEG x4
[16] PEG_TX#1 C525 [email protected]/10V_4 C_PEG_TX#1 B23 DSW AR10 TP111 CLK_PCIE_N0 C43 A25 XTAL24_IN
PETN5_L1 USB2N3 USBP3- [30] CLKOUT_PCIE_N0 XTAL24_IN
[16] PEG_TX1
C526 [email protected]/10V_4 C_PEG_TX1 A23 DSW AT10 DB USB2.0 TP108 CLK_PCIE_P0 C42 B25 XTAL24_OUT
PETP5_L1 USB2P3 USBP3+ [30] CLKOUT_PCIE_P0 XTAL24_OUT
TP96 CLK_PCIE_REQ0# U2
PCIECLKRQ0/GPIO18
+3V
[16] PEG_RX#2 H10 DSW AM15 USBP4- [28] K21
G10 PERN5_L2 USB2N4 AL15 B41 RSVD M21
[16] PEG_RX2 PERP5_L2 DSW USB2P4 USBP4+ [28] BT CLKOUT_PCIE_N1 RSVD
A41 C26 ICLK_BIAS R382 3.01K/F_4
CLKOUT_PCIE_P1 DIFFCLK_BIASREF +V1.05S_AXCK_LCPLL
[16] PEG_TX#2 C530 [email protected]/10V_4 C_PEG_TX#2 B21 DSW AM13 TP42 CLK_PCIE_REQ1# Y5 +3V
C531 [email protected]/10V_4 PETN5_L2 USB2N5 USBP5- [23] PCIECLKRQ1/GPIO19
[16] PEG_TX2 C_PEG_TX2 C21 DSW AN13 USBP5+ [23] Touch screen C35 TESTLOW_C35
PETP5_L2 USB2P5 C41 CLOCK TESTLOW_C35 C34 TESTLOW_C34
VGA WLAN LAN

[25] CLK_PCIE_LANN CLKOUT_PCIE_N2 TESTLOW_C34
[16] PEG_RX#3
E6 DSW AP11 USBP6- [23] [25] CLK_PCIE_LANP
B42 AK8 TESTLOW_AK8
PERN5_L3 USB2N6 CLK_PCIE_REQ2# AD1 CLKOUT_PCIE_P2 TESTLOW_AK8
[16] PEG_RX3 F6
PERP5_L3 DSW USB2P6
AN11 USBP6+ [23] CCD [25] CLK_PCIE_LAN_REQ# R608 *short_4
PCIECLKRQ2/GPIO20
+3V SIGNALS
TESTLOW_AL8
AL8 TESTLOW_AL8
R247 TPM@22_4 PCLK_TPM [27]
[16] PEG_TX#3 C527 [email protected]/10V_4 C_PEG_TX#3 B22 DSW AR13 USBP7- [30] [28] CLK_PCIE_WLANN B38 AN15 CLK_PCH_PCI3 R248 22_4 CLK_PCI_LPC [28]
A21 PETN5_L3 USB2N7 AP13 C37 CLKOUT_PCIE_N3 CLKOUT_LPC_0 AP15 CLK_PCH_PCI4
[16] PEG_TX3 C528 [email protected]/10V_4 C_PEG_TX3
PETP5_L3 DSW USB2P7 USBP7+ [30] Card reader [28] CLK_PCIE_WLANP CLKOUT_PCIE_P3 CLKOUT_LPC_1
R246 22_4 CLK_PCI_EC [31]
[28] PCIE_CLKREQ_WLAN# R647 *short_4 CLK_PCIE_REQ3# N1
PCIECLKRQ3/GPIO21 +3V
G11 B35
[25] PCIE_RX3-_LAN PERN3 CLKOUT_ITPXDP CLK_PCIE_XDPN [13]
[25] PCIE_RX3+_LAN
F11 G20 USB3_RXN0 [30] [16] CLK_PCIE_VGA#
A39 A35 CLK_PCIE_XDPP [13]
PERP3 USB3RN1 H20 B39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P
LAN
USB3RP1 USB3_RXP0 [30] [16] CLK_PCIE_VGA CLKOUT_PCIE_P4

[25] PCIE_TX3-_LAN C538 0.1u/10V_4 PCIE_TX3- C29 [16] CLK_PEGA_REQ# R344 *short_4 CLK_PCIE_REQ4# U5 +3V
B30 PETN3 PCIE USB C33 PCIECLKRQ4/GPIO22
[25] PCIE_TX3+_LAN C537 0.1u/10V_4 PCIE_TX3+
PETP3 +3V_S5 USB3TN1 USB3_TXN0 [30]
C +3V_S5 B34 USB3_TXP0 [30] B37 C
F13 USB3TP1 A37 CLKOUT_PCIE_N5
WLAN
[28] PCIE_RX4-_WLAN PERN4 CLKOUT_PCIE_P5

[28] PCIE_RX4+_WLAN G13
PERP4 USB3RN2
E18 USB3_RXN1 [30] MB USB3.0 CLK_PCIE_REQ5# T2
PCIECLKRQ5/GPIO23
+3V
F18 USB3_RXP1 [30]
C536 0.1u/10V_4 PCIE_TX4- B29 USB3RP2
[28] PCIE_TX4-_WLAN PETN4
C535 0.1u/10V_4 PCIE_TX4+ A29 +3V_S5 B33 6 OF 19
[28] PCIE_TX4+_WLAN PETP4 USB3TN2 USB3_TXN1 [30]
+3V_S5 A33 USB3_TXP1 [30]
G17 USB3TP2
F17 PERN1/USB3RN3
PERP1/USB3RP3
USBCOMP +3V
C30 +3V_S5
C31 PETN1/USB3TN3 AJ10
Impedance = 50 ohm
PETP1/USB3TP3 +3V_S5 USBRBIAS
USBCOMP R257 22.6/F_4
Trace length < 500 mils
AJ11 CLK_PCIE_REQ0# R630 10K_4
F15 USBRBIAS AN10 Trace spacing = 15 mils CLK_PCIE_REQ1# R311 10K_4
G15 PERN2/USB3RN4 RSVD AM10 CLK_PCIE_REQ2# R607 10K_4
PERP2/USB3RP4 RSVD USB Overcurrent CLK_PCIE_REQ3# R646 10K_4 CLK_PCI_EC CLK_PCI_LPC PCLK_TPM
B31 +3V_S5 CLK_PCIE_REQ5# R629 10K_4
PETN2/USB3TN4 +3V_S5
A31
PETP2/USB3TP4 +3V_S5
+3V_S5 AL3 USB_OC0# USB_OC0# [30] MB U3 RP2
OC0/GPIO40 AT1 USB_OC1# 10 1
+3V_S5 OC1/GPIO41 USB_OC1# [30] DB U2 TESTLOW_C35 R685 10K_4 C68 C486 C86
+3V_S5 AH2 USB_OC2# USB_OC0# 9 2 TESTLOW_C34 R407 10K_4 *18p/50V_4 *18p/50V_4 *18p/50V_4
OC2/GPIO42 AV3 USB_OC3# 8 3
E15
RSVD
+3V_S5 OC3/GPIO43
USB_OC1# TESTLOW_AK8 R218 10K_4
E13 USB_OC2# 7 4 TESTLOW_AL8 R217 10K_4
R339 3.01K/F_4 PCIE_RCOMP A27 RSVD USB_OC3# 6 5
R338 *short_4 PCIE_IREF B27 PCIE_RCOMP
+V1.05S_AUSB3PLL PCIE_IREF 10K_10P8R
+3V
B B
11 OF 19
CLK_PCIE_REQ4# R341 10K_4
R334 *1K_4
A
https://t.me/biosarchive A

PROJECT :ZRT/ZRTA
3A
LPT 3/6 (PCIE/USB/CLK)
5 4 3 2 1
5 4 3 2 1
Haswell ULT PCH (GPIO,CPU/MISC,NCTF)

High Low HSW_ULT_DDR3L PCH GPIO PU/PD
U37J
+3V
GPIO8 Touch panel No touch panel IRQ_SERIRQ R643 10K_4
DEVSLP0 R641 *10K_4
BOARD_ID0 P1 D60 THRMTRIP# DEVSLP1
BMBUSY/GPIO76 +3V
R654 *10K_4
D AU2 THRMTRIP V4 D
[23] GPIO8
GPIO8
GPIO8 +3V_S5 +3V RCIN/GPIO82
SIO_RCIN#
SIO_RCIN# [31]
SIO_RCIN# R627 10K_4
LAN_DISABLE# AM7 +3V_S5 T4 IRQ_SERIRQ
IRQ_SERIRQ [27,31]
SIO_EXT_SMI# R342 10K_4
GPIO15 AD6 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ AW15 OPI_COMP2 SIO_EXT_SCI#
GPIO15 +3V_S5
[8] GPIO15 R547 49.9/F_4 R668 10K_4
SKU_ID0 Y1 MISC PCH_OPI_RCOMP AF20
DGPU_PWROK T3 GPIO16 +3V RSVD AB21
[18] DGPU_PWROK
AD5 GPIO17 +3V RSVD
GPIO24 +3V_S5
GPIO24 GPIO85 R336 10K_4
WK_GPIO27 AN5 GPIO87 R326 10K_4
GPIO28 AD7 GPIO27 DSW GPIO88
GPIO28 +3V_S5
R348 10K_4
AN3
GPIO26 +3V_S5
GPIO26 GPIO89 R329 10K_4
+3V R6 TP_INT_PCH GPIO90 R660 10K_4
GSPI0_CS/GPIO83 TP_INT_PCH [23]
AG6 L6
GPIO56 +3V_S5 +3V
GPIO56 GPIO84 GPIO91 R661 10K_4
TP36 AP1 GSPI0_CLK/GPIO84 N6
TP72
GPIO58 AL4 GPIO57 +3V_S5 +3V GSPI0_MISO/GPIO85 L8 GPIO86 GPIO93
GPIO58 +3V_S5 +3V GPIO86 [8] R670 10K_4
TP31 GSPI0_MOSI/GPIO86 R7
AT5
GPIO59 +3V_S5 +3V
TP21 AK4 GSPI1_CS/GPIO87 L5
GPIO44 GPIO GPIO88 R680 *10K_4 PCH_ODD_EN R679 10K_4
GPIO47 AB6 GPIO44 +3V_S5 +3V GSPI1_CLK/GPIO88 N7 GPIO89 GPIO65
GPIO47 +3V_S5 +3V R673 10K_4
DGPU_HOLD_RST# U4 GSPI1_MISO/GPIO89 K2
GPIO48 +3V +3V GPIO90 TP_INT_PCH R322 10K_4
[16] DGPU_HOLD_RST# GSPI_MOSI/GPIO90
DGPU_PWR_EN Y3 J1 GPIO91 GPIO84
GPIO49 +3V +3V
[39] DGPU_PWR_EN R352 10K_4
DGPU_PW_CTRL# P3 UART0_RXD/GPIO91 K3
GPIO50 +3V +3V GPIO92 I2C0_SDA_GPIO4 R674 2.2K_4
MODPHY_EN Y2 UART0_TXD/GPIO92 J2 GPIO93 I2C0_SCL_GPIO5 R675 2.2K_4
[34] MODPHY_EN
GPIO13 AT3 HSIOPC/GPIO71 +3V +3V
SERIAL IO UART0_RTS/GPIO93 G1 GPIO94 GPIO67
GPIO13 +3V_S5 +3V R677 10K_4
AH4 UART0_CTS/GPIO94 K4
GPIO14 +3V_S5
GPIO14 +3V SIO_EXT_SMI# GPIO68 R683 10K_4
UART1_RXD/GPIO0 SIO_EXT_SMI# [31]
GPIO25 AM4 G2 SIO_EXT_SCI# GPIO69 R678 10K_4
TP30
GPIO45 AG5 GPIO25 DSW +3V UART1_TXD/GPIO1 J3 DGPU_EVENT#
SIO_EXT_SCI# [31]
DGPU_PWR_EN
GPIO45 +3V_S5 +3V DGPU_EVENT# [19] R621 *100K_4 R620 *10K_4
TP39 AG3 UART1_RST/GPIO2 J4
ACCEL_INTA
GPIO46 +3V_S5 +3V GC6_FB_EN I2C1_SDA_GPIO6 R349 2.2K_4
[29] ACCEL_INTA UART1_CTS/GPIO3 GC6_FB_EN [17,19]
+3V F2 I2C0_SDA_GPIO4
I2C0_SDA_GPIO4 [29]
I2C1_SCL_GPIO7 R350 2.2K_4
C I2C0_SDA/GPIO4 C
GPIO9 AM3 +3V_S5 +3V F3 I2C0_SCL_GPIO5 I2C0_SCL_GPIO5 [29] DGPU_HOLD_RST# R347 10K_4
GPIO10 AM2 GPIO9 I2C0_SCL/GPIO5 G4 I2C1_SDA_GPIO6 R671 *10K_4 GC6_FB_EN R667 *10K_4
GPIO10 +3V_S5 +3V I2C1_SDA/GPIO6 I2C1_SDA_GPIO6 [23]
DEVSLP0 P2 +3V +3V F1 I2C1_SCL_GPIO7
[27] DEVSLP0 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 I2C1_SCL_GPIO7 [23]
BOARD_ID3 C4 +3V +3V E3 PCH_ODD_EN
PCH_ODD_EN [27]
1A-1 20131015 For GC6 NV DG GC6_FB_EN PD.
DEVSLP1 L2 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 F4 GPIO65
DEVSLP1/GPIO38 +3V +3V SDIO_CMD/GPIO65
SKU_ID1 N5 +3V +3V D3 GPIO66
GPIO66 [8] 1A-8 20131022 Change GPIO83/84 GPU GC6 pin
V2 DEVSLP2/GPIO39 SDIO_D0/GPIO66 E4
[8,26] SPKR
SPKR
SPKR/GPIO81 +3V +3V SDIO_D1/GPIO67
GPIO67 to GPIO2/3.
+3V C3 GPIO68 1A-12 20131029 Change GPIO45 to PU S5,
SDIO_D2/GPIO68 E2
+3V SDIO_D3/GPIO69
GPIO69 GPU GC6 2.0 function use duble GPIO58 one is GPIO56.
GPIO2/3.
10 OF 19
high UMA Only
GPU power is control by PCH

low GPIO (Discrete, SG or Optimize) +3V
Board ID RAM ID CPU thermal trip
+1.05V_VCCST R634 EV@100K_4 DGPU_PW_CTRL# R633 IV@1K_4
+3V DGPU_PWROK R321 *10K_4
3
DGPU_PWROK PD on GPU side +3V_S5
R642 SR@10K_4 BOARD_ID0 R632 DR@10K_4
LAN_DISABLE# R224 10K_4
IMVP_PWRGD_3V 2 Q22
[2] BOARD_ID1
GPIO8 R243 10K_4
B R325 GS@10K_4 BOARD_ID1 R324 NGS@10K_4 FDV301N ACCEL_INTA R303 *10K_4 B
GPIO24 R315 10K_4
[2] BOARD_ID2
GPIO28 R609 10K_4
1
GPIO47 R617 10K_4
R645 NAC@10K_4 BOARD_ID2 R644 AC@10K_4 +1.05V_VCCST GPIO57 R588 10K_4
R292 GPIO56 R310 10K_4
R687 NTPM@10K_4 BOARD_ID3 R684 TPM@10K_4 1K_4 GPIO59 R226 10K_4
GPIO26 R262 10K_4
R281 GPIO58 R288 10K_4
[2] BOARD_ID4
GPIO44 R599 10K_4
2
R656 10K_4 BOARD_ID4 R655 *10K_4 1K_4 GPIO13 R582 10K_4
GPIO14 R302 10K_4
THRMTRIP# 1 3 GPIO9 R261 10K_4
SYS_SHDN# [33,37]
Q21 MMBT3904-7-F GPIO10 R272 10K_4
+3V GPIO45 R309 10K_4
SKU ID R275 10K_4
R244 *10K_4
Low High R624 IV@10K_4 SKU_ID0 R623 EV@10K_4
U18 +1.05V_VCCST +3V +3VPCU
R331 IV@10K_4 SKU_ID1 R330 EV@10K_4 GPIO25 R278 *10K_4
BOARD_ID0 single rank SKU Dual rank SKU 1 5 R251 *10K_4
NC VCC WK_GPIO27 R245 10K_4
1
R301
2 C255
BOARD_ID1 Reserved Reserve SKU_ID1 SKU_ID0 VGA H/W Setup [5,36] IMVP_PWRGD A 0.1u/10V_4
10K_4
1B-7 20131220 Change +3VPCU to +3V_S5
(Default)
2
Signal Menu non deep sx
A 3 4 IMVP_PWRGD_3V [7] GPIO27 : If not used then use A
UMA Only 0 0 UMA Hidden UMA boot GND Y
8.2-kΩ to 10-kΩ pull-down to GND.
BOARD_ID2 74AUP1G07GW
No IOAC IOAC dGPU Only 0 1 GPU Hidden GPU boot
Switchable
1 0 UMA+GPU dGPU/SG UMA boot
BOARD_ID3 No TPM TPM (Mux) PROJECT : ZRT/ZRTA
Non-Dolly Size Document Number Rev
Optimize
1 1 UMA UMA/SG UMA boot
BOARD_ID4 (Default) Dolly (Muxless) LPT 4/6 (GPIO/MISC) 3A

5 4 3 2 1
5 4 3 2 1
Haswell ULT PCH (Power) +3VCC_S5
C243
C268 *1u/6.3V_4 1u/6.3V_4
C265 1u/6.3V_4
C262 1u/6.3V_4 U37M HSW_ULT_DDR3L
1.838A K9
1mA
+1.05V_MODPHY VCCHSIO
+1.05V L10
VCCHSIO +3V_RTC
M9
R397 *short_8
1.741A +V1.05S_AIDLE N8 VCCHSIO HSIO RTC AH11
P9 VCC1_05 VCCSUS3_3 AG10 C184 C487 C183
D B18 VCC1_05 VCCRTC AE7 +VCCRTCEXT 0.1u/10V_4 0.1u/10V_4 1u/6.3V_4 D
+V1.05S_AUSB3PLL VCCUSB3PLL DCPRTC
C284 +V1.05S_ASATA3PLL B11
*1u/6.3V_4 VCCSATA3PLL
C257
Y20 SPI Y8 +V3.3M_PSPI
18mA 0.1u/10V_4
AA21 RSVD VCCSPI R320 *Short_6
R377 *0_6
10mA +V1.05S_APLLOPI
W21 VCCAPLL
OPI +3V_S5
+1.05V_S5 VCCAPLL AG14 R318 *0_6 +3V
VCCASW AG13 PCH_VCC_1_1_21
C278 C271 VCCASW
10u/6.3V_6 1u/6.3V_4 +1.05V_DCPSUS3 J13 USB3
+1.05V C258
DCPSUS3 J11 +V1.05S_CORE_PCH R335 *Short_6 0.1u/10V_4
VCC1_05 +1.05V
H11
AH14 HDA VCC1_05 H15
25mA +V3.3DX_1.5DX_1.8DX_AUDIO VCCHDA VCC1_05 AE8
2.063A
+1.05V_S5 R286 *0_4 +1.05V_DCPSUS2 R299 *short_8
VCC1_05 +1.05V
AF22
AH13 VCC1_05 AG19
Deep Sx 0.114A DCPSUS2
VRM
DCPSUSBYP
C238 +3VPCU R565 *0_6 CORE AG20 C233 C232 C239
1u/6.3V_4 C197 22u/6.3V_8 DCPSUSBYP AE9 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6
R566 *Short_6 VCCASW AF9
+3V_S5 VCCASW
AC9 AG8
+3VCC_S5 VCCSUS3_3 VCCASW
Non Deep Sx AA9 GPIO/LPC AD10 +1.05V_DCPSUS1 +PCH_VCCDSW
C494 +VCCPDSW AH10 VCCSUS3_3 DCPSUS1 AD8
1u/6.3V_4 +V3.3S_VCCPCORE V8 VCCDSW3_3 DCPSUS1
W9 VCC3_3 C230
VCC3_3 J15 1u/6.3V_4
R380 *short_8
41mA THERMAL SENSOR VCCTS1_5 K14
+3V VCC3_3 K16 +V1.05M_VCCASW
VCC3_3
C274 +V1.05M_VCCASW
658mA R314 *short_8 +1.05V
C 22u/6.3V_8 J18 C
+V1.05S_AXCK_DCB
K19 VCCCLK SERIAL IO U8
109mA
A20 VCCCLK VCCSDIO T9 R290 *0_4 C248 C247
+V1.05S_AXCK_LCPLL VCCACLKPLL VCCSDIO
J17 1u/6.3V_4 22u/6.3V_8
+1.05V VCCCLK +1.05V_S5
+1.05V
R21
C242 1u/6.3V_4 T21 VCCCLK LPT LP POWER C241
C276 1u/6.3V_4 K18 VCCCLK SUS OSCILLATOR AB8 1u/6.3V_4
M20 RSVD DCPSUS4
WW15 4/10 Intel VCCDSW3 RSVD
63mA V21 3mA
G3 can't boot issue. AE20 RSVD AC20 +V1.5S_VCCATS R378 *Short_6
C492 +3VCC_S5 VCCSUS3_3 RSVD +1.5V
AE21 AG16 41mA
+VCCPDSW +PCH_VCCDSW VCCSUS3_3 USB2 VCC1_05 AG17 +V3.3S_VCCPTS R379 *Short_6
VCC1_05 +3V
0.47u/25V_6 C272
13 OF 19 1u/6.3V_4
+V3.3S_VCCSDIO
17mA R364 *Short_6 +3V
PCH VCCHSIO Power +1.05V_DCPSUS4 R300 *0_4 +1.05V_S5
C266
1u/6.3V_4
C244
1u/6.3V_4
+V1.05S_VCCUSBCORE R291 *short_8 +1.05V

B B
C231
1u/6.3V_4
1A-1 2013/10/11 del LDO change to MOS.

VCCAPLL power +1.05V +V1.05S_AXCK_DCB
+1.05V +V1.05S_APLLOPI L20 2.2uH/210mA_8

0.2A
L21 2.2uH/210mA_8
57mA
C311 C319 C273
47u/6.3V_8 47u/6.3V_8 1u/6.3V_4
C303 C293 C282

*47u/6.3V_8 *47u/6.3V_8 1u/6.3V_4
+1.05V +V1.05S_AXCK_LCPLL
PCH HDA Power L19 2.2uH/210mA_8

31mA
+1.05V_MODPHY +V1.05S_AUSB3PLL +1.05V_MODPHY +V1.05S_ASATA3PLL
11mA
A L27 2.2uH/210mA_8
41mA L26 2.2uH/120mA_6
42mA C292 C297 C288 A
+3V_S5 +V3.3DX_1.5DX_1.8DX_AUDIO 1u/6.3V_4
47u/6.3V_8 47u/6.3V_8
R222 *Short_6
C543 C542 C524 C534 C540 C529
47u/6.3V_8 47u/6.3V_8 1u/6.3V_4 47u/4V_8 47u/4V_8 1u/6.3V_4
C199
0.1u/10V_4 Quanta Computer Inc.
Place close to ball PROJECT : ZRT/ZRTA
2013/10/31 PN change to H=0.85.L17 H=0.9 Size Document Number Rev
3A
LPT 5/6 (POWER)
5 4 3 2 1
5 4 3 2 1
Haswell ULT (GND)
HSW_ULT_DDR3L HSW_ULT_DDR3L HSW_ULT_DDR3L HSW_ULT_DDR3L

U37N U37O U37P U37R
D H17 D
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10 N23
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22 RSVD R23
A24 VSS VSS AJ43 AP29 VSS VSS AW24 D37 VSS VSS J59 RSVD T23
A28 VSS VSS AJ45 AP3 VSS VSS AW33 D38 VSS VSS J63 AT2 RSVD U10
VSS VSS VSS VSS VSS VSS AU44 RSVD RSVD
A32 AJ47 AP31 AW35 D39 K1 RSVD
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D41 VSS VSS K12 AV44
VSS VSS VSS VSS VSS VSS D15 RSVD
A40 AJ52 AP39 AW4 D42 L13 RSVD AL1
A44 VSS VSS AJ54 AP48 VSS VSS AW40 D43 VSS VSS L15 RSVD AM11
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D45 VSS VSS L17 RSVD AP7
VSS VSS VSS VSS VSS VSS F22 RSVD
A52 AJ58 AP54 AW44 D46 L18 H22 RSVD AU10
A56 VSS VSS AJ60 AP57 VSS VSS AW47 D47 VSS VSS L20 RSVD AU15
J21 RSVD
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D49 VSS VSS L58 RSVD AW14
RSVD
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61 RSVD AY14
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7 RSVD
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10 18 OF 19
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
C AF15 VSS VSS AL40 AT43 VSS VSS AY59 F34 VSS VSS U9 C
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62 VSS_SENSE_R R672 *short_4
VSS VSS VSS VSS VSS VSS_SENSE VSS_SENSE [36]
AH24 AN23 AU33 C11 AH16
AH28 VSS VSS AN31 AU51 VSS VSS C14 VSS
16 OF 19 R665 100/F_4
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH44 VSS VSS AN45 AV24 VSS VSS D12
B
AH57 VSS VSS AN52 AV39 VSS VSS D23 B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ25 VSS VSS AP10 AV49 VSS VSS D29
VSS VSS VSS VSS
15 OF 19
14 OF 19
HSW_ULT_DDR3L
U37Q
DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3

DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 TP_DC_TEST_A4
DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 TP113
TP66
TP_DC_TEST_AY60 AY60
DC_TEST_AY61_AW61 AY61 DAISY_CHAIN_NCTF_AY60 A60 TP_DC_TEST_A60
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 TP110
DC_TEST_AY62_AW62 AY62 A61 DC_TEST_A61_B61
TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 TP_DC_TEST_A62
A TP112 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 TP107 A
DC_TEST_A3_B3 B3 AV1 TP_DC_TEST_AV1
DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 TP69
DC_TEST_A61_B61 B61 AW1 TP_DC_TEST_AW1
DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 TP71
DC_TEST_B62_B63 B62 AW2 DC_TEST_AY2_AW2
B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW3
DC_TEST_C1_C2 C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW61
C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW62
DAISY_CHAIN_NCTF_C2
17 OF 19
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
AW63 TP_DC_TEST_AW63 TP67 Quanta Computer Inc.
PROJECT : ZRT/ZRTA
LPT 6/6 (GND) 3A

5 4 3 2 1
5 4 3 2 1
+3V_S5
H_SYS_PWROK_XDP R274 *1K_4
+3V
NOA_STBP_0
[4] XDP_PREQ# TP98 TP79 NOA_STBP_0 [6]
XDP_DBRESET_N R613 *1K_4 NOA_STBN_0
[4] XDP_PRDY# TP101 TP75 NOA_STBN_0 [6]
D D
CFG0 CFG8
[6] CFG0 TP33 TP84 CFG8 [6]
CFG1 CFG9
[6] CFG1 TP73 TP86 CFG9 [6]
CFG2 CFG10
[6] CFG2 TP80 TP34 CFG10 [6]
CFG3 CFG11
[6] CFG3 TP78 TP41 CFG11 [6]
NOA_STBP_1
[4] XDP_BPM#0 TP48 TP89 NOA_STBP_1 [6]
NOA_STBN_1
[4] XDP_BPM#1 TP105 TP90 NOA_STBN_1 [6]
CFG4 CFG12
[6,8] CFG4 TP81 TP94 CFG12 [6]
CFG5 CFG13
[6] CFG5 TP82 TP92 CFG13 [6]
CFG6 CFG14
[6] CFG6 TP38 TP93 CFG14 [6]
CFG7 CFG15
[6] CFG7 TP37 TP95 CFG15 [6]
R125 *1K_4 VCCST_PWRGD_XDP CK_XDP_P_R R721 *0_4 CLK_PCIE_XDPP [9]
[31,34] HWPG_1.05V_S5 TP64 TP122
NBSWON# CK_XDP_N_R R720 *0_4
TP12 TP127 CLK_PCIE_XDPN [9]
XDP_RST_R_N R225 *1K_4
[5] PWR_DEBUG TP45 TP20 PLTRST# [7,16,25,27,28,31]
R273 *0_4 H_SYS_PWROK_XDP XDP_DBRESET_N R616 *0_4 SYS_RESET#
[7] SYS_PWROK TP27 TP88
XDP_TDO R198 *51_4
[8,14,15,29] CLK_SDATA TP23 TP14 +1.05V_S5
[8,14,15,29] CLK_SCLK XDP_TRST_N
TP24 TP19
XDP_TDI
C [8] XDP_TCK1 TP76 TP15 C
XDP_TMS
[4,8] XDP_TCK0 TP50 TP18
https://t.me/schematicslaptop +3V
C180
*0.1u/10V_4
U13
14
VCC
B XDP_TDO 2 3 B
[8] XDP_TDO 1A 1B XDP_TDO_CPU [4]
1
APS1 R137 *0_6 APS3 R136 *0_6 APS7 1OE
[8] XDP_TDI XDP_TDI 5 6
2A 2B XDP_TDI_CPU [4]
APS 4
2OE
[8] XDP_TMS XDP_TMS 9 8
+3VCC_S5 3A 3B XDP_TMS_CPU [4]
CN2 10
1 APS1 R133 *0_6 3OE
1 2 R130 *0_4 12 11
XDP_TRST_N
2 SUSB# [7,31] 4A 4B XDP_TRST# [4,8]
3 APS3 R132 *0_6
+3VPCU
3 4 R138 *0_4 13
4 5 PCH_SLP_S5# [7] 4OE 15
R139 *0_4
5 6 R142 *0_4 SUSC# [7,31] DPAD
6 7 PCH_SLP_A# [7] 7
APS7 R131 *0_6 +3VPCU
7 8 GND
8 9 R144 *0_4 *74CBTLV3126
9 10 RTC_RST# [8]
10 11 R146 *0_4
11 12 NBSWON# [29,31] +1.05V +3V
12 13 R149 *0_4 SYS_RESET# U14
13 14 SYS_RESET# [7]
A 14 15 1 5 A
15 16 NC VCC R216
16
1
17 *10K_4
17 18 2 C198
18 [5] VCCST_PWRGD A *0.1u/10V_4 Quanta Computer Inc.
2
*ACES_88511-180N
3 4
GND Y PROJECT : ZRT/ZRTA
*74AUP1G07GW
CPU/PCH XDP 3A

5 4 3 2 1
1 2 3 4 5 6 7 8
+1.35V_SUS
[3] M_A_A[15:0] JDIM1A JDIM1B
M_A_A0 98 5 M_A_DQ2 [3] 75 44
M_A_A1 97 A0 DQ0 7 76 VDD1 VSS16 48
A1 DQ1 M_A_DQ6 [3] VDD2 VSS17
M_A_A2 96 15 M_A_DQ7 [3] 81 49
M_A_A3 95 A2 DQ2 17 82 VDD3 VSS18 54
M_A_A4 92 4 87 55
M_A_A5 91 6 M_A_DQ1 [3] 88 60
M_A_A6 90 A5 DQ5 16 93 VDD6 VSS21 61
M_A_A7 86 18 M_A_DQ4 [3]
94 65
A7 DQ7 VDD8 VSS23
M_A_A8
M_A_A9
89
85 A8 DQ8
21
23
M_A_DQ9 [3] 2.48A 99
100 VDD9 VSS24
66
71
M_A_A10 107 33 M_A_DQ15 [3] 105 72
A M_A_A11 84 A10/AP DQ10 35 106 VDD11 VSS26 127 A
PC2100 DDR3 SDRAM SO-DIMM

A11 DQ11 M_A_DQ11 [3] VDD12 VSS27
M_A_A12 83 22 M_A_DQ12 [3]
111 128
M_A_A13 119 A12/BC# DQ12 24 112 VDD13 VSS28 133
A13 DQ13 M_A_DQ13 [3] VDD14 VSS29
M_A_A14 80 34 M_A_DQ14 [3] 117 134
M_A_A15 78 A14 DQ14 36 118 VDD15 VSS30 138
A15 DQ15 M_A_DQ10 [3] VDD16 VSS31
39 123 139

DQ16 M_A_DQ16 [3] VDD17 VSS32
109 41 M_A_DQ17 [3]
124 144
[3] M_A_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_A_DQ19 [3] 145
[3] M_A_BS#1 79 BA1 DQ18 53 199 VSS34 150
[3] M_A_BS#2 BA2 DQ19 M_A_DQ18 [3] +3V VDDSPD VSS35
114 40 M_A_DQ21 [3] 151
[3] M_A_CS#0 121 S0# DQ20 42 77 VSS36 155
[3] M_A_CS#1 S1# DQ21 M_A_DQ20 [3] NC1 VSS37
101 50 M_A_DQ23 [3]
122 156
[3] M_A_CLK0 CK0 DQ22 NC2 VSS38
103 52 M_A_DQ22 [3] R104 *10K_4 125 161
[3] M_A_CLK0# 102 CK0# DQ23 57 +3V NCTEST VSS39 162
[3] M_A_CLK1 CK1 DQ24 M_A_DQ25 [3] VSS40
104 59 M_A_DQ24 [3] PM_EXTTS#0 198 167
[3] M_A_CLK1# CK1# DQ25 EVENT# VSS41
73 67 30 168
[3] M_A_CKE0 CKE0 DQ26 M_A_DQ31 [3] [4,15] DDR3_DRAMRST# RESET# VSS42
74 69 C83 *0.1u/10V_4 172
[3] M_A_CKE1 CKE1 DQ27 M_A_DQ26 [3] VSS43
115 56 173
[3] M_A_CAS# CAS# DQ28 M_A_DQ28 [3] VSS44
110 58 +SMDDR_VREF_DQ0 1 178
[3] M_A_RAS# RAS# DQ29 M_A_DQ29 [3] +SMDDR_VREF_DQ0 VREF_DQ VSS45
113 68 M_A_DQ27 [3]
126 179
[3] M_A_WE# WE# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
R119 10K_4 DIMM0_SA0 197 70 M_A_DQ30 [3] 184
R116 10K_4 DIMM0_SA1 201 SA0 DQ31 129 VSS47 185
SA1 DQ32 M_A_DQ33 [3] VSS48
202 131 M_A_DQ32 [3] 2 189
[8,13,15,29] CLK_SCLK 200 SCL DQ33 141 3 VSS1 VSS49 190
SDA DQ34 M_A_DQ35 [3] VSS2 VSS50
[8,13,15,29] CLK_SDATA 143 8 195
M_A_DQ34 [3]
(204P)
116 DQ35 130 9 VSS3 VSS51 196
[4] M_A_ODT0_DIMM ODT0 DQ36 M_A_DQ36 [3] VSS4 VSS52
120 132 13
[4] M_A_ODT1_DIMM ODT1 DQ37 M_A_DQ37 [3] VSS5
140 M_A_DQ39 [3] 14
1A-8 2013/10/23 Change DIMM1_SA0/SA1 11 DQ38 142 19 VSS6
B M_A_DQ38 [3] B
to DIMM0_SA0/SA1. 28 DM0 DQ39 147 20 VSS7
DM1 DQ40 M_A_DQ46 [3] VSS8
46 149 M_A_DQ44 [3] 25
(204P)
63 DM2 DQ41 157 26 VSS9 203
DM3 DQ42 M_A_DQ41 [3] VSS10 VTT1 +DDR_VTT_RUN
136 159 M_A_DQ45 [3] 31 204
153 DM4 DQ43 146 32 VSS11 VTT2
DM5 DQ44 M_A_DQ40 [3] VSS12
170 148 M_A_DQ42 [3] 37 205
187 DM6 DQ45 158 38 VSS13 GND 206
DM7 DQ46 M_A_DQ43 [3] VSS14 GND
160 M_A_DQ47 [3] 43
M_A_DQS0 12 DQ47 163 VSS15
DQS0 DQ48 M_A_DQ49 [3]
M_A_DQS1 29 165
M_A_DQS2 47 175 DDR3-DIMM1_H=4.0_STD
M_A_DQS3 64 177
M_A_DQS4 137 164
M_A_DQS5 154 166 M_A_DQ55 [3]
M_A_DQS6 171 DQS5 DQ53 174
[3] M_A_DQS[7:0]
M_A_DQS7
M_A_DQS#0
188
10 DQS7 DQ55
176
181
M_A_DQ50 [3] M1 solution
DQS#0 DQ56 M_A_DQ56 [3]
M_A_DQS#1 27 183 +1.35V_SUS
DQS#1 DQ57 M_A_DQ60 [3]
M_A_DQS#2 45 191 M_A_DQ58 [3]
M_A_DQS#3 62 DQS#2 DQ58 193
DQS#3 DQ59 M_A_DQ62 [3]
M_A_DQS#4 135 180
M_A_DQS#5 152 DQS#4 DQ60 182
M_A_DQ57
M_A_DQ61
[3]
[3] R90 Vref_CA
M_A_DQS#6 169 DQS#5 DQ61 192 1.8K/F_4
DQS#6 DQ62 M_A_DQ63 [3] +SMDDR_VREF_DIMM
M_A_DQS#7 186 194 M_A_DQ59 [3]
[3] M_A_DQS#[7:0] DQS#7 DQ63
+VREF_CA_CPU R80 *Short_6 R81 2/F_6
1A-2 2013/10/16 Chage net name M_B_DQS#[7:0] to DDR3-DIMM1_H=4.0_STD
2
M_A_DQS#[7:0].
C M3 solution C69 R79 C66
C
0.022u/16V_4 1.8K/F_4 470p/50V_4
1
+1.35V_SUS Place these Caps near SO-DIMM R89
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ0 24.9/F_4
C111 C75 C110 C113 C79
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 0.1u/10V_4
C78 + C107 C74 C76 C100 C99

330u/2V_7343
10u/6.3V_6 0.1u/10V_4 0.1u/10V_4
C77 C112 C80 C114 C115 2.2u/6.3V_6 2.2u/6.3V_6

M1 solution
10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 +1.35V_SUS
+3V +DDR_VTT_RUN
R127 Vref_DQ
1.8K/F_4
+SMDDR_VREF_DQ0
C81 C82 C103 C109 C98 C84 C88
C106 C101 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 +VREFDQ_SA_M3 R129 *Short_6 R118 2/F_6
2.2u/6.3V_6 0.1u/10V_4 4.7u/10V_6 4.7u/10V_6 4.7u/10V_6
2
M3 solution C104 R128 C105
0.022u/16V_4 1.8K/F_4 470p/50V_4
1
D D
R126
24.9/F_4
SA1 SA0 Quanta Computer Inc.

CHA 0 0
PROJECT : ZRT/ZRTA
CHB 1 0 Size Document Number Rev
3A
DDR3 MEMORY SO-DIMM A
1 2 3 4 5 6 7 8
5 4 3 2 1
+1.35V_SUS
[3] M_B_A[15:0] JDIM2A JDIM2B
M_B_A0 98 5 75 44
A0 DQ0 M_B_DQ23 [3] VDD1 VSS16
M_B_A1 97 7 M_B_DQ22 [3]
76 48
M_B_A2 96 A1 DQ1 15 81 VDD2 VSS17 49
M_B_A3 95 17 82 54
M_B_A4 92 4 M_B_DQ16 [3] 87 55
M_B_A5 91 A4 DQ4 6 88 VDD5 VSS20 60
M_B_A6 90 16 M_B_DQ21 [3]
93 61
M_B_A7 86 A6 DQ6 18 94 VDD7 VSS22 65
M_B_A8 89 21 99 66
D
M_B_A9 85 A8 DQ8 23
M_B_DQ4 [3] 2.48A 100 VDD9 VSS24 71
D
M_B_A10 107 33 105 72
A10/AP DQ10 M_B_DQ7 [3] VDD11 VSS26
M_B_A11 84 35 106 127

M_B_A12 83 22 M_B_DQ3 [3] 111 128
M_B_A13 119 A12/BC# DQ12 24 112 VDD13 VSS28 133
M_B_A14 80 34 M_B_DQ1 [3]
117 134
M_B_A15 78 A14 DQ14 36 118 VDD15 VSS30 138
39 123 139

DQ16 M_B_DQ13 [3] VDD17 VSS32
109 41 M_B_DQ12 [3] 124 144
[3] M_B_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_B_DQ11 [3] 145
[3] M_B_BS#1 79 BA1 DQ18 53 199 VSS34 150
[3] M_B_BS#2 BA2 DQ19 M_B_DQ10 [3] +3V VDDSPD VSS35
114 40 M_B_DQ9 [3] 151
[3] M_B_CS#0 S0# DQ20 VSS36
121 42 M_B_DQ8 [3] 77 155
[3] M_B_CS#1 101 S1# DQ21 50 122 NC1 VSS37 156
[3] M_B_CLK0 CK0 DQ22 M_B_DQ15 [3] NC2 VSS38
103 52 M_B_DQ14 [3] R135 *10K_4 125 161
[3] M_B_CLK0# 102 CK0# DQ23 57 +3V NCTEST VSS39 162
[3] M_B_CLK1 CK1 DQ24 M_B_DQ30 [3] VSS40
104 59 M_B_DQ27 [3]
PM_EXTTS#1 198 167
[3] M_B_CLK1# CK1# DQ25 EVENT# VSS41
73 67 M_B_DQ29 [3] 30 168
[3] M_B_CKE0 74 CKE0 DQ26 69 [4,14] DDR3_DRAMRST# RESET# VSS42 172
C127 *0.1u/10V_4
[3] M_B_CKE1 CKE1 DQ27 M_B_DQ28 [3] VSS43
115 56 M_B_DQ31 [3] 173
[3] M_B_CAS# 110 CAS# DQ28 58 1 VSS44 178
+SMDDR_VREF_DQ1
[3] M_B_RAS# RAS# DQ29 M_B_DQ26 [3] +SMDDR_VREF_DQ1 VREF_DQ VSS45
113 68 M_B_DQ24 [3]
126 179
[3] M_B_WE# WE# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
R134 10K_4 DIMM1_SA0 197 70 184
SA0 DQ31 M_B_DQ25 [3] VSS47
R157 10K_4 DIMM1_SA1 201 129 185
+3V SA1 DQ32 M_B_DQ36 [3] VSS48
202 131 M_B_DQ37 [3] 2 189
[8,13,14,29] CLK_SCLK 200 SCL DQ33 141 3 VSS1 VSS49 190
SDA DQ34 M_B_DQ34 [3] VSS2 VSS50
[8,13,14,29] CLK_SDATA 143 8 195
M_B_DQ38 [3]
(204P)
C DQ35 VSS3 VSS51 C
116 130 M_B_DQ33 [3] 9 196
[4] M_B_ODT0_DIMM 120 ODT0 DQ36 132 13 VSS4 VSS52
[4] M_B_ODT1_DIMM ODT1 DQ37 M_B_DQ32 [3] VSS5
140 M_B_DQ35 [3] 14
11 DQ38 142 19 VSS6
DM0 DQ39 M_B_DQ39 [3] VSS7
28 147 20
46 149 M_B_DQ43 [3] 25
63 DM2
DM3
(204P) DQ41
DQ42
157 M_B_DQ45 [3] 26 VSS9
VSS10 VTT1
203 +DDR_VTT_RUN
136 159 M_B_DQ47 [3]
31 204
153 DM4 DQ43 146 32 VSS11 VTT2
170 148 37 205
DM6 DQ45 M_B_DQ40 [3] VSS13 GND
187 158 M_B_DQ44 [3] 38 206
DM7 DQ46 160 43 VSS14 GND
DQ47 M_B_DQ46 [3] VSS15
M_B_DQS2 12 163
DQS0 DQ48 M_B_DQ55 [3]
M_B_DQS0 29 165 M_B_DQ51 [3]
M_B_DQS1 47 DQS1 DQ49 175 DDR3-DIMM1_H=4.0_RVS
M_B_DQS3 64 177 M_B_DQ54 [3]
M_B_DQS4 137 DQS3 DQ51 164
M_B_DQS5 154 166
M_B_DQS6 171 174 M_B_DQ53 [3]
M_B_DQS7 188 DQS6 DQ54 176
[3] M_B_DQS[7:0] DQS7 DQ55 M_B_DQ50 [3]
M_B_DQS#2 10 181 M_B_DQ56 [3]
M_B_DQS#0 27 DQS#0 DQ56 183
DQS#1 DQ57 M_B_DQ61 [3]
M_B_DQS#1 45 191
DQS#2 DQ58 M_B_DQ58 [3]
M_B_DQS#3 62 193 M_B_DQ60 [3]
M_B_DQS#4 135 DQS#3 DQ59 180
DQS#4 DQ60 M_B_DQ57 [3]
M_B_DQS#5 152 182
DQS#5 DQ61 M_B_DQ62 [3]
B
M_B_DQS#6 169 192 M_B_DQ59 [3] B
M_B_DQS#7 186 DQS#6 DQ62 194
[3] M_B_DQS#[7:0] DQS#7 DQ63 M_B_DQ63 [3]
M1 solution
1A-22013/10/16 Swap M_B_DQS2/M_B_DQS3 and swap DDR3-DIMM1_H=4.0_RVS +1.35V_SUS
M_B_DQS#2/M_B_DQS#3.
R154 Vref_DQ
1.8K/F_4
+1.35V_SUS Place these Caps near SO-DIMM +SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ1
C138 C122 C124 C133 C119 R158 *Short_6 R156 2/F_6
+VREFDQ_SB_M3
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 0.1u/10V_4
2
C137 + C108 C120 C123 C146 C145
M3 solution C140 R155 C144
330u/2V_7343 0.022u/16V_4 1.8K/F_4 470p/50V_4
1
10u/6.3V_6 0.1u/10V_4 0.1u/10V_4
C136 C125 C134 C135 C121 2.2u/6.3V_6 2.2u/6.3V_6 R151

10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 24.9/F_4
+3V +DDR_VTT_RUN
A C116 C118 C143 C142 C147 C126 C128 A

C150 C149 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
2.2u/6.3V_6 0.1u/10V_4 4.7u/10V_6 4.7u/10V_6 4.7u/10V_6
SA1 SA0
CHA 0 0 Quanta Computer Inc.
PROJECT : ZRT/ZRTA
CHB 1 0 Size Document Number Rev
3A
DDRIII Memory SO-DIMM B
5 4 3 2 1
1 2 3 4 5 6 7 8
+1.05V_GFX
U39A
Near GPU 1/14 PCI_EXPRESS
C588 EV@22U/6.3VS_6
C379 EV@22U/6.3VS_6 +VGPU_CORE
NVDD = 32.22 ~ 26.66 A
C373 EV@10U/6.3VS_6 PEX_WAKE AB6 C310 *0.1U/10V_4
C340 EV@10U/6.3VS_6 Under GPU U39E
C388 [email protected]/10V_6 AA22 PEX_IOVDD 11/14 NVVDD
AB23 PEX_IOVDD PEX_RST AC7 VGA_RST# R400 *short_4 PEGX_RST# [19] C363 EV@1U/6.3V_4 K10 VDD
AC24 C318 EV@1U/6.3V_4 K12
C354 EV@1U/6.3V_4 AD25
PEX_IOVDD
PEX_IOVDD PEX_CLKREQ AC6 PEX_CLKREQ# R395 EV@10K/F_4 +3V_GFX C322 EV@1U/6.3V_4 K14
VDD
VDD U39C VDD33 = 56mA
A C361 EV@1U/6.3V_4 AE26 PEX_IOVDD C316 EV@1U/6.3V_4 K16 VDD 14/14 XVDD/VDD33
A
AE27 PEX_IOVDD PEX_REFCLK AE8 C336 [email protected]/10V_6 K18 VDD
CLK_PCIE_VGA [9]
Under GPU PEX_REFCLK AD8 CLK_PCIE_VGA# [9] C365 [email protected]/10V_6 L11 VDD AD10 NC VDD33 G10 +3V_GFX
C330 [email protected]/10V_6 L13 VDD AD7 NC VDD33 G12
AC9 PEG_RXP0_C C557 [email protected]/10V_4 C338 [email protected]/10V_6 L15 B19 C331 [email protected]/10V_4Under GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A PEX_TX0
PEX_TX0 AB9 PEG_RXN0_C C555 [email protected]/10V_4
PEG_RX0 [9]
C327 [email protected]/10V_6 L17
VDD
VDD
NC
PEG_RX#0 [9]
C357 [email protected]/10V_6 M10 VDD
PEX_RX0 AG6 C342 [email protected]/10V_6 M12 VDD F11 3V3AUX_NC C300 [email protected]/10V_6Near GPU
+1.05V_GFX PEG_TX0 [9] TP57
C387 EV@22U/6.3VS_6 AA10 PEX_IOVDDQ PEX_RX0 AG7 C332 [email protected]/10V_6 M14 VDD C3071 2 EV@1U/10V_6
PEG_TX#0 [9]
C364 *22U/6.3VS_6 AA12 PEX_IOVDDQ C321 [email protected]/10V_6 M16 VDD V5 FERMI_RSVD1_NC
C386 *10U/6.3VS_6 AA13 PEX_IOVDDQ PEX_TX1 AB10 PEG_RXP1_C C566 [email protected]/10V_4 C323 [email protected]/10V_6 M18 VDD V6 FERMI_RSVD2_NC
PEG_RX1 [9]
C359 EV@10U/6.3VS_6 AA16 PEX_IOVDDQ PEX_TX1 AC10 PEG_RXN1_C C564 [email protected]/10V_4 N11 VDD VDD33 G8 +3V_MAIN
PEG_RX#1 [9]
C590 [email protected]/10V_6 AA18 PEX_IOVDDQ N13 VDD VDD33 G9
AA19 PEX_IOVDDQ PEX_RX1 AF7 2 1 N15 VDD
PEG_TX1 [9]
Near GPU AA20 AE7 C366 N17
+
PEX_IOVDDQ PEX_RX1 PEG_TX#1 [9] VDD
AA21 PEX_IOVDDQ EV@330u_2.5V_3528 P10 VDD CONFIGURABLE C301 [email protected]/10V_6
AB22 PEX_IOVDDQ PEX_TX2 AD11 PEG_RXP2_C C567 [email protected]/10V_4 P12 VDD POWER CHANNELS C3081 2 EV@1U/10V_6
AC23 AC11 PEG_RXN2_C C583 [email protected]/10V_4 PEG_RX2 [9] P14
PEX_IOVDDQ PEX_TX2 PEG_RX#2 [9] VDD * nc on substrate
Under GPU AD24 PEX_IOVDDQ P16 VDD
C328 EV@1U/6.3V_4 AE25 PEX_IOVDDQ PEX_RX2 AE9 PEG_TX2 [9] P18 VDD G1 XPWR_G1 C324 [email protected]/10V_4
C325 EV@1U/6.3V_4 AF26 PEX_IOVDDQ PEX_RX2 AF9 R11 VDD G2 XPWR_G2 C320 [email protected]/10V_4
PEG_TX#2 [9]
AF27 PEX_IOVDDQ C287 EV@22U/6.3V_8 R13 VDD G3 XPWR_G3
PEX_TX3 AC12 PEG_RXP3_C C584 [email protected]/10V_4 C294 EV@47u/6.3V_8 R15 VDD G4 XPWR_G4 Under GPU
PEG_RX3 [9]
PEX_TX3 AB12 PEG_RXN3_C C586 [email protected]/10V_4 R17 VDD G5 XPWR_G5
PEG_RX#3 [9]
C286 [email protected]/6.3VS_6 T10 VDD G6 XPWR_G6
PEX_RX3 AG9 PEG_TX3 [9] C305 [email protected]/6.3VS_6 T12 VDD G7 XPWR_G7
PEX_RX3 AG10 PEG_TX#3 [9] C299 [email protected]/6.3VS_6 T14 VDD
C296 [email protected]/6.3VS_6 T16
PEX_PLL_HVDD + PEX_TX4 AB13 C281 [email protected]/6.3VS_6 T18
VDD
VDD V1 XPWR_V1
B
PEX_SVDD_3V3 = 143mA PEX_TX4 AC13 U11
U13
VDD V2 XPWR_V2
B
Near GPU VDD
PEX_RX4 AF10 U15 VDD
+3V_GFX PEX_RX4 AE10 U17 VDD
V10 VDD
PEX_TX5 AD14 V12 VDD W1 XPWR_W1
AA8 PEX_PLL_HVDD PEX_TX5 AC14 +3V V14 VDD W2 XPWR_W2
C314 [email protected]/10V_4 AA9 PEX_PLL_HVDD V16 VDD W3 XPWR_W3
C309 [email protected]/10V_6 PEX_RX5 AE12 V18 VDD W4 XPWR_W4
C315 [email protected]/10V_6 PEX_RX5 AF12
Near GPU AB8 PEX_SVDD_3V3
PEX_TX6 AC15 bga595-nvidia-n13p-gv2-s-a2 bga595-nvidia-n13p-gv2-s-a2 COMMON
PEX_TX6 AB15 C264 COMMON
U19 [email protected]/10V_4
PEX_RX6 AG12 EV@MC74VHC1G08DFT2G
5
PEX_RX6 AG13
2
PEX_TX7 AB16
[7,13,25,27,28,31] PLTRST#
4SYS_PEX_RST R354 *short_4 SYS_PEX_RST_MON# Power up
AC16 1
PEX_TX7 [10] DGPU_HOLD_RST#
sequence
PEX_RX7 AF13
3
PEX_RX7 AE13 ALL 3.3V
R355
PEX_TX8 AD17 GT@100K/F_4 +3VGFX & +3V3_AON
NC
PEX_TX8 AC17
NC
PEX_RX8 AE15
NC
NC PEX_RX8 AF15
SYS_PEX_RST_MON# [19]
F2 VDD_SENSE NC PEX_TX9 AC18 NVVDD t>0
[38] VGA_VCCSENSE PEX_TX9 AB18 +3V
NC
C +VGACORE C
F1 GND_SENSE PEX_RX9 AG15
NC
[38] VGA_VSSSENSE PEX_RX9 AG16
NC
AB19
NC PEX_TX10
AC19 C269
PEX_VDD
PEX_TX10
NC
U21 [email protected]/10V_4 +1.05V_GFX
AF16 GT@MC74VHC1G08DFT2G
NC PEX_RX10 t>=0
5
PEX_RX10 AE16
NC
SYS_PEX_RST_MON# 2
NC PEX_TX11 AD20 4 PEGX_RST# FBVDDQ
AC20 GPU_PEX_RST_HOLD# 1
NC PEX_TX11 [19] GPU_PEX_RST_HOLD# +1.5V_GFX Power down
AE18
NC PEX_RX11
sequence
3
NC PEX_RX11 AF18
R374
PEX_TX12 AC21 EV@100K/F_4
NC
PEX_TX12 AB21
NC
R735 *200/F_4 PEX_TSTCLK AF22 PEX_TSTCLK_OUT PEX_RX12 AG18
NC
PEX_TSTCLK# AE22 PEX_TSTCLK_OUT NC PEX_RX12 AG19
CX300T30001 Change to 0ohm SYS_PEX_RST R366 GM@0_4
+1.05V_GFX R414 *Short_6 NC PEX_TX13 AD23
NC PEX_TX13 AE23
Near GPU
[email protected]/10V_6 C371 PEX_PLLVDD AA14 PEX_PLLVDD PEX_RX13 AF19
NC
EV@1U/6.3V_4 C355 AA15 PEX_PLLVDD PEX_RX13 AE19 +3V_GFX
NC
[email protected]/10V_4 C360 PEX_TX14 AF24

NC
Under GPU PEX_TX14 AE24
NC
D Follow Z09 to isolate CLK_REQ# D
PEX_PLLVDD = 130mA NC PEX_RX14 AE21
2
PEX_RX14 AF21
EV@10K/F_4 NC
R408 TESTMODE AD9 TESTMODE
NC PEX_TX15 AG24 PEX_CLKREQ# 1 3 CLK_PEGA_REQ# [9]
NC PEX_TX15 AG25
Q31 PU at page 9
NC PEX_RX15 AG21
AG22
EV@2N7002K Quanta Computer Inc.
NC PEX_RX15
GF117 GF119 R394 *0_4 PROJECT :ZRT/ZRTA

[email protected]/F_4 R736 PEX_TERMP AF25 PEX_TERMP Size Document Number Rev
N16S-GT (PCIE I/F) /NVDD 3A
bga595-nvidia-n13p-gv2-s-a2 COMMON Date: Wednesday, February 11, 2015 Sheet 16 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U39B
2/14 FBA VMA_DQ[63:0]
VMA_DQ[63:0] [20,21]
R696 EV@10K/F_4 PS_FB_CLAMP F3 FBA_D0 E18 VMA_DQ0
NC GF119
FBA_D1 F18 VMA_DQ1
FB_CLAMP GF117 FBA_D2 E16 VMA_DQ2
F17 VMA_DQ3
FBA_D3
FBA_D4 D20 VMA_DQ4
FBVDDQ + FBVDD = 3.116A U39F
FBA_D5 D21 VMA_DQ5 13/14 GND
FBA_D6 F20 VMA_DQ6 +1.5V_GFX U39D A2 GND GND M13
FBA_D7 E21 VMA_DQ7 12/14 FBVDDQ AB17 GND GND M15
FBA_D8 E15 VMA_DQ8 AB20 GND GND M17
FBA_D9 D15 VMA_DQ9 C380 [email protected]/10V_4 B26 FBVDDQ AB24 GND GND N10
FBA_ODT_L FBA_CMD0 R424 EV@10K/F_4 FBA_D10 F15 VMA_DQ10 C367 [email protected]/10V_4 C25 FBVDDQ AC2 GND GND N12
FBA_D11 F13 VMA_DQ11 E23 FBVDDQ AC22 GND GND N14
A FBA_CKE_L FBA_CMD3 R423 EV@10K/F_4 FBA_D12 C13 VMA_DQ12 E26 FBVDDQ AC26 GND GND N16 A
FBA_D13 B13 VMA_DQ13 C3561 2 EV@1U/10V_6 F14 FBVDDQ AC5 GND GND N18
FBA_ODT_H FBA_CMD16 R433 EV@10K/F_4 FBA_D14 E13 VMA_DQ14 C3781 2 EV@1U/10V_6 F21 FBVDDQ AC8 GND GND P11
FBA_D15 D13 VMA_DQ15 C377 [email protected]/10V_6 G13 FBVDDQ AD12 GND GND P13
FBA_CKE_H FBA_CMD19 R439 EV@10K/F_4 FBA_D16 B15 VMA_DQ16 C382 [email protected]/10V_6 G14 FBVDDQ AD13 GND GND P15
FBA_D17 C16 VMA_DQ17 C368 EV@10U/6.3V_6 G15 FBVDDQ A26 GND GND P17
FBA_RST# FBA_CMD20 R758 EV@10K/F_4 FBA_D18 A13 VMA_DQ18 C369 EV@22U/6.3V_8 G16 FBVDDQ AD15 GND GND P2
FBA_D19 A15 VMA_DQ19 G18 FBVDDQ AD16 GND GND P23
FBA_D20 B18 VMA_DQ20 G19 FBVDDQ AD18 GND GND P26
FBA_D21 A18 VMA_DQ21 G20 FBVDDQ AD19 GND GND P5
FBA_D22 A19 VMA_DQ22 G21 FBVDDQ AD21 GND GND R10
FBA_D23 C19 VMA_DQ23 H24 FBVDDQ AD22 GND GND R12
FBA_D24 B24 VMA_DQ24 H26 FBVDDQ AE11 GND GND R14
FBA_D25 C23 VMA_DQ25 J21 FBVDDQ AE14 GND GND R16
FBA_D26 A25 VMA_DQ26 K21 FBVDDQ AE17 GND GND R18
FBA_D27 A24 VMA_DQ27 L22 FBVDDQ AE20 GND GND T11
FBA_D28 A21 VMA_DQ28 L24 FBVDDQ AB11 GND GND T13
FBA_D29 B21 VMA_DQ29 L26 FBVDDQ AF1 GND GND T15
FBA_D30 C20 VMA_DQ30 M21 FBVDDQ AF11 GND GND T17
FBA_D31 C21 VMA_DQ31 N21 FBVDDQ AF14 GND GND U10
FBA_D32 R22 VMA_DQ32 R21 FBVDDQ AF17 GND GND U12
C27 FBA_CMD0 FBA_D33 R24 VMA_DQ33 T21 FBVDDQ AF20 GND GND U14
[20,21] FBA_CMD0
[21] FBA_CMD1 C26 FBA_CMD1 FBA_D34 T22 VMA_DQ34 V21 FBVDDQ AF23 GND GND U16
[20] FBA_CMD2 E24 FBA_CMD2 FBA_D35 R23 VMA_DQ35 W21 FBVDDQ AF5 GND GND U18
[20,21] FBA_CMD3 F24 FBA_CMD3 FBA_D36 N25 VMA_DQ36 AF8 GND GND U2
[20,21] FBA_CMD4 D27 FBA_CMD4 FBA_D37 N26 VMA_DQ37 AG2 GND GND U23
[20,21] FBA_CMD5 D26 FBA_CMD5 FBA_D38 N23 VMA_DQ38 AG26 GND GND U26
[20,21] FBA_CMD6 F25 FBA_CMD6 FBA_D39 N24 VMA_DQ39 AB14 GND GND U5
[20,21] FBA_CMD7 F26 FBA_CMD7 FBA_D40 V23 VMA_DQ40 B1 GND GND V11
F23 FBA_CMD8 FBA_D41 V22 VMA_DQ41 B11 GND GND V13
B
[20,21] FBA_CMD8 B
[20,21] FBA_CMD9 G22 FBA_CMD9 FBA_D42 T23 VMA_DQ42 B14 GND GND V15
[20,21] FBA_CMD10 G23 FBA_CMD10 FBA_D43 U22 VMA_DQ43 B17 GND GND V17
G24 FBA_CMD11 FBA_D44 Y24 VMA_DQ44 B20 GND GND Y2
[20,21] FBA_CMD11
F27 FBA_CMD12 FBA_D45 AA24 VMA_DQ45 B23 GND GND Y23
[20,21] FBA_CMD12
[20,21] FBA_CMD13 G25 FBA_CMD13 FBA_D46 Y22 VMA_DQ46 B27 GND GND Y26
[20,21] FBA_CMD14 G27 FBA_CMD14 FBA_D47 AA23 VMA_DQ47 B5 GND GND Y5
[20,21] FBA_CMD15 G26 FBA_CMD15 FBA_D48 AD27 VMA_DQ48 B8 GND
[20,21] FBA_CMD16 M24 FBA_CMD16 FBA_D49 AB25 VMA_DQ49 E11 GND
[21] FBA_CMD17 M23 FBA_CMD17 FBA_D50 AD26 VMA_DQ50 E14 GND
[20] FBA_CMD18 K24 FBA_CMD18 FBA_D51 AC25 VMA_DQ51 E17 GND
[20,21] FBA_CMD19 K23 FBA_CMD19 FBA_D52 AA27 VMA_DQ52 E2 GND
M27 FBA_CMD20 FBA_D53 AA26 VMA_DQ53 E20 GND
[20,21] FBA_CMD20
[20,21] FBA_CMD21 M26 FBA_CMD21 FBA_D54 W26 VMA_DQ54 E22 GND
[20,21] FBA_CMD22 M25 FBA_CMD22 FBA_D55 Y25 VMA_DQ55 E25 GND
K26 FBA_CMD23 FBA_D56 R26 VMA_DQ56 E5 GND
[20,21] FBA_CMD23
K22 FBA_CMD24 FBA_D57 T25 VMA_DQ57 E8 GND
[20,21] FBA_CMD24
[20,21] FBA_CMD25 J23 FBA_CMD25 FBA_D58 N27 VMA_DQ58 H2 GND
[20,21] FBA_CMD26 J25 FBA_CMD26 FBA_D59 R27 VMA_DQ59 H23 GND
[20] FBA_CMD27 J24 FBA_CMD27 FBA_D60 V26 VMA_DQ60 H25 GND
[20,21] FBA_CMD28 K27 FBA_CMD28 FBA_D61 V27 VMA_DQ61 FB_CAL_PD_VDDQ D22 FB_CAL_PD_VDDQ R402 [email protected]/F_4 +1.5V_GFX H5 GND
[20,21] FBA_CMD29 K25 FBA_CMD29 FBA_D62 W27 VMA_DQ62 K11 GND
VMA_DM[7:0] [20,21]
[21] FBA_CMD30 J27 FBA_CMD30 FBA_D63 W25 VMA_DQ63 K13 GND
J26 FBA_CMD31 FB_CAL_PU_GND C24 FB_CAL_PU_GND R413 [email protected]/F_4 K15 GND
K17 GND
FBA_DQM0 D19 VMA_DM0 L10 GND
FBA_DQM1 D14 VMA_DM1 FB_CALTERM_GND B25 FB_CAL_TERM_GND R415 [email protected]/F_4 L12 GND
FBA_DQM2 C17 VMA_DM2 L14 GND
FBA_DQM3 C22 VMA_DM3 L16 GND
P24 VMA_DM4 bga595-nvidia-n13p-gv2-s-a2 L18
FBA_DQM4 GND
+1.5V_GFX FBA_DQM5 W24 VMA_DM5 COMMON L2 GND
C FBA_DQM6 AA25 VMA_DM6 L23 GND C
R405 *60.4_4 F22 FBA_DEBUG0 FBA_DQM7 U25 VMA_DM7 L25 GND
R399 *60.4_4 J22 FBA_DEBUG1 L5 GND GND AA7
M11 GND GND AB7
VMA_WDQS[7:0] [20,21]
FBA_DQS_WP0 E19 VMA_WDQS0
FBA_DQS_WP1 C15 VMA_WDQS1
[20,21] VMA_CLK0 D24 FBA_CLK0 FBA_DQS_WP2 B16 VMA_WDQS2
[20,21] VMA_CLK0# D25 FBA_CLK0 FBA_DQS_WP3 B22 VMA_WDQS3 bga595-nvidia-n13p-gv2-s-a2 COMMON
N22 FBA_CLK1 FBA_DQS_WP4 R25 VMA_WDQS4
[20,21] VMA_CLK1
M22 FBA_CLK1 FBA_DQS_WP5 W23 VMA_WDQS5
[20,21] VMA_CLK1#
FBA_DQS_WP6 AB26 VMA_WDQS6
+1.5V_GFX
FBA_DQS_WP7 T26 VMA_WDQS7 For support GC6 2.0
VMA_RDQS[7:0] [20,21] +3V
D18 FBA_WCK01 FBA_DQS_RN0 F19 VMA_RDQS0
C18 FBA_WCK01 FBA_DQS_RN1 C14 VMA_RDQS1
D17 FBA_WCK23 FBA_DQS_RN2 A16 VMA_RDQS2 EV@100/F_4 R752 FBA_CMD4 EV@100/F_4 R753
D16 FBA_WCK23 FBA_DQS_RN3 A22 VMA_RDQS3 EV@100/F_4 R750 FBA_CMD5 EV@100/F_4 R751 C267
T24 FBA_WCK45 FBA_DQS_RN4 P25 VMA_RDQS4 EV@100/F_4 R435 FBA_CMD6 EV@100/F_4 R436 [19,31] EC_FB_CLAMP R358 *0_4 [email protected]/10V_4
5
U24 FBA_WCK45 FBA_DQS_RN5 W22 VMA_RDQS5 EV@100/F_4 R431 FBA_CMD7 EV@100/F_4 R432
V24 FBA_WCK67 FBA_DQS_RN6 AB27 VMA_RDQS6 EV@100/F_4 R763 FBA_CMD8 EV@100/F_4 R764 R357 GT@0_4 2
[10,19] GC6_FB_EN
V25 FBA_WCK67 FBA_DQS_RN7 T27 VMA_RDQS7 EV@100/F_4 R440 FBA_CMD9 EV@100/F_4 R441 4
FBVDDQ_EN [39]
FB_PLLAVDD = 55mA EV@100/F_4 R462 FBA_CMD10 EV@100/F_4 R463 [38] GPU_PWR_GD 1
EV@100/F_4 R422 FBA_CMD11 EV@100/F_4 R421
EV@100/F_4 R756 FBA_CMD12 EV@100/F_4 R757
3
+1.05V_GFX L22 EV@PBY160808T-300Y-N +FB_PLLAVDD F16 FB_PLLAVDD EV@100/F_4 R458 FBA_CMD13 EV@100/F_4 R459 U20
EV@100/F_4 R759 FBA_CMD14 EV@100/F_4 R760 GT@NL17SZ32DFT2G R362
C372 EV@22U/6.3VS_6 P22 FB_PLLAVDD EV@100/F_4 R420 FBA_CMD15 EV@100/F_4 R419 EV@100K/F_4
C375 [email protected]/10V_4 EV@100/F_4 R465 FBA_CMD21 EV@100/F_4 R464
C362 [email protected]/10V_4 H22 FB_DLLAVDD GF119 EV@100/F_4 R451 FBA_CMD22 EV@100/F_4 R450 R359 GM@0_4
D C374 [email protected]/10V_4 EV@100/F_4 R468 FBA_CMD23 EV@100/F_4 R467 D
EV@100/F_4 R442 FBA_CMD24 EV@100/F_4 R443
FB_PLLAVDD GF117 EV@100/F_4 R427 EV@100/F_4 R428
FBA_CMD25
EV@100/F_4 R457 FBA_CMD26 EV@100/F_4 R456
EV@100/F_4 R452 FBA_CMD27 EV@100/F_4 R453
FB_DLLAVDD = 15mA EV@100/F_4 R426 FBA_CMD28 EV@100/F_4 R425
EV@100/F_4 R430 FBA_CMD29 EV@100/F_4 R429
D23
EV@100/F_4 R446 FBA_CMD30 EV@100/F_4 R447 Quanta Computer Inc.
FB_VREF_PROBE TP60
INT PROJECT :ZRT/ZRTA
bga595-nvidia-n13p-gv2-s-a2 COMMON Size Document Number Rev
N16S-GT (MEMORY/GND) 3A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U39G U39J
4/14 IFPAB
7/14 IFPEF U39K
GF117 GF119 GF119 3/14 DACA
AC4 GF117
NC IFPA_TXC
AC3 DVI-DL DVI-SL/HDMI DP GF119 GF117
NC IFPA_TXC GF117 GF119
GF119 GF117 J3 W5 B7 I2CA_SCL R700 [email protected]_4
NC I2CY_SDA I2CY_SDA IFPE_AUX TP115 DACA_VDD NC NC I2CA_SCL
AA6 GF119 GF117 J2 A7 I2CA_SDA R716 [email protected]_4
IFPAB_RSET NC NC I2CY_SCL I2CY_SCL IFPE_AUX NC I2CA_SDA
NC IFPA_TXD0 Y3 TP51 J7 IFPEF_PLLVDD NC TP128 AE2 DACA_VREF TSEN_VREF
NC IFPA_TXD0 Y4
IFPE_L3 J1 AF2 DACA_RSET NC NC DACA_HSYNC AE3
NC TXC TXC
V7 IFPAB_PLLVDD IFPE_L3 K1 DACA_VSYNC AE4
TP114 NC NC TXC TXC NC
IFPA_TXD1 AA2 K7 IFPEF_PLLVDD
NC TP119 NC
W7 IFPAB_PLLVDD NC NC IFPA_TXD1 AA3 IFPE_L2 K3
TP117 NC TXD0 TXD0
A IFPE_L2 K2 DACA_RED AG3 A
NC TXD0 TXD0 NC
NC IFPA_TXD2 AA1 K6 IFPEF_RSET NC IFPE_L1 M3 DACA_GREEN AF4

NC TXD1 TXD1 NC
NC IFPA_TXD2 AB1 IFPE_L1 M2
NC TXD1 TXD1
NC DACA_BLUE AF3
IFPE_L0 M1
AA5 NC TXD2 TXD2 N1
NC IFPA_TXD3 NC IFPE_L0
AA4 TXD2 TXD2
NC IFPA_TXD3
IFPE bga595-nvidia-n13p-gv2-s-a2 COMMON
AB4
NC IFPB_TXC
IFPB_TXC AB5
3V MAIN POWER
NC
NC HPD_E HPD_E GPIO18 C2
GF119 GF117 +3V_GFX +3V_GFX
TP121 W6 IFPA_IOVDD NC NC IFPB_TXD4 AB2
NC IFPB_TXD4 AB3
GF119 GF117
Y6 IFPB_IOVDD
TP120 NC
H6
TP125 IFPE_IOVDD NC
IFPB_TXD5 AD2 GF119 +3V_GFX R371 C277 60mil
NC
NC IFPB_TXD5 AD3 J6 IFPF_IOVDD NC GF117 GT@10K_4
TP124
1
DVI-DL DVI-SL/HDMI DP [email protected]/25V_4
NC IFPF_AUX H4 R390
I2CZ_SDA
NC IFPB_TXD6 AD1 NC I2CZ_SCL IFPF_AUX H3 GM@0_8
NC IFPB_TXD6 AE1 R369 R370 GT@200K_4 2 Q30
EV@10K_4 GT@AO3413
NC TXC IFPF_L3 J5
3
NC IFPB_TXD7 AD5 NC TXC IFPF_L3 J4 60mil
IFPB_TXD7 AD4 +3V_MAIN
NC
3
NC TXD3 IFPF_L2 K5 C280
TXD0
NC IFPF_L2 K4 2
B
TXD3 TXD0 [19] +3V_MAIN_EN B
[email protected]/25V_4
NC TXD4 TXD1 IFPF_L1 L4 Q24 N15V stuff not support GC6.
IFPF NC TXD4 TXD1 IFPF_L1 L3 GT@2N7002K 1A-7
NC GPIO14 B3
1
IFPAB NC
NC
TXD5
TXD5
TXD2
TXD2
IFPF_L0
IFPF_L0
M5
M4
bga595-nvidia-n13p-gv2-s-a2 COMMON +3V_GFX
U39H
5/14 IFPC
IFPC NC HPD_F GPIO19 F7 +3V
GF119 GF117 R396
T6 IFPC_RSET GF117 GF119 [email protected]/F_4
NC
DVI/HDMI DP R404 3V_MAIN_PWGD

3V_MAIN_PWGD [38,39]
[email protected]_4
3
M7 N5 bga595-nvidia-n13p-gv2-s-a2 COMMON
TP53 IFPC_PLLVDD NC NC I2CW_SDA IFPC_AUX
N7 IFPC_PLLVDD NC NC I2CW_SCL IFPC_AUX N4 R398
TP126
2 *100K/F_4
3
NC TXC IFPC_L3 N3 PLLVDD = 38mA +3V_MAIN R385 [email protected]_4 2
NC TXC IFPC_L3 N2 C298 Q35
1
+1.05V_GFX L18 EV@PBY160808T-300Y-N NV_PLLVDD Q33 EV@1000p/50V_4 EV@DTC144EU
1
IFPC_L2 R3 C313 [email protected]/10V_4 C285 EV@MMBT3904-7-F
NC TXD0
IFPC_L2 R2 C291 EV@22U/6.3VS_6 *1000p/50V_4 +1.05V_GFX and GPU core power EN
NC TXD0
NC TXD1 IFPC_L1 R1
NC TXD1 IFPC_L1 T1
U39M
T3
SP_PLLVDD = 17mA
NC TXD2 IFPC_L0 9/14 XTAL_PLL
C
NC TXD2 IFPC_L0 T2 +1.05V_GFX L17 EV@HCB1005KF-181T15(180,1500MA) SP_PLLVDD C
C317 [email protected]/10V_4 L6 PLLVDD
C290 [email protected]/10V_4 M6 SP_PLLVDD
C295 [email protected]/10V_6
P6 IFPC_IOVDD NC GPIO15 C3 C302 EV@22U/6.3VS_6 N6 VID_PLLVDD
TP116 NC GF119
bga595-nvidia-n13p-gv2-s-a2 COMMON
NC GF117
VID_PLLVDD = 41mA
U39I
6/14 IFPD R703 EV@10K/F_4 XTAL_SSIN A10 XTALSSIN XTALOUTBUFF C10 BXTALOUT R718 EV@10K/F_4
GF119 GF117
U6 IFPD_RSET
GF117 GF119
27M_XTAL_IN_R C11 XTALIN XTALOUT B10 27M_XTAL_OUT
DB-->SI change 10/25
NC
DVI/HDMI DP bga595-nvidia-n13p-gv2-s-a2 COMMON
Use G-CLK
T7 IFPD_PLLVDD IFPD_AUX P4
DB-->SI change 10/25
TP118 NC NC I2CX_SDA
NC I2CX_SCL IFPD_AUX P3 Use G-CLK
R7 IFPD_PLLVDD C546
TP54 NC +3V_GFX
IFPD_L3 R5
NC TXC
4
3
NC TXC IFPD_L3 R4 EV@12p/50V_4
DGPU_PGOK-1 27M_XTAL_IN_R Y4
IFPD_L2 T5 +3V R381 27M_XTAL_OUT EV@27MHZ +-10PPM
NC TXD0
IFPD_L2 T4 [email protected]_4
NC TXD0
C544
1
2
NC TXD1 IFPD_L1 U4
IFPD NC TXD1 IFPD_L1 U3 R403
DGPU_PWROK [10]
[email protected]_4 EV@12p/50V_4
D IFPD_L0 V4 D
NC TXD2
3
NC TXD2 IFPD_L0 V3
2 Q29 R386
3
EV@100K/F_4
R6 IFPD_IOVDD GPIO17 D4 R401 [email protected]_4
DGPU_POK2 2 Q34 EV@DTC144EUA
TP52 GF119 NC [39] HWPG_1.5VGFX
EV@METR3904-G
1
GF117
C304
NC
1
C306 EV@1000P/50V_4
*1000P/50V_4
PROJECT :ZRT/ZRTA
N16S-GT (DISPLAY) 3A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U39L R3626
10/14 MISC2
+3V_MAIN GM 45.3k pull up +3V_GFX
GT 49.9K pull up
TP56 E10 VMON_IN0

TP55 F10 VMON_IN1 ROM_CS D12 ROM_CS R393 *10K/F_4 +3V_GFX
R725 R726 R724 R711 R713 R712 R710 R714
ROM_SI B12 ROM_SI [email protected]/F_4 [email protected]/F_4 [email protected]/F_4 [email protected]/F_4 *10K/F_4 GM@10K/F_4 *10K/F_4 *10K/F_4
ROM_SO A12 ROM_SO
STRAP0 D1 STRAP0 ROM_SCLK C12 ROM_SCLK ROM_SI STRAP0
STRAP1 D2 STRAP1 ROM_SO STRAP1
STRAP2 E4 STRAP2 ROM_SCLK STRAP2
A STRAP3 E3 STRAP3 A
STRAP3
STRAP4 D3 STRAP4 STRAP4
2
+3V_GFX GF119 GF117
R729 R730 R728
C1 STRAP5_NC [email protected]/F_4 [email protected]/F_4 [email protected]/F_4 R694 R697 R695 R693 R698
NC
R767 *10K/F_4 BUFRST D11 *24.9K/F_4 [email protected]/F_4 *15K/F_4 [email protected]/F_4 [email protected]/F_4
1
R709 [email protected]/F_4 F6 MULTISTRAP_REF0_GND PGOOD D10
GF119 GF117
R391 EV@10K/F_4 +3V_GFX
F4 MULTISTRAP_REF1_GND NC
CEC E9 SYS_PEX_RST_MON#
F5 SYS_PEX_RST_MON# [16]
MULTISTRAP_REF2_GND NC +3V_MAIN
Q28
5
Dual
2ND_MBDATA 3 4 GPUT_DATA_L
[8,31] 2ND_MBDATA
U39N
8/14 MISC1 R387 [email protected]_4 +3V_GFX
I2CS_SCL D9 GPUT_CLK_L 2 R388 [email protected]_4 +3V_GFX
I2CS_SDA D8 GPUT_DATA_L
2ND_MBCLK 6 1 GPUT_CLK_L
[8,31] 2ND_MBCLK
I2CC_SCL A9 DGPU_EDIDCLK R719 [email protected]_4
I2CC_SDA B9 DGPU_EDIDDATA R702 [email protected]_4
EV@2N7002DW
Dual
B TP58 THERM- E12 B
THERMDN GF117 GF119
NC I2CB_SCL C9 N12E_SCL R701 [email protected]_4
TP59 THERM+ F12 THERMDP NC I2CB_SDA C8 N12E_SDA R717 [email protected]_4 EC_FB_CLAMP [17,31]
GC6_FB_EN [10,17]
TP130 JTAG_TCK AE5 JTAG_TCK R372 EV@0_4
TP129 JTAG_TMS AD6 JTAG_TMS +3V_GFX
TP131 JTAG_TDI AE6 JTAG_TDI
TP132 JTAG_TDO AF6 JTAG_TDO 1 3 R368 *0_4
JTAG_TRST# AG4 JTAG_TRST GPIO0 C6 FB_CLAMP_MON R367 EV@0_4
GPIO1 B2 Q27 R373
GPIO2 D6 *2N7002K EV@10K/F_4 R384 GT@0_4 R389
2
GPIO3 C7 *10K/F_4
GPIO4 F9 +3V_GFX
GPIO5 A3 +3V_MAIN_EN R375 *0_4
+3V_MAIN_EN [18] FB_CLAMP_REQ# [31]
GPIO6 A4 GPU_EVENT# 1 3 R383 GT@0_4
B6 DGPU_EVENT# [10]
GPIO7
OVERT A6 VGA_OVT# Q26
GPIO9 F8 ALERT *2N7002K
2
GPIO10 C5
GPIO11 E7 PWM-VID [38]
GPIO12 D7 GPIO12_ACIN
GPIO13 B4 DGPU_PSI [38] N15S -> GPIO0 un-stuff Q3013 and R3183
GPIO6 un-stuff Q3012 \ R3181 and R3166
+3V_GFX
GF117 GF119
N15V -> GPIO0 stuff Q3013 and R3183, un-stuff R3180 \ R3188
NC GPIO16 D5 GPU_GPIO16 TP123 GPIO6 stuff Q3012 \ R3181 and R3162, un-stuff R3177,R3166.
NC GPIO20 E6
NC GPIO21 C4 GPU_PEX_RST_HOLD# GPU_PEX_RST_HOLD# [16]
Logical Strap Bit Mapping
C PU-VDD PD C
bga595-nvidia-n13p-gv2-s-a2 COMMON +3V_GFX
Resistor P/N
4.99K---> CS24992FB26 4.99K 1000 0000
[16] PEGX_RST#
GPIO12_ACIN R392 EV@10K/F_4
10K ---> CS31002FB26 10K 1001 0001
N16S-GS/N16V-GM Straping table15K ---> CS31502FB24 15K 1010 0010
DGPU_PSI R699 EV@10K/F_4
20K ---> CS32002FB29
2
ROM_SI N16S 24.9K --->CS32492FB16 20K 1011 0011

VGA_OVT# 1 3 dGPU_OTP# [31] VGA_OVT# R376 EV@10K/F_4
2G Hynix 128Mx16 -->34.8K PD 30.1K --->CS33012FB18 24.9K 1100 0100
2G Micron 128Mx16 -->45.3K PD 34.8K---> CS33482FB22
Q25 ALERT R708 EV@10K/F_4 2G Samsumg 128Mx16 -->4.99K PU
30.1K 1101 0101
45.3K ---> CS34532FB18 GM
EV@2N7002K
4G Hynix 256Mx16 -->4.99K PD 49.9K ---> CS34992FB10 GT 34.8K 1110 0110
4G Micron 256Mx16 -->10K PD
GPU_PEX_RST_HOLD# R715 EV@10K/F_4
4G Samsumg 256Mx16 -->15K PD 45.3K 1111 0111
dGPU_OPP# = EC control GPU_EVENT# R704 EV@10K/F_4
ROM_SI N16V
2G Hynix 128Mx16 -->20K PD ROM_SO ROM_SCLK STRAP0
R777 *0_4 GPIO12_ACIN 1 3 2G Micron 128Mx16 -->30.1K PD N16S-GT --> 4.99K PD N16S-GT --> 4.99K PD N16S-GT --> 49.9K PU
[32] GPU_THROTTING# dGPU_OPP# [31] JTAG_TMS R722 *10K/F_4 2G Samsumg 128Mx16 -->34.8K PD N16V-GM --> 4.99K PU N16V-GM --> 4.99K PU N16V-GM --> 45.3K PU
Q32
EV@2N7002K JTAG_TDI R731 *10K/F_4 4G Micron 256Mx16 -->10K PD
2
4G Hynix 256Mx16 -->15K PD

GPIO12 AC detect 4G Samsumg 256Mx16 -->24.9K PD
AC high
D
+3V_GFX
DC low N16V-GM strap0~3 table D
STRAP0 = Stuff 45.3k pull up. (EDID Panel)

JTAG_TRST# R732 EV@10K/F_4
STRAP1 = Stuff 4.99k pull down.(Gen3 support)
JTAG_TCK R723 *10K/F_4
STRAP2 = Stuff 10k pull up.(DID 0x1299)
STRAP3 = Stuff 4.99k pull down.(No display out)
PROJECT : ZRT/ZRTA
STRAP4 = Stuff 45.3k pull down. (Gen3/max speed) Size Document Number Rev
3A
N16S-GT (GPIO/STRAPS)
1 2 3 4 5 6 7 8
5 4 3 2 1
HYU 256Mx16, H5TC4G63AFR-11C ：AKD5PGWTW08---TOP

QBC PN：
：
： B/S PN : AKD5PGWTW07
：AKD5PZSTL01---TOP
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN：
：
： B/S PN : AKD5PZSTL00
SAM 256Mx16, K4W4G1646D-BC1A ：AKD5PGWT501---TOP
QBC PN：
：
： B/S PN : AKD5PGWT502
U41 U40 U43 U42
VREFC_VMA1 M8 E3 VREFC_VMA1 M8 E3 VREFC_VMA3 M8 E3 VREFC_VMA3 M8 E3

[21] VREFC_VMA1 VREFCA DQL0 VMA_DQ11 [17,21] VREFCA DQL0 VMA_DQ4 [17,21] [21] VREFC_VMA3 VREFCA DQL0 VMA_DQ32 [17,21] VREFCA DQL0 VMA_DQ44 [17,21]
VREFD_VMA1 H1 F7 VREFD_VMA1 H1 F7 VREFD_VMA3 H1 F7 VREFD_VMA3 H1 F7
D [21] VREFD_VMA1 VREFDQ DQL1 VMA_DQ12 [17,21] VREFDQ DQL1 VMA_DQ1 [17,21] [21] VREFD_VMA3 VREFDQ DQL1 VMA_DQ39 [17,21] VREFDQ DQL1 VMA_DQ43 [17,21] D
F2 F2 F2 F2
DQL2 VMA_DQ10 [17,21] DQL2 VMA_DQ5 [17,21] DQL2 VMA_DQ34 [17,21] DQL2 VMA_DQ45 [17,21]
N3 F8 FBA_CMD7 N3 F8 FBA_CMD7 N3 F8 FBA_CMD7 N3 F8
[17,21] FBA_CMD7 A0 DQL3 VMA_DQ15 [17,21] A0 DQL3 VMA_DQ0 [17,21] A0 DQL3 VMA_DQ38 [17,21] A0 DQL3 VMA_DQ40 [17,21]
P7 H3 FBA_CMD10 P7 H3 FBA_CMD10 P7 H3 FBA_CMD10 P7 H3
[17,21] FBA_CMD10 P3 A1 DQL4 H8 VMA_DQ8 [17,21] P3 A1 DQL4 H8 VMA_DQ6 [17,21] P3 A1 DQL4 H8 VMA_DQ33 [17,21] P3 A1 DQL4 H8 VMA_DQ47 [17,21]
FBA_CMD24 FBA_CMD24 FBA_CMD24
N2 G2 FBA_CMD6 N2 G2 FBA_CMD6 N2 G2 FBA_CMD6 N2 G2
P8 H7 FBA_CMD22 P8 H7 FBA_CMD22 P8 H7 FBA_CMD22 P8 H7
P2 FBA_CMD26 P2 FBA_CMD26 P2 FBA_CMD26 P2
[17,21] FBA_CMD26 A5 A5 A5 A5
R8 FBA_CMD5 R8 FBA_CMD5 R8 FBA_CMD5 R8
[17,21] FBA_CMD5 R2 A6 D7 R2 A6 D7 R2 A6 D7 R2 A6 D7
[17,21] FBA_CMD21 VMA_DQ17 [17,21] FBA_CMD21 VMA_DQ24 [17,21] FBA_CMD21 VMA_DQ57 [17,21] FBA_CMD21 VMA_DQ52 [17,21]
T8 A7 DQU0 C3 FBA_CMD8 T8 A7 DQU0 C3 FBA_CMD8 T8 A7 DQU0 C3 FBA_CMD8 T8 A7 DQU0 C3
[17,21] FBA_CMD8 R3 A8 DQU1 C8 VMA_DQ21 [17,21] R3 A8 DQU1 C8 VMA_DQ25 [17,21] R3 A8 DQU1 C8 VMA_DQ62 [17,21] R3 A8 DQU1 C8 VMA_DQ51 [17,21]
L7 A9 DQU2 C2 FBA_CMD25 L7 A9 DQU2 C2 FBA_CMD25 L7 A9 DQU2 C2 FBA_CMD25 L7 A9 DQU2 C2
[17,21] FBA_CMD25 A10/AP DQU3 VMA_DQ23 [17,21] A10/AP DQU3 VMA_DQ30 [17,21] A10/AP DQU3 VMA_DQ63 [17,21] A10/AP DQU3 VMA_DQ50 [17,21]
R7 A7 FBA_CMD23 R7 A7 FBA_CMD23 R7 A7 FBA_CMD23 R7 A7
[17,21] FBA_CMD23 A11 DQU4 VMA_DQ19 [17,21] A11 DQU4 VMA_DQ29 [17,21] A11 DQU4 VMA_DQ58 [17,21] A11 DQU4 VMA_DQ53 [17,21]
N7 A2 FBA_CMD9 N7 A2 FBA_CMD9 N7 A2 FBA_CMD9 N7 A2
[17,21] FBA_CMD9 T3 A12/BC DQU5 B8 VMA_DQ22 [17,21] T3 A12/BC DQU5 B8 VMA_DQ28 [17,21] T3 A12/BC DQU5 B8 VMA_DQ60 [17,21] T3 A12/BC DQU5 B8 VMA_DQ48 [17,21]
T7 A13 DQU6 A3 FBA_CMD14 T7 A13 DQU6 A3 FBA_CMD14 T7 A13 DQU6 A3 FBA_CMD14 T7 A13 DQU6 A3
[17,21] FBA_CMD14 A14 DQU7 VMA_DQ20 [17,21] A14 DQU7 VMA_DQ31 [17,21] A14 DQU7 VMA_DQ61 [17,21] A14 DQU7 VMA_DQ49 [17,21]
M7 M7 M7 M7
A15 A15 A15 A15
M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2

[17,21] FBA_CMD29 BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 +1.5V_GFX
N8 D9 FBA_CMD13 N8 D9 FBA_CMD13 N8 D9 FBA_CMD13 N8 D9
[17,21] FBA_CMD13 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7
[17] FBA_CMD27 [email protected]/10V_6 C592 FBA_CMD27 [email protected]/10V_6 C565 FBA_CMD27 [email protected]/10V_6 C563 FBA_CMD27 [email protected]/10V_6 C621
BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 [email protected]/10V_4 C560 VDD#K2 K8 [email protected]/10V_4 C574 VDD#K2 K8 [email protected]/10V_4 C585 VDD#K2 K8 [email protected]/10V_4 C599
VDD#K8 N1 [email protected]/10V_4 C577 VDD#K8 N1 [email protected]/10V_4 C571 VDD#K8 N1 [email protected]/10V_4 C370 VDD#K8 N1 [email protected]/10V_4 C403
J7 VDD#N1 N9 VMA_CLK0 J7 VDD#N1 N9 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
[17,21] VMA_CLK0 CK VDD#N9 CK VDD#N9 [17,21] VMA_CLK1 CK VDD#N9 CK VDD#N9
K7 R1 GND VMA_CLK0# K7 R1 GND K7 R1 GND VMA_CLK1# K7 R1 GND
[17,21] VMA_CLK0# CK VDD#R1 CK VDD#R1 [17,21] VMA_CLK1# CK VDD#R1 CK VDD#R1
[17,21] FBA_CMD3
K9 R9 FBA_CMD3 K9 R9 [17,21] FBA_CMD19
K9 R9 FBA_CMD19 K9 R9
CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9
C K1 A1 FBA_CMD0 K1 A1 K1 A1 FBA_CMD16 K1 A1 C
[17,21] FBA_CMD0 ODT VDDQ#A1 A8 +1.5V_GFX ODT VDDQ#A1 A8 +1.5V_GFX [17,21] FBA_CMD16 ODT VDDQ#A1 A8 +1.5V_GFX ODT VDDQ#A1 A8 +1.5V_GFX
[17] FBA_CMD2
L2 FBA_CMD2 L2 [17] FBA_CMD18
L2 FBA_CMD18 L2
J3 CS VDDQ#A8 C1 [email protected]/10V_6 C399 FBA_CMD11 J3 CS VDDQ#A8 C1 [email protected]/10V_6 C411 FBA_CMD11 J3 CS VDDQ#A8 C1 [email protected]/10V_6 C611 FBA_CMD11 J3 CS VDDQ#A8 C1 [email protected]/10V_6 C397
[17,21] FBA_CMD11 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9
[17,21] FBA_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 [email protected]/10V_4 C579 FBA_CMD28 L3 D2 [email protected]/10V_4 C390 FBA_CMD28 L3 D2 [email protected]/10V_4 C559 FBA_CMD28 L3 D2 [email protected]/10V_4 C636
[17,21] FBA_CMD28 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 [email protected]/10V_4 C578 E9 [email protected]/10V_4 C381 E9 [email protected]/10V_4 C613 E9 [email protected]/10V_4 C437
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
F3 VDDQ#F1 H2 GND F3 VDDQ#F1 H2 GND F3 VDDQ#F1 H2 GND F3 VDDQ#F1 H2 GND
[17,21] VMA_WDQS1 DQSL VDDQ#H2 H9 [17,21] VMA_WDQS0 DQSL VDDQ#H2 H9 [17,21] VMA_WDQS4 DQSL VDDQ#H2 H9 [17,21] VMA_WDQS5 DQSL VDDQ#H2 H9
G3 G3 G3 G3
[17,21] VMA_RDQS1 DQSL VDDQ#H9 [17,21] VMA_RDQS0 DQSL VDDQ#H9 [17,21] VMA_RDQS4 DQSL VDDQ#H9 [17,21] VMA_RDQS5 DQSL VDDQ#H9
E7 A9 E7 A9 E7 A9 E7 A9
[17,21] VMA_DM1 D3 DML VSS#A9 B3 [17,21] VMA_DM0 D3 DML VSS#A9 B3 [17,21] VMA_DM4 D3 DML VSS#A9 B3 [17,21] VMA_DM5 D3 DML VSS#A9 B3
[17,21] VMA_DM2 DMU VSS#B3 [17,21] VMA_DM3 DMU VSS#B3 [17,21] VMA_DM7 DMU VSS#B3 [17,21] VMA_DM6 DMU VSS#B3
E1 E1 E1 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
C7 VSS#G8 J2 C7 VSS#G8 J2 C7 VSS#G8 J2 C7 VSS#G8 J2
[17,21] VMA_WDQS2 DQSU VSS#J2 [17,21] VMA_WDQS3 DQSU VSS#J2 [17,21] VMA_WDQS7 DQSU VSS#J2 [17,21] VMA_WDQS6 DQSU VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
[17,21] VMA_RDQS2 DQSU VSS#J8 [17,21] VMA_RDQS3 DQSU VSS#J8 [17,21] VMA_RDQS7 DQSU VSS#J8 [17,21] VMA_RDQS6 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9
[17,21] FBA_CMD20 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
FBA_ZQ0 L8 VSS#T1 T9 FBA_ZQ1 L8 VSS#T1 T9 FBA_ZQ4 L8 VSS#T1 T9 FBA_ZQ5 L8 VSS#T1 T9
GND ZQ VSS#T9 GND ZQ VSS#T9 GND ZQ VSS#T9 GND ZQ VSS#T9
EV@243_4
R733 EV@243_4
R734 EV@243_4
R747 EV@243_4
R738
B1 GND B1 GND B1 GND B1 GND
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
B J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 B
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16 EV@VRAM _DDR3_HYNIX_256MX16 EV@VRAM _DDR3_HYNIX_256MX16 EV@VRAM _DDR3_HYNIX_256MX16
+1.5V_GFX +1.5V_GFX +1.5V_GFX 162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402) +1.5V_GFX
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
C615 EV@10U/6.3V_6
FOR EMI Request C634 EV@10U/6.3V_6
R743 R411
A +1.5V_GFX A
C568 EV@10U/6.3V_6 [email protected]/F_4 [email protected]/F_4 C404 EV@10U/6.3V_6
C591 EV@10U/6.3V_6 C638 EV@10U/6.3V_6

+1.5V_GFX VREFC_VMA1 VREFD_VMA1 VMA_CLK0 C405 *120P/50V_4 +1.5V_GFX
+1.5V_GFX C640 [email protected]/10V_4 C430 *120P/50V_4 +1.5V_GFX C598 [email protected]/10V_4
C408 [email protected]/10V_4 R412 C385 *120P/50V_4 C582 [email protected]/10V_4
C601 EV@1U/6.3V_4 C580 EV@1U/6.3V_4 C349 [email protected]/10V_4 R739 R410 EV@162_4 C607 *120P/50V_4 C628 EV@1U/6.3V_4 C573 EV@1U/6.3V_4 C603 [email protected]/10V_4
C581 EV@1U/6.3V_4 C413 EV@1U/6.3V_4 [email protected]/F_4 C602 [email protected]/F_4 C333 C630 *120P/50V_4 C343 EV@1U/6.3V_4 C635 EV@1U/6.3V_4 Quanta Computer Inc.
C569 EV@1U/6.3V_4 C575 EV@1U/6.3V_4 C346 [email protected]/10V_4 [email protected]/25V_4 [email protected]/25V_4 VMA_CLK0# C587 *120P/50V_4 C618 EV@1U/6.3V_4 C629 EV@1U/6.3V_4 C632 [email protected]/10V_4
C561 EV@1U/6.3V_4 C626 EV@1U/6.3V_4 C570 [email protected]/10V_4 C350 *120P/50V_4 C624 EV@1U/6.3V_4 C625 EV@1U/6.3V_4 C631 [email protected]/10V_4
C595 [email protected]/10V_4 C609 *120P/50V_4 C633 [email protected]/10V_4 PROJECT :ZRT/ZRTA
DDR3L - RANK0 3A

5 4 3 2 1
5 4 3 2 1
HYU 256Mx16, H5TC4G63AFR-11C ：AKD5PGWTW08---TOP

QBC PN：
：
： B/S PN : AKD5PGWTW07
：AKD5PZSTL01---TOP
MIC 256Mx16, MT41J256M16HA-093G:E QBC PN：
：
： B/S PN : AKD5PZSTL00
SAM 256Mx16, K4W4G1646D-BC1A ：AKD5PGWT501---TOP
QBC PN：
：
： B/S PN : AKD5PGWT502
U24
U22 U25
U23 VREFC_VMA3 M8 E3
VREFCA DQL0 VMA_DQ43 [17,20]
VREFC_VMA1 M8 E3 VREFC_VMA3 M8 E3 VREFD_VMA3 H1 F7
VREFCA DQL0 VMA_DQ1 [17,20] [20] VREFC_VMA3 VREFCA DQL0 VMA_DQ39 [17,20] VREFDQ DQL1 VMA_DQ44 [17,20]
VREFC_VMA1 M8 E3 VREFD_VMA1 H1 F7 VREFD_VMA3 H1 F7 F2
D [20] VREFC_VMA1 VREFCA DQL0 VMA_DQ12 [17,20] VREFDQ DQL1 VMA_DQ4 [17,20] [20] VREFD_VMA3 VREFDQ DQL1 VMA_DQ32 [17,20] DQL2 VMA_DQ40 [17,20] D
VREFD_VMA1 H1 F7 F2 F2 FBA_CMD9 N3 F8
[20] VREFD_VMA1 VREFDQ DQL1 VMA_DQ11 [17,20] DQL2 VMA_DQ0 [17,20] DQL2 VMA_DQ38 [17,20] A0 DQL3 VMA_DQ45 [17,20]
F2 FBA_CMD9 N3 F8 FBA_CMD9 N3 F8 FBA_CMD24 P7 H3
DQL2 VMA_DQ15 [17,20] A0 DQL3 VMA_DQ5 [17,20] A0 DQL3 VMA_DQ34 [17,20] A1 DQL4 VMA_DQ41 [17,20]
N3 F8 FBA_CMD24 P7 H3 FBA_CMD24 P7 H3 FBA_CMD10 P3 H8
[17,20] FBA_CMD9 P7 A0 DQL3 H3 VMA_DQ10 [17,20] P3 A1 DQL4 H8 VMA_DQ3 [17,20] P3 A1 DQL4 H8 VMA_DQ36 [17,20] N2 A2 DQL5 G2 VMA_DQ46 [17,20]
FBA_CMD10 FBA_CMD10 FBA_CMD13
P3 H8 FBA_CMD13 N2 G2 FBA_CMD13 N2 G2 FBA_CMD26 P8 H7
N2 G2 FBA_CMD26 P8 H7 FBA_CMD26 P8 H7 FBA_CMD22 P2
[17,20] FBA_CMD13 A3 DQL6 VMA_DQ14 [17,20] A4 DQL7 VMA_DQ6 [17,20] A4 DQL7 VMA_DQ33 [17,20] A5
P8 H7 FBA_CMD22 P2 FBA_CMD22 P2 FBA_CMD21 R8
[17,20] FBA_CMD26 A4 DQL7 VMA_DQ8 [17,20] A5 A5 A6
P2 FBA_CMD21 R8 FBA_CMD21 R8 FBA_CMD5 R2 D7
[17,20] FBA_CMD22 R8 A5 R2 A6 D7 R2 A6 D7 T8 A7 DQU0 C3 VMA_DQ51 [17,20]
[17,20] FBA_CMD21 FBA_CMD5 VMA_DQ25 [17,20] FBA_CMD5 VMA_DQ62 [17,20] FBA_CMD8 VMA_DQ52 [17,20]
R2 A6 D7 FBA_CMD8 T8 A7 DQU0 C3 FBA_CMD8 T8 A7 DQU0 C3 FBA_CMD23 R3 A8 DQU1 C8
[17,20] FBA_CMD5 T8 A7 DQU0 C3 VMA_DQ23 [17,20] R3 A8 DQU1 C8 VMA_DQ26 [17,20] R3 A8 DQU1 C8 VMA_DQ57 [17,20] L7 A9 DQU2 C2 VMA_DQ50 [17,20]
R3 A8 DQU1 C8 FBA_CMD28 L7 A9 DQU2 C2 FBA_CMD28 L7 A9 DQU2 C2 FBA_CMD4 R7 A10/AP DQU3 A7
[17,20] FBA_CMD23 A9 DQU2 VMA_DQ21 [17,20] A10/AP DQU3 VMA_DQ24 [17,20] A10/AP DQU3 VMA_DQ59 [17,20] A11 DQU4 VMA_DQ49 [17,20]
L7 C2 FBA_CMD4 R7 A7 FBA_CMD4 R7 A7 FBA_CMD7 N7 A2
[17,20] FBA_CMD28 A10/AP DQU3 VMA_DQ18 [17,20] A11 DQU4 VMA_DQ31 [17,20] A11 DQU4 VMA_DQ61 [17,20] A12/BC DQU5 VMA_DQ55 [17,20]
R7 A7 FBA_CMD7 N7 A2 FBA_CMD7 N7 A2 FBA_CMD14 T3 B8
[17,20] FBA_CMD4 N7 A11 DQU4 A2 VMA_DQ20 [17,20] T3 A12/BC DQU5 B8 VMA_DQ27 [17,20] T3 A12/BC DQU5 B8 VMA_DQ56 [17,20] T7 A13 DQU6 A3 VMA_DQ48 [17,20]
T3 A12/BC DQU5 B8 FBA_CMD12 T7 A13 DQU6 A3 FBA_CMD12 T7 A13 DQU6 A3 M7 A14 DQU7
[17,20] FBA_CMD14 A13 DQU6 VMA_DQ22 [17,20] A14 DQU7 VMA_DQ29 [17,20] A14 DQU7 VMA_DQ58 [17,20] A15
T7 A3 M7 M7
[17,20] FBA_CMD12 A14 DQU7 VMA_DQ19 [17,20] A15 A15
M7
A15 FBA_CMD29 M2 B2
BA0 VDD#B2 +1.5V_GFX
FBA_CMD29 M2 B2 FBA_CMD29 M2 B2 FBA_CMD6 N8 D9
BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 +1.5V_GFX BA1 VDD#D9
M2 B2 FBA_CMD6 N8 D9 FBA_CMD6 N8 D9 FBA_CMD30 M3 G7 [email protected]/10V_6 C418
[17,20] FBA_CMD29 N8 BA0 VDD#B2 D9 +1.5V_GFX M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 BA2 VDD#G7 K2
[17,20] FBA_CMD6 FBA_CMD30 [email protected]/10V_6 C606 FBA_CMD30 [email protected]/10V_6 C376
M3 BA1 VDD#D9 G7 [email protected]/10V_6 C341 BA2 VDD#G7 K2 BA2 VDD#G7 K2 VDD#K2 K8 [email protected]/10V_4 C619
[17] FBA_CMD30 BA2 VDD#G7 VDD#K2 VDD#K2 VDD#K8
K2 K8 [email protected]/10V_4 C435 K8 [email protected]/10V_4 C326 N1 [email protected]/10V_4 C420
VDD#K2 K8 [email protected]/10V_4 C639 VDD#K8 N1 [email protected]/10V_4 C395 VDD#K8 N1 [email protected]/10V_4 C394 VMA_CLK1 J7 VDD#N1 N9
VDD#K8 N1 VMA_CLK0 J7 VDD#N1 N9 J7 VDD#N1 N9 VMA_CLK1# K7 CK VDD#N9 R1
[email protected]/10V_4 C596 [17,20] VMA_CLK1 GND
J7 VDD#N1 N9 VMA_CLK0# K7 CK VDD#N9 R1 GND K7 CK VDD#N9 R1 GND FBA_CMD19 K9 CK VDD#R1 R9
[17,20] VMA_CLK0 CK VDD#N9 CK VDD#R1 [17,20] VMA_CLK1# CK VDD#R1 CKE VDD#R9
K7 R1 GND FBA_CMD3 K9 R9 K9 R9
[17,20] VMA_CLK0# CK VDD#R1 CKE VDD#R9 [17,20] FBA_CMD19 CKE VDD#R9
K9 R9
[17,20] FBA_CMD3 CKE VDD#R9 FBA_CMD16 K1 A1
C ODT VDDQ#A1 +1.5V_GFX C
FBA_CMD0 K1 A1 K1 A1 FBA_CMD17 L2 A8
K1 A1 ODT VDDQ#A1 A8 +1.5V_GFX [17,20] FBA_CMD16 ODT VDDQ#A1 A8 +1.5V_GFX CS VDDQ#A8 C1
[17,20] FBA_CMD0 +1.5V_GFX
FBA_CMD1 L2 [17] FBA_CMD17
L2 FBA_CMD11 J3 [email protected]/10V_6 C396
L2 ODT VDDQ#A1 A8 FBA_CMD11 J3 CS VDDQ#A8 C1 [email protected]/10V_6 C416 FBA_CMD11 J3 CS VDDQ#A8 C1 [email protected]/10V_6 C358 FBA_CMD15 K3 RAS VDDQ#C1 C9
[17] FBA_CMD1 CS VDDQ#A8 RAS VDDQ#C1 RAS VDDQ#C1 CAS VDDQ#C9
J3 C1 [email protected]/10V_6 C637 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD25 L3 D2 [email protected]/10V_4 C562
[17,20] FBA_CMD11 RAS VDDQ#C1 CAS VDDQ#C9 CAS VDDQ#C9 WE VDDQ#D2
K3 C9 FBA_CMD25 L3 D2 [email protected]/10V_4 C620 FBA_CMD25 L3 D2 [email protected]/10V_4 C384 E9 [email protected]/10V_4 C428
[17,20] FBA_CMD15 CAS VDDQ#C9 WE VDDQ#D2 WE VDDQ#D2 VDDQ#E9
L3 D2 [email protected]/10V_4 C393 E9 [email protected]/10V_4 C345 E9 [email protected]/10V_4 C407 F1
[17,20] FBA_CMD25 WE VDDQ#D2 VDDQ#E9 VDDQ#E9 VDDQ#F1
E9 [email protected]/10V_4 C576 F1 F1 F3 H2 GND
VDDQ#E9 VDDQ#F1 VDDQ#F1 [17,20] VMA_WDQS5 DQSL VDDQ#H2
F1 F3 H2 GND F3 H2 GND G3 H9
F3 VDDQ#F1 H2 [17,20] VMA_WDQS0 DQSL VDDQ#H2 H9 [17,20] VMA_WDQS4 DQSL VDDQ#H2 H9 [17,20] VMA_RDQS5 DQSL VDDQ#H9
GND G3 G3
[17,20] VMA_WDQS1 DQSL VDDQ#H2 [17,20] VMA_RDQS0 DQSL VDDQ#H9 [17,20] VMA_RDQS4 DQSL VDDQ#H9
G3 H9
[17,20] VMA_RDQS1 DQSL VDDQ#H9 E7 A9
[17,20] VMA_DM5 DML VSS#A9
E7 A9 E7 A9 D3 B3
E7 A9 [17,20] VMA_DM0 D3 DML VSS#A9 B3 [17,20] VMA_DM4 D3 DML VSS#A9 B3 [17,20] VMA_DM6 DMU VSS#B3 E1
[17,20] VMA_DM1 DML VSS#A9 [17,20] VMA_DM3 DMU VSS#B3 [17,20] VMA_DM7 DMU VSS#B3 VSS#E1
D3 B3 E1 E1 G8
[17,20] VMA_DM2 DMU VSS#B3 VSS#E1 VSS#E1 VSS#G8
E1 G8 G8 [17,20] VMA_WDQS6
C7 J2
VSS#E1 G8 C7 VSS#G8 J2 C7 VSS#G8 J2 B7 DQSU VSS#J2 J8
VSS#G8 [17,20] VMA_WDQS3 DQSU VSS#J2 [17,20] VMA_WDQS7 DQSU VSS#J2 [17,20] VMA_RDQS6 DQSU VSS#J8
C7 J2 B7 J8 B7 J8 M1
[17,20] VMA_WDQS2 B7 DQSU VSS#J2 [17,20] VMA_RDQS3 DQSU VSS#J8 [17,20] VMA_RDQS7 DQSU VSS#J8 VSS#M1
J8 M1 M1 M9
[17,20] VMA_RDQS2 DQSU VSS#J8 VSS#M1 VSS#M1 VSS#M9
M1 M9 M9 P1
VSS#M1 M9 VSS#M9 P1 VSS#M9 P1 FBA_CMD20 T2 VSS#P1 P9
VSS#M9 P1 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 RESET VSS#P9 T1
T2 VSS#P1 P9 RESET VSS#P9 T1 RESET VSS#P9 T1 R437 DR@243_4 FBA_ZQ7 L8 VSS#T1 T9
[17,20] FBA_CMD20 RESET VSS#P9 VSS#T1 VSS#T1 GND ZQ VSS#T9
T1 R416 DR@243_4 FBA_ZQ3 L8 T9 R417 DR@243_4 FBA_ZQ6 L8 T9
VSS#T1 GND ZQ VSS#T9 GND ZQ VSS#T9
R409 DR@243_4 FBA_ZQ2 L8 T9
GND ZQ VSS#T9 B1 GND
B1 GND B1 GND VSSQ#B1 B9
B1 GND VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B9 D1
VSSQ#B1 B9 VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#D1 D8
VSSQ#B9 D1 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D8 E2
VSSQ#D1 D8 VSSQ#D8 E2 VSSQ#D8 E2 J1 VSSQ#E2 E8
B VSSQ#D8 E2 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 L1 NC#J1 VSSQ#E8 F9 B
J1 VSSQ#E2 E8 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1
L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 L9 NC#J9 VSSQ#G1 G9
J9 NC#L1 VSSQ#F9 G1 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9
L9 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 96-BALL
NC#L9 VSSQ#G9 96-BALL 96-BALL SDRAM DDR3
96-BALL SDRAM DDR3 SDRAM DDR3 DR@VRAM _DDR3_HYNIX_256MX16
SDRAM DDR3 DR@VRAM _DDR3_HYNIX_256MX16 DR@VRAM _DDR3_HYNIX_256MX16
DR@VRAM _DDR3_HYNIX_256MX16
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
C402 DR@10U/6.3V_6 R448 R737
[email protected]/F_4 [email protected]/F_4
A A
C392 DR@10U/6.3V_6 C597 DR@10U/6.3V_6
+1.5V_GFX
C438 DR@10U/6.3V_6 VREFC_VMA3 VREFD_VMA3 162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402) C434 DR@10U/6.3V_6
+1.5V_GFX C400 [email protected]/10V_4

CS11622FB15 RES CHIP 162 1/16W +-1%(0402) C401 DR@10U/6.3V_6
C398 [email protected]/10V_4 R449 R740 +1.5V_GFX
C412 DR@1U/6.3V_4 C389 DR@1U/6.3V_4 C352 [email protected]/10V_4 [email protected]/F_4 C415 [email protected]/F_4 C594 VMA_CLK1 +1.5V_GFX C432 [email protected]/10V_4
C426 DR@1U/6.3V_4 C344 DR@1U/6.3V_4 [email protected]/25V_4 [email protected]/25V_4 C431 [email protected]/10V_4 Quanta Computer Inc.
C351 DR@1U/6.3V_4 C558 DR@1U/6.3V_4 C348 [email protected]/10V_4 R418 C600 DR@1U/6.3V_4 C593 DR@1U/6.3V_4 C424 [email protected]/10V_4
C347 DR@1U/6.3V_4 C353 DR@1U/6.3V_4 C572 [email protected]/10V_4 C433 DR@1U/6.3V_4 C391 DR@1U/6.3V_4
EV@162_4
C627 DR@1U/6.3V_4 C409 DR@1U/6.3V_4 C406 [email protected]/10V_4 PROJECT :ZRT/ZRTA
VMA_CLK1# C429 DR@1U/6.3V_4 C436 DR@1U/6.3V_4 C383 [email protected]/10V_4 Size Document Number Rev
DDR3L - RANK1 3A

5 4 3 2 1
5 4 3 2 1
DP TO VGA
IVDDO
+3V RX_IVDD 20mils
20mils
L16 80ohm_100MHz RX_IVDD33 R576 *Short_6
D D
C518 C497
0.1u/10V_4 0.1u/10V_4
C222 C223 15mils
0.1u/10V_4 *0.1u/10V_4
C204
10u/6.3V_6
IVDDO
IT6515 stuff 0 ohm
10
40
32
29
30
11
20
37
39
U16
IT6516 un-stuff 0 ohm CRTVDD5
IVDDO
OVDD
OVDD
IVDD33
IVDD33
IVDD
IVDD
IVDD
IVDD
[2] CRT_HPD CRT_HPD 33
HPD
20mils
38 5VMCU R266 6515@0_6
C209 0.1u/10V_4 CRT_TXP0_C 22 MCUVDDH
C [2] CRT_TXP0 23 RX0P C
C212 0.1u/10V_4 CRT_TXN0_C
[2] CRT_TXN0 RX0N
C214 0.1u/10V_4 CRT_TXP1_C 25
[2] CRT_TXP1 RX1P
C218 0.1u/10V_4 CRT_TXN1_C 26
[2] CRT_TXN1 RX1N
24 URDBG
URDBG TP22
12
ISPSCL 13
CRT_AUXP C205 0.1u/10V_4 CRT_AUXP_C 19 ISPSDA
[2] CRT_AUXP 18 RXAUXP 17
CRT_AUXN C203 0.1u/10V_4 CRT_AUXN_C DDCCLK_R R229 22/J_4
[2] CRT_AUXN RXAUXN VGADDCCLK DDCCLK [23]
16 DDCDAT_R R228 22/J_4 DDCDAT [23]
VGADDCSDA IVDDO
15
DCAUXP VSYNC
1 VSYNC VSYNC [23] 20mils
14 2 HSYNC
+3V DCAUXN HSYNC HSYNC [23]
IVDDO DAC_VDDC 80ohm_100MHz L24
20mils 0929 modify
30mils C505
10mils
L25 80ohm_100MHz RX_AVCC 21 6 0.1u/10V_4 C501
0.1u/10V_4 C499 27 AVCC VDDC 4.7u/10V_6
AVCC
10mils
C520
10u/6.3V_6
*0.1u/10V_4 C508 IT6515FN
9 CRT_RED CRT_RED [23]
IORP
8 CRT_GRE CRT_GRE [23]

IOGP
7 CRT_BLU CRT_BLU [23]

B IOBP B
34
RSVD TP29
10mils RSET
3 VGA_RST R253 200/F_4
RX_AVCC 28
0.1u/10V_4 C511 ASPVCC
5 DAC_VDDC
VDDA DAC_VDDC
C510
20mils
4 0.1u/10V_4
R268 [email protected]_4 36 COMP
+5V PCSDA
R269 [email protected]_4 35
PCSCL
IT6515 stuff 0 ohm
IT6516 un-stuff 0 ohm
PWD
GND
IT6515FN_QFN-40
31
41
R270
*10K_4
A A
[2,5,7,8,9,10,11,13,14,15,16,17,18,23,24,25,26,27,28,29,30,31,33,34,35,36,37,38,39] +3V
[23,24,26,27,29,33,37] +5V
https://t.me/biosarchive Quanta Computer Inc.
PROJECT : ZRT/ZRTA
3A
DP to VGA iT6165
5 4 3 2 1
1 2 3 4 5 6 7 8
CRTVDD5
CRT +5V 3
IN
Q20
OUT
1 C224 *0.1u/10V_4
2 CN17
16
GND CRTVDD5
AP2331SA-7
6
L13 BLM15BB470SN1D CRT_R1 1 11 CRT_11 TP68
+5V [22] CRT_RED
7
1C-1 2014/01/10 Remove U29 and add U40 and U41. L14 BLM15BB470SN1D CRT_G1 2 12 DDCDAT DDCDAT [22]
[22] CRT_GRE
8
L15 BLM15BB470SN1D CRT_B1 3 13 CRTHSYNC
[22] CRT_BLU
C512 9
4 14 CRTVSYNC
U32 0.1u/10V_4 C207 C211 C216 C215 C210 C206 10
R232 R234 R242 5 15 DDCCLK DDCCLK [22]
1 5 75/F_4 75/F_4 75/F_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4
OE# VCC
A A
CRT CONN
17
HSYNC 2 4 CRTHSYNC
[22] HSYNC A Y
3 DDCDAT 2.2K_4 R579 CRTVDD5

GND +5V DDCCLK 2.2K_4 R594
M74VHC1GT125DF2G U35
CRTHSYNC 1 10 CRTHSYNC C225 *0.22u/6.3V_4
C521 CRTVDD5 2 1 10 9 CRTVDD5
3 2 9 C228 *220p/50V_4
U34 0.1u/10V_4 CRTVSYNC 4 GND_3/8 7 CRTVSYNC
DDCCLK 5 4 7 6 DDCCLK C229 0.1u/10V_4 CRTVDD5
Power trace tracking
1 5 5 6
OE# VCC [2,5,7,8,9,10,11,13,14,15,16,17,18,22,24,25,26,27,28,29,30,31,33,34,35,36,37,38,39] +3V
*RClamp0524P C517 10p/50V_4 CRTVSYNC [22,24,26,27,29,33,37] +5V
[7,8,10,11,13,25,26,27,28,29,31,32,33,37,38,39] +3VPCU
VSYNC 2 4 CRTVSYNC U33 C515 10p/50V_4 CRTHSYNC [27,29,32,33,34,35,36,37,38,39] VIN
[22] VSYNC A Y CRT_R1 1 10 CRT_R1
CRT_G1 2 1 10 9 CRT_G1 C519 *10p/50V_4 DDCCLK
3 3 2 9
GND DDCDAT 4 GND_3/8 7 DDCDAT C507 *10p/50V_4 DDCDAT
CRT_B1 5 4 7 6 CRT_B1
M74VHC1GT125DF2G 5 6
*RClamp0524P
LCD CONNECTOR VIN

+3V
TP_PWR
CCD_PWR
LCD Power
+3V
C610 C608
C410 C414 Touch Panel interrupt R472 C614 C612
*10K_4 0.1u/10V_4_X7R
2
4.7u/25V_8 1000p/50V_4 0.1u/10V_4_X7R 1000p/50V_4 C440 U26 LCDVCC
1000p/50V_4
B 3 1 TP_INT 1u/6.3V_4 6 1 LCDVCC B
[10] TP_INT_PCH IN OUT
Q39 4 2 C423 C439 C421 C422 C425
*2N7002K IN GND
+3V R466 *short_4 EDP_VDD_EN_R 3 5 *0.1u/10V_4 *2.2u/10V_8 0.1u/10V_4 0.01U/25V_4 22u/6.3V_8
R471 *0_4 [2] EDP_VDD_EN ON/OFF GND
VIN
G5243AT11U
R748 100K_4 EDP_AUX_C R745 *100K_4 CN19
R749 *100K_4 EDP_AUX#_C R746 100K_4 MAX 1.5A R444 *short_8 R470
G_5
TP_RST# R475 *10K_4 R445 *short_8 V_BLIGHT
40
39 100K_4
38
LCDVCC C419 C417 37
*1u/6.3V_4 *1u/6.3V_4 36
R469 *short_8 LCDVCC_R 35
R742 *Short_6 CCD_PWR 34
+3V 33
32
R741 *Short_6 TP_PWR 31 G_4
+5V
+3V R744 *0_4 TP_RST# 30 Touch screen level shift I2C(reserve)
29
28 +3V
[2] PCH_BRIGHT 27
BL_ON
R788 33_4 EDP_HPD_R 26
[2] EDP_HPD 25
C783 180P/50V_4
C604 .1U/16V_4 EDP_AUX_C 24 R476 *0_4 R477 R473
[2] EDP_AUXP 23
[2] EDP_AUXN C605 .1U/16V_4 EDP_AUX#_C *10K_4 *10K_4
22
21 Q40
[2] EDP_TXP1 C616 .1U/16V_4 EDP_TX1_C TPD->100kHz,TS=400Khz
C617 .1U/16V_4 EDP_TX1#_C 20
eDP [2] EDP_TXN1 19 1 6 I2C1_SDA_GPIO6_CONN
Intel design guide suggestion
18 MCP PIN 10u.
[2] EDP_TXP0 C622 .1U/16V_4 EDP_TX0_C Per inch 3u TS=3x5inch
C623 .1U/16V_4 EDP_TX0#_C 17 2
[2] EDP_TXN0 16 +3V 400kHz10~100u =2.4~0.4k.
15 [10] I2C1_SDA_GPIO6 100Khz 10~100u=9k~1k.
[9] USBP6+ R761 *short_4 USBP6+_R [10] I2C1_SCL_GPIO7
R762 *short_4 USBP6-_R 14 4 3 I2C1_SCL_GPIO7_CONN
C CCD-USB [9] USBP6-
I2C1_SCL_GPIO7_CONN R775 *0_4 13 C
R754 0_4 USBP5+_R/TP_CLK 12 5
[9] USBP5+ 11
R755 0_4 USBP5-_R/TP_DATA
Touch Panel [9] USBP5-
I2C1_SDA_GPIO6_CONN R776 *0_4 10 G_1
C776 *.1U/16V_4 EDP_TX2_C 9 *2N7002DW
[2] EDP_TXP2 8
[2] EDP_TXN2 C777 *.1U/16V_4 EDP_TX2#_C R474 *0_4
R765 33_4 7
[31] TS_EN 6
[2] EDP_TXP3 C774 *.1U/16V_4 EDP_TX3_C
C775 *.1U/16V_4 EDP_TX3#_C 5
[2] EDP_TXN3 4
C782
180P/50V_4 R786 33_4 3
[10] GPIO8 2
TP_INT
1
G_0
+3VPCU
C781 50398-04071-001
180P/50V_4
R438
*100K_4
TS_EN R766 *0_4 TP_INT +3V LID# LID# [31]
1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT,

LID591#,EC intrnal PU
for issue debug. D22
R434 R455 1N4148WS
10K_4 10K_4
BL_ON
R454 *short_4 PCH_BLON_R BL#
Hall Sensor (HSR) [2] PCH_BLON
[31] PCH_BLON_EC R461 *short_4
3
https://t.me/schematicslaptop +3VPCU
R460
100K_4 2
EC_FPBACK# [31]
Q37
R1 *100K_4 Q38 DTC144EUA
1
2N7002DW
D D
1
R6
D5 *Short_6
*VPORT_6
1 2 1 2 R789 33_4 LID#
1B-3 2013/12/10 change Q3.3 from +3V to +3VPCU.
2
D6 C784
C1 *VPORT_6 180P/50V_4
3
4.7u/10V_6 MR1
AH9249NTR-G1 Quanta Computer Inc.
1
1st:AL009249000 -- BCD
PROJECT : ZRT/ZRTA
2nd:AL009132001 -- ANC 1A
CRT/LVDS/CAMERA/LID
1 2 3 4 5 6 7 8
5 4 3 2 1
HDMI
From PCH
C130 0.1u/10V_4 INT_HDMITX2N_C
[2] INT_HDMITX2N C129 0.1u/10V_4
[2] INT_HDMITX2P INT_HDMITX2P_C
C141 0.1u/10V_4 INT_HDMITX1N_C

[2] INT_HDMITX1N
[2] INT_HDMITX1P
C139 0.1u/10V_4 INT_HDMITX1P_C HDMI connector
[2] INT_HDMITX0N C132 0.1u/10V_4 INT_HDMITX0N_C
[2] INT_HDMITX0P C131 0.1u/10V_4 INT_HDMITX0P_C
C148 0.1u/10V_4 INT_HDMICLK+_C

D [2] INT_HDMICLK+ D
C151 0.1u/10V_4 INT_HDMICLK-_C
[2] INT_HDMICLK- CN12
20
SHELL1
1
INT_HDMITX0P_C 1
R161 R159 R145 R148 R150 R153 R140 R143 2 D2+
INT_HDMITX0N_C 3 D2 Shield
470_4 470_4 470_4 470_4 470_4 470_4 470_4 470_4 INT_HDMITX1P_C 4 D2-
5 D1+
2
INT_HDMITX1N_C 6 D1 Shield
INT_HDMITX2P_C 7 D1-
8 D0+
INT_HDMITX2N_C 9 D0 Shield 23
INT_HDMICLK+_C 10 D0- GND
1B-1 20131108 Change +5V to +3V for DG. 11 CK+ 22
CK Shield GND
3
INT_HDMICLK-_C 12
13 CK-
Q44 14 CE Remote
2 HDMI_DDCCLK_MB 15 NC
+5V DDC CLK
HDMI_DDCDATA_MB 16
+5V Q10 17 DDC DATA
2N7002E 3 1 HDMI_5V 18 GND
R521 IN OUT 2 19 +5V
1
*100K/F_4 GND HDMI_MB_HPD R527 *short_4HP_DET_CN HP DET 21
AP2331SA-7 C153 D21 SHELL2
1
*220p/50V_4 *AZ5125-01J HDMI connector
R529
20K_4
2
C C
HDMI-detect
+3V +3V
R526
2
1M_4
[2] INT_HDMI_HPD
1 3 HDMI_MB_HPD
Q47
2N7002K
I2C
+3V +5V
2
D24
RB501V-40
+3V
1
B B
R519 R520
EMI
2
2.2K_4 2.2K_4
Q45
1 3 HDMI_DDCCLK_MB
INT_HDMITX2P_C
2N7002K
R141 *120/F_4
+3V INT_HDMITX2N_C
+5V
INT_HDMITX1P_C
2
R152 *120/F_4
D26
RB501V-40 INT_HDMITX1N_C
+3V
INT_HDMITX0P_C
From PCH
1
R147 *120/F_4
[2] HDMI_DDCCLK_SW R523 R524
2
2.2K_4 2.2K_4 INT_HDMITX0N_C

Q46
1 3 HDMI_DDCDATA_MB INT_HDMICLK+_C
[2] HDMI_DDCDATA_SW
2N7002K R160 *120/F_4
INT_HDMICLK-_C
A A
https://t.me/biosarchive Power trace tracking
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,25,26,27,28,29,30,31,33,34,35,36,37,38,39]
[22,23,26,27,29,33,37]
+3V
+5V
PROJECT : ZRT/ZRTA
1A
HDMI (PS8101)
5 4 3 2 1
5 4 3 2 1
LAN
LAN_XTALI C167 10p/50V_4
+3V_S5 R215 NAC@0_8
1
2
https://t.me/schematicslaptop Y1
25MHZ +-30PPM
(1.5A) 60 mils
+3VPCU 1 3 R205 *short_8
40 mils
LANVCC
https://t.me/biosarchive VDD10
3
4
LAN_XTAL2 C176 Q15 R204 *0_8 REGOUT
C179 *10P/50V/COG_4 C168 10p/50V_4 AC@AO3413
2
R203 2.49K/F_4 RSET AC@1u/6.3V_4 R210
TP16 AC@100K_4
50 mils
10 mils
TP17
TP13
[31] IOAC_LANPWR# R202 AC@10K_4
D LANVCC D
C169 *10P/50V/COG_4
26
27
32
30
29
28
31
25
U9
LED1/GPO
LED0
AVDD33
AVDD10
RSET
CKXTAL2
CKXTAL1
LED2(LED1)
33
GND
MDI_0+ 1 24 LANVCC +3V

MDIP0 REGOUT REGOUT
MDI_0- 2 23 LANVCC R187 *0_4
MDIN0 VDDREG(VDD33) PCIERST# [28]
3 22
VDD10 AVDD10(NC) DVDD10(NC) VDD10
MDI_1+ 4 21 PCIE_LAN_WAKE#_R R184 AC@0_4
MDIP1 LANWAKEB IOAC_RST# [28,31]
MDI_1- 5 20 ISOLATEB R175
MDI_2+ 6 MDIN1 ISOLATEB 19 R182 NAC@0_4
MDIP2(NC) RTL8111H-CG AC@10K/J_4
PERSTB PLTRST# [7,13,16,27,28,31]
S0 IOAC
2
MDI_2- 7 18 GPP_TX3N_LAN C159 0.1U/10V_4
MDIN2(NC) HSON PCIE_RX3-_LAN [9]
8 17 GPP_TX3P_LAN C158 0.1U/10V_4
VDD10 AVDD10 HSOP PCIE_RX3+_LAN [9] 3 1 PCIE_REQ_LAN#_R
[9] CLK_PCIE_LAN_REQ#
+3V
AVDD33(NC)
Q11
REFCLK_N
MDIN3(NC)
REFCLK_P
MDIP3(NC)
CLKREQB
AC@2N7002K
LANVCC R191 R174 NAC@0_4
HSIN
HSIP
1K_4
ISOLATEB
9
10
11
12
13
14
15
16
LANVCC
40 mils (Iout=1A)
R193 1K_4
R186
2
15K_4
MDI_3+
C157 C156 MDI_3- S5 Q13
DTC144EUA
IOAC
0.1U/10V_4 10U/6.3V_6 LANVCC
C R195 *short_4 3 1 PCIE_LAN_WAKE#_R C
[7,28] PCIE_LAN_WAKE#
CLK_PCIE_LANN [9]
R194 0_4
CLK_PCIE_LANP [9] [31] LAN_WAKE# R188 *0_4
PCIE_TX3-_LAN [9]
PCIE_TX3+_LAN [9]
PCIE_REQ_LAN#_R
* Place 0.1uF CAP close to pin-- 24 * Place 1uF CAP close to each VDD10 pin-- 22 (reserve)
LANVCC * Place 0.1uF CAP close to each

VDD10 pin-- 3, 8, 22, 30 VDD10
40 mils (Iout=1A) REGOUT 40 mils (Iout=1A)
40 mils (Iout=1A)
C173 C165 C166 C171 40 mils (Iout=1A) R530 *short_8
0.1U/10V_4 0.1U/10V_4 *4.7U/6.3V_6 *4.7U/6.3V_6

C482 C480 C476 C479 C481 C477 C478
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 0.1U/10V_4
* Place 0.1uF CAP close to each For Surge improvement

VDD33 pin-- 11, 32 C5117\C5111 close
to pin 11,23.
B
Tramsformer B
RJ45 Connector
1003 change 0603 type
U31 CN13
24 LAN_MCT3 R201 75/F_6 LANCT3 R221 *Short_6
1 MCT0 C195 *0.1U/10V_4
TCT0 23 LAN_MX0+ C194 *0.1U/10V_4
MDI_0+ R199 1/F_4 MDI_0+_C 2 TX0+ C193 *0.1U/10V_4
TD0+ 22 LAN_MX0- C192 *0.1U/10V_4
MDI_0- R196 1/F_4 MDI_0-_C 3 TX0-
TD0- 21 LAN_MCT2 R197 75/F_6
U12 LANVCC 4 MCT1
MDI_0+_C 1 6 MDI_0-_C TCT1 20 LAN_MX1+ LAN_MX0+ 1 GND_LAN
2 IO1 IO4 5 MDI_1+ R190 1/F_4 MDI_1+_C 5 TX1+ LAN_MX0- 2
MDI_1-_C 3 GND REF 4 MDI_1+_C TD1+ 19 LAN_MX1- LAN_MX1+ 3
IO2 IO3 MDI_1- R185 1/F_4 MDI_1-_C 6 TX1- LAN_MX2+ 4
*CM1293A-04SO TD1- 18 LAN_MCT1 R183 75/F_6 LAN_MX2- 5
7 MCT2 LAN_MX1- 6
TCT2 17 LAN_MX2+ LAN_MX3+ 7 9
MDI_2+ R181 1/F_4 MDI_2+_C 8 TX2+ LAN_MX3- 8 10
U8 LANVCC TD2+ 16 LAN_MX2-
MDI_2+_C 1 6 MDI_2-_C MDI_2- R179 1/F_4 MDI_2-_C 9 TX2-
2 IO1 IO4 5 TD2- 15 LAN_MCT0 R178 75/F_6
MDI_3-_C 3 GND REF 4 MDI_3+_C 10 MCT3 GND_LAN
IO2 IO3 TCT3 14 LAN_MX3+
*CM1293A-04SO MDI_3+ R172 1/F_4 MDI_3+_C 11 TX3+
TD3+ LAN_RJ45
13 LAN_MX3-
GND
12 TX3-
1003 modify MDI_3- R173 1/F_4 MDI_3-_C
TD3-
Reserve for Surge GST5009B LF
25
Line to GND TVS

A A
C164
Power trace tracking
0.01U/50V/X7R_4
GND_LAN
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,26,27,28,29,30,31,33,34,35,36,37,38,39] +3V
[5,7,8,9,10,11,13,27,29,31,33,36,38] +3V_S5
[7,8,10,11,13,23,26,27,28,29,31,32,33,37,38,39] +3VPCU
C485
220p/3KV_1808
0930 modify Quanta Computer Inc.
PROJECT :ZRT/ZRTA
GND_LAN Size Document Number Rev
1A
LAN (RTL8111GS)
5 4 3 2 1
5 4 3 2 1
Codec(ADO) Grounding circuit(ADO)

HPR
+3VPCU
HPL
LINE1L-VREFO PIN1, PIN4, PIN3, PIN6 are ANALOG R67
LINE1R-VREFO +3V
*2N7002DW
MIC2-VREFO *100K_4
1 6 SLEEVE
CODEC_VREF C24 2.2U/6.3V_4 ADOGND R88
2
INT_AMIC-VREFO C23 10u/6.3V_4
ADOGND +5VA
D D
3
4 3
C27
C25
placed close to codec R42 100K_4 RING2 *100K_4
C30 5
2 *10K_4 PCH_AZ_CODEC_RST#
1u/10V_4
R91
10u/6.3V_4
1u/10V_4 C26 ADOGND Q5
C28 Q6
0.1u/10V_4 10u/6.3V_4 *2N7002K C71
*1u/10V_4
1
+AZA_VDD
Place next to pin 26
29
31
30
28
36
34
26
25
35
32
33
27
+1.5VA
U4
ADOGND
D-Mic
LINE1-VREFO-L
MIC2-VREFO
VREF
AVDD1
AVSS1
LINE1-VREFO-R
HP-OUT-L
CPVDD
CPVEE
CBN
HP-OUT-R
LDO1-CAP
C35
C34
10u/6.3V_4 0.1u/10V_4 +3V
ADOGND 37 24 LINE2-L +3V
CBP LINE2-L T1
R180 0_4 +3VDMIC2 C160 10p/50V_4 R213 DM@0_4 +3VDMIC C170 DM@10p/50V_4
38 23 LINE2-R
T2 C161 10u/6.3V_4 C177 DM@10u/6.3V_4
ADOGND AVSS2 LINE2-R
39 22 LINE1L_R U10 U11
Place next to pin 40 C29 10u/6.3V_4
LDO2-CAP LINE1-L 6 1 Dual_EN DMIC_CS R163 DM@0_4 6 1
VDD GND VDD GND +3VDMIC
Analog 40 21 LINE1R_R
AVDD2 LINE1-R DMIC_DAT_L R166 0_4 DMIC_DAT_C 5 2 DMIC_DAT_L R169 *0_4 DMIC_DAT_D 5 2 DMIC_CS2
41 20 DATA CS DATA CS
Digital +5VAA PVDD1 NC
R52 0_6
+3VPCU
DMIC_CLK_L R165 0_4 DMIC_CLK_C 4 3 DMIC_CLK_L R168 DM@0_4 DMIC_CLK_D 4 3
L_SPK+ 42 19 C37 10u/6.3V_4
CLK GND CLK GND
SPK-L+ MIC1-CAP ADOGND
C39 C41 D-MIC DM@D-MIC
10u/6.3V_4 0.1u/10V_4
L_SPK- 43
SPK-L-
ALC255 MIC2-R/SLEEVE
18 SLEEVE C154
*0.1u/10V_4
C155
*0.1u/10V_4
R_SPK- 44 17 RING2 C163 C162
SPK-R- MIC2-L/RING2 *0.1u/10V_4 *0.1u/10V_4
near Codec R_SPK+ 45 16
SPK-R+ MONO-OUT
46 15
+5VAA PVDD2 JDREF Dual_EN R176 DM@0_4
GPIO0/DMIC-DATA
+3VDMIC2
Low is power down PD# 47 GPIO1/DMIC-CLK 14
C C50 amplifier output PDB Sense B R170 SM@0_4 C
C49 48 13 SENSEA R63 200K_4 HP_JD#
SDATA-OUT
TP10 SPDIFO/GPIO2 Sense A
LDO3-CAP
0.1u/10V_4 1.Single DMIC DMIC_CS R207 *0_4 DMIC_CS2 R177 *0_4
SDATA-IN
+3VDMIC2 +3VDMIC
DVDD-IO
PCBEEP
RESETB
BIT-CLK
10u/6.3V_4 R68 100K_4 +3V KMM47237626-06DT (AL472376000) (MAIN)
DVDD
49
SYNC
DVSS
R206 SM@0_4 R171 DM@0_4

DGND SPM0437HD4H (AL000437000)
near Codec
Placement near Audio Codec
Analog 2.Dual DMIC
KMM47237622-10DT(AL472376001) (MAIN)
1
10
11
12
Digital NSM0410DT (W/ Fortemedia algorithm)
Main MIC CS need connect to second MIC DATA
C57 1.6Vrms D20 RB500V-40
+3V R71 *Short_6 +AZA_VDD
10u/6.3V_4 PCBEEP C61 0.1u/10V_4BEEP_1 R74 22K_4
SPKR [8,10]
Universal Audio Jack
DMIC_DAT_R
MIC2-VREFO
DMIC_CLK_R
C59 C65 R75 D19 RB500V-40

PCBEEP_EC [31]
C58 4.7K_4
0.1u/10V_4 10u/6.3V_4 100p/50V_4
+3V +1.5V
R31 R12
Place next to pin 1 2.2K_4 2.2K_4
PCH_AZ_CODEC_RST# 40mils
PCH_AZ_CODEC_RST# [8]
R92 *short_4
PCH_AZ_CODEC_SYNC [8] RING2 L1 *short_4 RING2_R
DMIC_DAT_L R73 *short_4
DVDD_IO R93 *0_4
DMIC_CLK_L R83 22_4
SLEEVE L4 *short_4 SLEEVE_R
R37 *short_4 ACZ_SDIN R82 33_4 C70 C55
PCH_AZ_CODEC_SDIN0 [8]
R57 *short_4 C67 40mils
R22 *short_4 10p/50V_4 0.1u/10V_4 10u/6.3V_4
PCH_AZ_CODEC_BITCLK [8]
R55 *short_4 CN3
R35 *short_4 C63 *22p/50V_4 SLEEVE_R 4
R11 *short_4 HPR L3 *Short_6 HPR-1 R23 56/F_4 HPR_SYS 2
C20 *1000p/50V_4 Place next to pin 9 HP_JD# 6
PCH_AZ_CODEC_SDOUT [8]
C54 *1000p/50V_4 5
7
HPL L2 *Short_6 HPL-1 R13 56/F_4 HPL_SYS 1
B B
RING2_R 3
ADOGND C13
+5VAA COMBOJACK
2200P/50V_4 C2
L10 R15
+5V R21
PBY160808T-600Y-N(60,3A) C3 *100P/50V_4
C46 C47 *1K_4 C14 Normal Open
*1K_4 2200P/50V_4 PIN1 --> L
1U/6.3V_4 10u/6.3V_4 *100P/50V_4 PIN2 --> R
PIN3 --> GND/MIC
PIN4 --> MIC/GND
LINE1R_R C10 4.7u/6.3V_4 ADOGND ADOGND ADOGND
PIN5 --> GND
PIN6 --> JD
LINE1L_R C8 4.7u/6.3V_4 PIN7 --> Shielding
+AZA_VDD
Codec PWR 5V(ADO) Mute(ADO) LINE1R-VREFO R20 4.7K_4 SLEEVE_R D10 1 2 *VPORT 0402 151 MV05
LINE1L-VREFO R19 4.7K_4

R69 HPR_SYS D9 1 2 *VPORT 0402 151 MV05
*1K_4 D18 RB500V-40 AMP_MUTE#

AMP_MUTE# [31] HPL_SYS D8 1 2 *VPORT 0402 151 MV05
PD# D17 RB500V-40 PCH_AZ_CODEC_RST#

DIGITAL ANALOG RING2_R D7 1 2 *VPORT 0402 151 MV05
L7 HCB2012KF220T60/6A/22ohm_8 ESD 2'nd CY00G050B00

+5V +5VA R65
U3 *10K_4 ADOGND
3 4
IN OUT
2
GND C32 C31
1 5 R46 *29.4K/F_4
SHDN SET *10u/6.3V_6 *0.1u/10V_4
*G923-330T1UF
C22 C33 R41
*10K/F_4 Codec PWR 3V/1.5V(ADO)
Internal Speaker
A A
*0.1u/10V_4 *10u/6.3V_6 ADOGND
R38 *0_4 +1.5VA

40mil for each signal
DIGITAL ANALOG
ADOGND 1003 change 0603type CN4
R_SPK+ R18 *Short_6 R_SPK+_1
R_SPK- R17 *Short_6 R_SPK-_1 4 6 R40 *short_4
3 5 +1.5V
L_SPK- R16 *Short_6 L_SPK-_1
2
C730, C787 close U37 pin3 and L65 L_SPK+ R14 *Short_6 L_SPK+_1
1
C17
SPK_CONN_4P 1U/6.3V_4 Quanta Computer Inc.

C7 C6 C5 C4
[7,8,10,11,13,23,25,27,28,29,31,32,33,37,38,39] +3VPCU *68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4 PROJECT : ZRT/ZRTA
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,27,28,29,30,31,33,34,35,36,37,38,39] +3V Size Document Number Rev
[22,23,24,27,29,33,37] +5V
3B
[11,28,37] +1.5V ALC283/HP/SPK
5 4 3 2 1
5 4 3 2 1
2.5" SATA HDD (HDD) SATA ODD Connector(ODD)
CN10
23
GND23
CN15
1 14
GND1 2 SATA_TXP0_C C52 0.01U/25V_4 GND14 +3V
RXP SATA_TXP0 [8]
3 SATA_TXN0_C C53 0.01U/25V_4 SATA_TXN0 [8] 1
RXN 4 GND1 2 SATA_TXP1_C C189 0.01U/25V_4 SATA_TXP1 [8]
GND2 5 SATA_RXN0_C C42 0.01U/25V_4 RXP 3 SATA_TXN1_C C196 0.01U/25V_4
D TXN SATA_RXN0 [8] RXN SATA_TXN1 [8] D
TXP
6 SATA_RXP0_C C43 0.01U/25V_4 SATA_RXP0 [8] GND2
4 R782 H:SSD
7 5 SATA_RXN1_C C200 0.01U/25V_4 100K_4 L:ODD
GND3 TXN SATA_RXN1 [8]
6 SATA_RXP1_C C201 0.01U/25V_4
TXP 7 SSD_ID R781 10K_4 SATA_RXP1 [8]
8 GND3 DEVSLP_ODD [8]
R231 10K_4 +3V
3.3V 9 R780 33_4
3.3V 10 DEVSLP0_R 8 ODD_PRSNT# [8]
R97 *0_4 DEVSLP0 [10] C208 180P/50V_4
3.3V 11 DP 9 +5VODD R561 *short_8 +5V_ODD
GND 12 +5V +5V 10
GND 13 +5V 11 C495 C493
C503 C509 C496 C500
+
GND 14 +5V_HDD 60mil R111 *short_8 MD 12
5V 15 GND 13 0.01U/25V_4 0.01U/25V_4 *0.1u/16V_4 *0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528
5V 16 GND
5V 17 C97 C96 C92 C91 C89 + C102 15
GND 18 GND15
R778 *0_4 G_INT2 [29] 0.01U/25V_4 0.01U/25V_4 *0.1u/16V_4 *0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528
RSVD 19 6030D-13G20 +3V
GND 20
12V 21 R239 10K_4
12V 22 R785 33_4
12V EC_ODD_EJ [31]
C780 180P/50V_4
24
GND24
HDD CONN
C ODD Power (ODD) +3VPCU

+15V +5V
Q49
AC@AO6402A
EMI C
+5V_ODD +5V VIN VIN VIN VIN

1
6
R544 5 4 R537 NAC@0_8
AC@100K 2
1 R538 C766 C767 C768 C769
AC@22_8 *0.1u/50V_6 *0.1u/50V_6 *0.1u/50V_6 *0.1u/50V_6
2
R560
3
ODD_EN_Q 2 1
MOD_EN_5V
AC@100K +1.5V_GFX +1.5V_GFX +1.5V_GFX
3
[31] ODD_POWER R571 AC@0_4 ODD_EN
ODD_EN_Q 2
1
[10] PCH_ODD_EN R575 *0_4

C491 Q48
R574 [email protected]/25V_6 AC@DMN601K-7
2
*100K 1
2
AC@2N7002DW
Q51
4
B
TPM NPCT650 (TPM) HOLE1
*H-TC315BC354D118P2
HOLE2 HOLE3
*O-ZRTA-5 *H-TC315BC354D118P2
HOLE4 HOLE5 HOLE6
*H-C118D118 *H-O138X114D138X114N *H-TC315BC354D134P2
HOLE7
*H-O152X92DO152X92N
B
1
TPMM 1.2 AL009655K01
+3V3_TPM_VSB
TPMM 2.0 AL000650K01 +3V +3V3_TPM SLB9655 STUFF +3V
+3V_S5
R491 *Short_6 R517 TPM_S@0_6 +3VSUS HOLE8 HOLE9 HOLE10 HOLE11 HOLE12 HOLE13 HOLE14 HOLE15
C458 TPM@10u/6.3V_6 R512 TPM_N@0_6 *O-ZRTA-3 *O-ZRTA-2 *o-zrt-1 *h-tc256ic201bc236d161p2 *h-tc256ic201bc236d161p2*O-ZRTA-1 *O-ZRTA-4 *h-tc256ic201bc236d161p2
C459 [email protected]/10V_4 R516 *0_6
C460 [email protected]/10V_4 C467 TPM@10u/6.3V_6
C469 [email protected]/10V_4 C468 [email protected]/10V_4
1
1
24
19
10
U29
VDD3
VDD2
VDD1
VSB
SLB9655 STUFF +3V3_TPM

HOLE16 HOLE17 HOLE18 HOLE19 HOLE20 HOLE21 HOLE22
LPC_LAD3 17 7 TPM_PP R513 *4.7K_4 *H-TC315BC354D134P2 *H-TC315BC354D217P2 H-C236D142P2 EV@MBZRQ001010 EV@MBZRQ001010 *H-C256D134P2 *O-ZRZ-6
[8,28,31] LPC_LAD3 LAD3 PP
LPC_LAD2 20 6 GPX R507 TPM_S@0_4
[8,28,31] LPC_LAD2 LAD2/SPI_IRQ GPX/GPIO2
LPC_LAD1 23 2
[8,28,31] LPC_LAD1 LAD1/MOSI GPIO1
[8,28,31] LPC_LAD0 LPC_LAD0 26
LPC_LFRAME# 22 LAD0/MISO 1
[8,28,31] LPC_LFRAME# LFRAME/SCS GPIO0/XOR_OUT
IRQ_SERIRQ 27 9 TPM_BADD R508 *10K_4
[10,31] IRQ_SERIRQ
1
1
PCLK_TPM 21 SERIRQ GPIO3/BADD 8
[9] PCLK_TPM LCLK/SCLK TEST
CLKRUN# R493 TPM_N@0_4 TPM_CLKRUN# 15 3 R509 TPM_LRESET#
[7,31] CLKRUN# CLKRUN/GPIO04 NC1
A PLTRST# R492 *short_4 TPM_LRESET# 16 12 TPM_S@0_4 A
[7,13,16,25,28,31] PLTRST# LRESET/SPI_RST NC2
LPCPD 28 13 SLB9655 STUFF
LPCPD NC3 14 [7,8,10,11,13,23,25,26,28,29,31,32,33,37,38,39] +3VPCU
NC4 [5,7,8,9,10,11,13,25,29,31,33,36,38] +3V_S5
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,26,28,29,30,31,33,34,35,36,37,38,39] +3V
GND1
GND2
GND3
GND4
BADD SELECTION HOLE23 [22,23,24,26,29,33,37] +5V

0 EEh - EFh *O-ZRZ-7
1 7Eh - 7Fh [4,29,33] +3VSUS
TPM@NPCT650
4
11
18
25
'1' - pin is left open.

'0' - pin is pulled down.
1
+3V3_TPM +3V3_TPM
PROJECT : ZRT/ZRTA
LPCPDR109 *4.7K_4 GPX R506 [email protected]_4 Size Document Number Rev
1A
SLB9655 STUFF SLB9655 STUFF HDD/ODD/TPM NPCT650
5 4 3 2 1
5 4 3 2 1
NGFF WiFi & BT (NGF) [7,8,10,11,13,23,25,26,27,29,31,32,33,37,38,39] +3VPCU

[11,26,37] +1.5V
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,26,27,29,30,31,33,34,35,36,37,38,39] +3V
CN14
+WL_VDD
1
NGFF 2 C213 10u/6.3V_6
D USBP4+ 3 GND 3.3Vaux 4 C483 0.1u/10V_4 D
[9] USBP4+ USB_D+ 3.3Vaux +WL_VDD
USBP4- 5 6 C484 0.1u/10V_4
[9] USBP4- USB_D- LED#1
7 8 C502 0.1u/10V_4
9 GND PCM_CLK 10 C504 0.1u/10V_4
11 SDIO CLK(O) PCM_SYNC 12
13 SDIO CMDIO) PCM_IN 14
15 SDIO DAT0(IO) PCM_OUT 16 R792 Q57
SDIO DAT1(IO) LED#2
2
17 18 *10K_4 *2N7002K
19 SDIO DAT2(IO) GND 20
21 SDIO DAT3(IO) UART Wake 22 SUSCLK 1 3
SDIO Wake(I) UART Rx PCH_SUSCLK [7]
23 24
SDIO Reset Key 5
25
KEY1 Key 6
26 +WL_VDD APU 3V_S5(Ext PU)
27 28 C684
29 KEY2 Key 7 30 *22P/50V_4 R791 *0_4
31 KEY3 Key 8 32
33 KEY4 UART Tx 34
PCIE_TX4+_WLAN 35 GND UART CTS 36
[9] PCIE_TX4+_WLAN PETp0 UART RTS
PCIE_TX4-_WLAN 37 38
[9] PCIE_TX4-_WLAN PETn0 Clink RESET
39 40
PCIE_RX4+_WLAN 41 GND CLink DATA 42
[9] PCIE_RX4+_WLAN PERp0 CLink CLK
PCIE_RX4-_WLAN 43 44 R542 *0_4
[9] PCIE_RX4-_WLAN PERn0 COEX3 PCIERST# [25]
45 46
CLK_PCIE_WLANP 47 GND COEX2 48 R541 AC@0_4
[9] CLK_PCIE_WLANP REFCLKP0 COEX1 IOAC_RST# [25,31]
[9] CLK_PCIE_WLANN CLK_PCIE_WLANN 49 50 SUSCLK
51 REFCLKN0 SUSCLK(32KHz) 52 WLAN_RST# R550 NAC@0_4
C
53 GND PERST0# 54 PLTRST# [7,13,16,25,27,31] C
WLAN_CLKREQ#
CLKREQ0# W_DISABLE#2 BT_POWERON [31]
WLAN_WAKE_R# 55 56 RF_EN_R R783 33_4 RF_EN [31]
57 PEWake0# W_DISABLE#1 58
59 GND NFC I2C SM DATA 60 C779 180P/50V_4
61 PETp1 NFC I2C SM CLK 62
63 PETn1 NFC I2C IRQ 64 LPC_LAD0_C R534 *0_4 LPC_LAD0
GND NFC Reset# LPC_LAD0 [8,27,31]
65 66 LPC_LAD1_C R533 *0_4 LPC_LAD1
PERp1 RESERVED3 LPC_LAD1 [8,27,31]
PERn1 RESERVED4 LPC_LAD2 [8,27,31]
GND RESERVED5 LPC_LAD3 [8,27,31]
[9] CLK_PCI_LPC
CLK_PCI_LPC R536 *0_4 CLK_PCI_LPC_C 71 72
LPC_LFRAME# R535 *0_4 LPC_LFRAME#_C 73 Reserved1 3.3Vaux 74 +WL_VDD
[8,27,31] LPC_LFRAME# Reserved2 3.3Vaux
75
GND
WLAN_NGFF CONN(Type 2230)
+1.5V
500mA for +1.5V

+1.5V_WLAN +1.5V_WLAN R192 *0_6
+1.5V
1 3 +1.5V_WLAN_R R200 *0_6 C172
B C175 C174 B
R189 Q12 *1000p/50V_4 *0.1u/10V_4 *10u/6.3V_8
*100K_4 *AO3413
2
IOAC_WLANPWR#
+WL_VDD
+WL_VDD Low Mini card +3V power enable
+3V
R564 High Mini card +3V power disable
4.7K_4
Q50
R540 IOAC
4.7K_4
5 R233
S0 4 3 WLAN_CLKREQ#
NAC@0_8
+WL_VDD
[9] PCIE_CLKREQ_WLAN#
+3VPCU
1 3 +WL_VDD
2
WLAN_WAKE_R#
S5 1 6 R569 *short_4
R223 Q17
*100K_4 AC@AO3413
WLAN_WAKE# [31]
2
A [31] IOAC_WLANPWR# A
R568 *0_4
PCIE_LAN_WAKE# [7,25]
2N7002DW
R539 *0_4
R563 *0_4
PROJECT : ZRT/ZRTA
High Mini card +3V power disable Size Document Number Rev
1A
Mini-Card/WL/3G/SIM
5 4 3 2 1
5 4 3 2 1
TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay)

K/B (KBC) 7 8 MX6 R485 0_6
5 6 MX7 L6 0_6
+3V_S5
CN5 3 4 MY17 TPD->100kHz,TS=400Khz *AO3413
MX0 1 1 2 MY16 Intel design guide suggestion +3VSUS L5 *0_6 1 3
[31] MX0 2 CP2 *100p/50Vx4
[31] MX1 MX1 MCP PIN 10u. +TPVDD
MX2 3 7 8 MX2 Per inch 3u TS=3x5inch Q42 C446 + C443
[31] MX2
[31] MX3 MX3 4 5 6 MX3 400kHz10~100u =2.4~0.4k. R484 R483 R487
2
MX4 5 3 4 MX4 *100K_4 0.22u/25V_6 0.1u/10V_4
[31] MX4 6 1 2
100Khz 10~100u=9k~1k. 10K_4 10K_4
[31] MX5 MX5
7 CP6 *100p/50Vx4
MX5 1006 Del R486 *0_4 C450 *1000p/50V_4
TP CN
[31] MX6 MX6 50mil
MX7 8 7 8 MY3 [31] PTP_PWR_EN# +TPVDD
8 10
[31] MX7
MY17 9 5 6 MY2 R481 *short_4 TPCLK_R 7 9
D [31] MY17 [31] TPCLK D
MY16 10 3 4 MY1 R482 *short_4 TPDATA_R 6
[31] MY16 11 1 2 [31] TPDATA 5
MY15 MY0
[31] MY15
[31] MY14 MY14 12 CP1 *100p/50Vx4 I2C_TP_SDA_R 4
MY13 13 7 8 MY7 R33 *0_4 +TPVDD C444 C445 I2C_TP_SCL_R 3
[31] MY13 14 5 6 *0.1u/10V_4 R784 33_4 TPD_INT#_R 2
MY12 MY6 *0.1u/10V_4
[31] MY12 2N7002DW [2,31] TPD_INT#
MY11 15 3 4 MY5 R480 2.2K_4 R790 33_4 TPD_EN_R 1
[31] MY11 [31] TPD_EN
[31] MY10 MY10 16 1 2 MY4 R479 2.2K_4
MY9 17 CP3 *100p/50Vx4 1 6 CN7
[31] MY9 18 7 8 C785
[31] MY8 MY8 MY11
MY7 19 5 6 MY10 [10] I2C0_SDA_GPIO4 2 I2C_TP_SDA_R 180P/50V_4
[31] MY7
MY6 20 3 4 MY9 [10] I2C0_SCL_GPIO5 I2C_TP_SCL_R
[31] MY6
MY5 21 1 2 MY8
[31] MY5
MY4 22 CP4 *100p/50Vx4 4 3
[31] MY4 23 7 8
MY3 MY15
[31] MY3
[31] MY2 MY2 24 5 6 MY14 5
MY1 25 3 4 MY13 +TPVDD
[31] MY1 Q41 +3V VIN
MY0 26 1 2 MY12 +TPVDD
[31] MY0 R779 0_4 27 29 CP5 *100p/50Vx4 R34 *0_4 R478 *10K_4 TPD_EN_R
[13,31] NBSWON#
28 30 C447 *100p/50V_4 +3V
MX1
C448 *100p/50V_4 MX0 R56 R26
KB_CONN
R51 *1M_6 *22_8
1
*10K_4 +TPVDD
PTP_PWR_EN#
D29
*TVS AZ5125-01H.R7G
3
2
3
+3VPCU R768
*10K_4
2 2 2
C RP1 *10K_10P8R TPD_INT# C
10 1 MX3 R48 Q1
MX4 9 2 *1M_6 *2N7002K
1
MX6 8 3 MX2 Q3 Q2 C641
For test only
1
MX5 7 4 MX0 1006 add *DTC144EU *DTC144EU 180P/50V_4
MX7 6 5 MX1
SW1
3 2 NBSWON#
TP61 4 1 TP62
5
6 C778
Power Switch
*0.1u/10V_4 CPU FAN (THM) +3V
+3V
R601
R584
+5V 10K_4
+5V *10K_4
KB_BL LED (KBL) +5V
2
C547 [email protected]/6.3V_6 C516
[31] FANSIG
R406 2.2U_6
1
U36 30mils CN16
1
KBL@10K_4 Q52 2 3 TH_FAN_POWER
VIN VO 5 1
KBL@AO3413 GND 2
2 1 6
[8] SMB1ALERT# /FON GND 3
2
7 C514 C513 C523
4 GND 8 FAN_3P
[31] CPUFAN# VSET GND
3
B 2.2U_6 0.01U/25V_4 *0.01U/25V_4 B
1
G991P11U
3
2 +5V_KB R727 *Short_6 +5V_KB_R

[31] KB_BL_LED
Q36 C553 C551 FANPWR = 1.6*VSET
KBL@DTC144EU CN18
1
[email protected]/10V_6 [email protected]/25V_4
4
3 6
2
1
5
POWER LED(UIF) R7 *1M_4
[7,8,10,11,13,23,25,26,27,28,31,32,33,37,38,39] +3VPCU
[22,23,24,26,27,33,37] +5V
+3V_S5 [2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,26,27,28,30,31,33,34,35,36,37,38,39] +3V
KBL@KB_backlight
[30,33,34,35] +5VPCU
R8 *1M_4
[4,27,33] +3VSUS
[5,7,8,9,10,11,13,25,27,31,33,36,38] +3V_S5
D1 1 2 *5.5V/25V/410P_4 +3V_S5
+3V Power LED Blue
LED1
G-sensor(ACS) R522 *Short_6 +G_SEN_PW
[31] PWRLED#
R2 71.5/F_4 2 3
U30 [31] SUSLED# R3 130/F_4 1

C473 C474 1 2
[email protected]/10V_4 14 Vdd_IO NC 3 LED_AMBER/BLUE
GS@10u/6.3V_6 VDD NC
1 Amber
2
D2 *5.5V/25V/410P_4
10 R9 *1M_4
RESERVED +3VPCU
[10] ACCEL_INTA D23 GS@RB500V-40 ACCEL_INTA_R 11 15
D27 GS@RB500V-40 G_INT2_R 9 INT1 RESERVED R10 *1M_4
[27] G_INT2 INT2 +3VPCU
A
ACCEL_INTA R518 *short_4 7
SA0
Battery D3 1 2 *5.5V/25V/410P_4
A
CLK_SDATA R514 *short_4 G_MBDATA_R 6 5

[8,13,14,15] CLK_SDATA
CLK_SCLK R515 *short_4 G_MBCLK_R 4 SDA GND 12 Blue
LED2
[8,13,14,15] CLK_SCLK SCL GND 13 R4 71.5/F_4 2 3
C472 8 GND 16 [31] BATLED0#
+G_SEN_PW +G_SEN_PW
*22P/50V_4 CS GND R5 130/F_4 1
G_MBDATA_R C470 *33P/50V_4
GS@LIS3DHTR
[31] BATLED1#
LED_AMBER/BLUE
C471 *33P/50V_4
G_MBCLK_R
Amber
1 2 PROJECT : ZRT/ZRTA
D4 *5.5V/25V/410P_4 Size Document Number Rev
R510 *4.7K_4 G_MBDATA_R
+G_SEN_PW
R511 *4.7K_4 G_MBCLK_R
KB/TP/FAN/LED 3A

5 4 3 2 1
5 4 3 2 1
USB 3.0 Connector(UB3) USB Charger for USB3.0 Port0 (UBC)

USBPWR1
CN8
USB3.0 CONN
1
USBP0-_R R54 *short_4 USBP0-_C 2 1 VBUS
USBP0+_R R50 *short_4 USBP0+_C 3 2 D-
4 3 D+
R47 *short_4 USB3_RXN0_R 5 4 GND
[9] USB3_RXN0 5 SSRX-
R49 *short_4 USB3_RXP0_R 6
[9] USB3_RXP0 7 6 SSRX+ +5VPCU
C40 0.1u/10V_4 USB3_TXN0_R 8 7 GND
[9] USB3_TXN0 C45 0.1u/10V_4 USB3_TXP0_R 9 8 SSTX-
D [9] USB3_TXP0 9 SSTX+ D
R122 *0_4 CLT1 R124 *100K_4
13
12
11
10
R113 *0_4 ILIM_SELR114 *100K_4
13
12
11
10
+5VPCU
USBPWR1
U5 Close USB3.0
USBP0-_C RV4 1 2 *EGA_4 1u/6.3V_4 C87 1 12 USBPWR R72 *short_8
USBP0+ 3 IN OUT 10 USBP0+_R
[9] USBP0+ DP_OUT DP_IN
USBP0+_C RV3 1 2 *EGA_4
[9] USBP0- USBP0- 2 11 USBP0-_R C56
R117 *short_4 USB_CHARGE_EN 5 DM_OUT DM_IN 13 USB_OC0#
+
[31] USB_CHARGE_ON EN FAULT
USB3_RXN0_R RV1 1 2 *EGA_4 9 16 R103 22K_4 C51 C62
6 STATUS ILIM_HI 15
[31] USB_CLT1 R123 *short_4 CLT1 R102 48.7K_4 100u/6.3V_12
USB3_RXP0_R RV2 1 2 *EGA_4 CLT2 7 CLT1 ILIM_LO 4
GND1
R121 100K_4 0.1u/10V_4
R120 100K_4 CLT3 8 CLT2 ILIM_SEL 14 470P/50V_4
+5VPCU CLT3 GND
1007 change footprint
USB3_TXN0_R RV5 1 2 *EGA_4
17
G3703R41D
USB3_TXP0_R RV6 1 2 *EGA_4 GMT AL003703000 ILIM_SEL R115 *short_4 USB_BC_ON [31]
TI AL002544001
USB 3.0 Connector(UB3) Card Reader (CRD)
C C
R29 *short_4 USBP7-_R +3V R39 *Short_6 DVDD
[9] USBP7- R30 *short_4 USBP7+_R
[9] USBP7+
TP1
TP2
USBPWR2 SD_D2/MS_D5
CN11 SD_D3/MS_D4
USB3.0 CONN 0.1u/10V_4 C12
1 USBP1-_R RV10
1 2 *EGA_4
USBP1- R105 *short_4 USBP1-_R 2 1 VBUS TP3
[9] USBP1- 2 D-
USBP1+ R101 *short_4 USBP1+_R 3 USBP1+_R RV9 1 2 *EGA_4
V18
[9] USBP1+ 3 D+
4
USB3_RXN1 R96 *short_4 USB3_RXN1_R 5 4 GND USB3_RXN1_R RV7 1 2 *EGA_4
[9] USB3_RXN1 USB3_RXP1 R100 USB3_RXP1_R 6 5 SSRX-
*short_4
24
22
21
20
19
23
[9] USB3_RXP1 7 6 SSRX+ USB3_RXP1_R RV8 1 2 *EGA_4 U2
C85 0.1u/10V_4 USB3_TXN1_R 8 7 GND
V18
SP14
SP13
SP12
SP11
XD_D7
[9] USB3_TXN1 8 SSTX-
C90 0.1u/10V_4 USB3_TXP1_R 9
[9] USB3_TXP1 9 SSTX+ USB3_TXN1_R RV11
1 2 *EGA_4 R27 6.2K/F_4 RREF 1 18 SD_CMD
13
12
11
10
USBP7-_R 2 RREF SP10 17

USB3_TXP1_R RV12
1 2 *EGA_4 USBP7+_R 3 DM GPIO0 16 TP4
RTS5170 SP9 TP5
13
12
11
10
DP
DVDD 4
3V3_IN
QFN24 SP8
15 SD_CLK
VCC_XD VCC_XD 5 14
SDREG 6 CARD_3V3 SP7 13 TP6 SD_CDZ
SDREG SP6
XD_CD#
C21
SP1
SP2
SP3
SP4
SP5
C16 C15
4.7u/10V_6 0.1u/16V_4 25 GND
0.1u/10V_4
7
8
9
10
11
12
+5VPCU
USBPWR2
U6 Close USB3.0
1u/6.3V_4 C117 5 1
IN OUT
2 C93
GND
+
B B
USBON# 4 3 C94 C95
[31] USBON# EN /OC
100u/6.3V_12
AP22802BW5-7 0.1u/10V_4 TP8 TP7
470P/50V_4 TP9 SD_D0/MS_D6
[9] USB_OC0#
SD_D1/MS_D7
SD_WP/MS_D1
Enable: Low Active /2.5A
[4,33,36,38,39] +5V_S5
USB IO D/B (UB2) +5V_S5

USBPWR3
SD/MMC CARD READER (CRD)
[33,34,35] +5VPCU
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,26,27,28,29,31,33,34,35,36,37,38,39] +3V
U1 Close CN37
1u/6.3V_4 C11 5 1
IN OUT
2 C441
+
GND C9 CN1
USBON# 4 3 C442 *100u/6.3V_12
EN /OC SD_WP/MS_D1 R45 *short_4 SD_WP_R 11
AP22802BW5-7 0.1u/10V_4 SD_CDZ R36 *short_4 SD_CD#_R 10 WP 16
470P/50V_4 SD_D2/MS_D5 R25 *short_4 SD_DATA2_R 9 CD NC 17
SD_D1/MS_D7 R44 *short_4 SD_DATA1_R 8 DATA2 NC
[9] USB_OC1# SD_D0/MS_D6 R43 *short_4 SD_DATA0_R 7 DATA1
6 DATA0
5 VSS2
Enable: Low Active /2.5A SD_CLK R32 *short_4 SD_CLK_R
CLK
VCC_XD 4
3 VDD
SD_CMD R28 *short_4 SD_CMD_R 2 VSS1
GND
GND
GND
GND
SD_D3/MS_D4 R24 *short_4 SD_DATA3_R 1 CMD
CD/DATA3
USBPWR3 SD-CARD
12
13
14
15
A CN6 C18 A
1 C19
2 4.7u/10V_6 0.1u/16V_4
3
4
5
6
[9] USBP3- 7
8
D/B USB Port [9] USBP3+
9 11
10 12
USB_CONN
PROJECT : ZRT/ZRTA
1A
USB Port/ DB
5 4 3 2 1
5 4 3 2 1
EC(KBC) L9 +A3VPCU
+3VPCU
BLM15AG121SN1D(120,500MA)_4 +3VPCU_ECPLL L23 +3VPCU_EC

C48 BLM15AG121SN1D(120,500MA)_4 S5_ON R494 10K_4
0.1u/10V_4 C464 (For PLL Power) NBSWON# R499 10K_4
ECAGND 12 mils 0.1u/10V_4
+3VPCU
R490 2.2_6 +3V_GFX
1 2
12 mils +3VPCU_EC C461
SB_ACDC [32]
+3VPCU
TP11 BT_POWERON BT_POWERON [28] dGPU_OTP# R502 EV@10K_4
C38 C463 C462 C457 C449 C44 0.1u/10V_4 dGPU_OPP# R58 EV@10K_4
+3VPCU_EC and +3V_RTC PCH_SLP_SUS# [7]
FB_CLAMP_REQ# R66 EV@10K_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 FB_CLAMP_REQ#
minimum trace width 12mils. FB_CLAMP_REQ# [19]
MAINON R53 100K_4
D
D/C# [32] D
USBON# [30]
R76 2.2_6 TPD_EN [29] SUSON R497 100K_4
+3V
1 2 +3V_EC USB_BC_ON [30]
USB_CHARGE_ON [30] VRON R60 100K_4
C64 CLKRUN# [7,27]
PCH_SPI_SI_EC R495 *10K_4
0.1u/10V_4
114
121
106
127
U27 PCH_SPI_SO_EC R496 *10K_4
11
26
50
92
84
83
99
98
97
96
93
74
19
20
82
3
10 110 MBCLK
VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY_FSPI
AVCC
EGCLK/GPE3
EGCS#/GPE2
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/ID0/GPH0
[8,27,28] LPC_LAD0
GPH7
MBCLK [32]
L80HLAT/BAO/GPE0
L80LLAT/GPE7
VSTBY(PLL)
EGAD/GPE1
9 LAD0/GPM0(3) SMCLK0/GPB3 111 MBDATA
[8,27,28] LPC_LAD1 LAD1/GPM1(3) SMDAT0/GPB4 MBDATA [32]
8 SM BUS 115 2ND_MBCLK
[8,27,28] LPC_LAD2 LAD2/GPM2(3) SMCLK1/GPC1 2ND_MBCLK [8,19]
7 116 2ND_MBDATA
+3VPCU
[8,27,28] LPC_LAD3
[7,13,16,25,27,28] PLTRST# PLTRST# 22
13
LAD3/GPM3(3)
LPCRST#/GPD2
SMDAT1/GPC2
PECI/SMCLK2/GPF6(3)
117
118
EC_PECR_R R498
2ND_MBDATA [8,19]
43_4 H_PECI [4] SM BUS PU(KBC)
[9] CLK_PCI_EC LPCCLK/GPM4(3) SMDAT2/PECIRQT#/GPF7(3) LID# [23]
6 +3VPCU
[8,27,28] LPC_LFRAME# LFRAME#/GPM5(3)
PROCHOT_EC 17 MBCLK R500 4.7K_4
LPCPD#/GPE6
2
MBDATA R501 4.7K_4

D16 TP63
126
GA20/GPB5(3) PS/2
R70 SDMK0340L-7-F [10,27] IRQ_SERIRQ 5 85 IOAC_RST# [25,28]
100K_4 15 SERIRQ/GPM6(3) PS2CLK0/CEC/TMB0/GPF0 86 +3V_S5
[10] SIO_EXT_SMI#
23 ECSMI#/GPD4(3) LPC PS2DAT0/TMB1/GPF1 89
EC_FPBACK# [23]
[10] SIO_EXT_SCI# ECSCI#/GPD3 PS2CLK2/GPF4 TPCLK [29]
1
WRST# 14 GPIO 90 2ND_MBCLK R504 4.7K_4

WRST# PS2DAT2/GPF5 TPDATA [29]
4 2ND_MBDATA R505 4.7K_4
[10] SIO_RCIN# KBRST#/GPB6(3)
16
C455
1u/6.3V_4
[28] WLAN_WAKE# PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
IT8987 PWM0/GPA0
24
25
PWRLED# [29]
BATLED1# [29]
LQFP
PWM1/GPA1 28 SUSLED# +3V_RTC +3VPCU
PWM2/GPA2 SUSLED# [29]
113 29
[29] KB_BL_LED
[7] DNBSWON#
123 CRX0/GPC0
CTX0/TMA0/GPB2(3) CIR PWM3/GPA3
PWM4/GPA4
30
31
BATLED0# [29]
MAINON [35,37]
USB_CLT1 [30]
Battery B/I SW
CLK_PCI_EC PWM5/GPA5
C C
PWM R772 R773
[7] APWORK
80 *0_4 *0_4
119 DAC4/DCD0#/GPJ4(3) 47
[7,13] SUSB# DSR0#/GPG6 TACH0A/GPD6(3) FANSIG [29]
R488 [5,7] EC_PWROK
33 48 PCH_SUSACK# [7]
88 GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3)
[23] PCH_BLON_EC PS2DAT1/RTS0#/GPF3
*22_4
[29] CPUFAN#
81 120 SUSON [33,35]
87 DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) 124 dGPU_OTP#
[25] LAN_WAKE# PS2CLK1/DTR0#/GPF2 TMRI1/GPC6(3) dGPU_OTP# [19]
[8] ME_WR#
109 R774
108 TXD/SOUT0/GPB1 *10K_4
[26] AMP_MUTE# RXD/SIN0/GPB0
C456
*10p/50V_4 71 107 NBSWON# WRST#
[27] ODD_POWER ADC5/DCD1#/GPI5(3) PWRSW/GPE4 NBSWON# [13,29]
72 UART port 18
[32] ACIN ADC6/DSR1#/GPI6(3) RI1#/GPD0(3) SUSC# [7,13]
1
73 WAKE UP 21 HWPG +3V_RTC C772
[32] TEMP_MBAT ADC7/CTS1#/GPI7(3) RI2#/GPD1
[28] IOAC_WLANPWR# 35 *0.1U/16V_4
34 RTS1#/GPE5
[26] PCBEEP_EC PWM7/RIG1#/GPA7
2
[5] HWPG_1.05V_EC# 122 112 RSMRST# [7] [32] BI
95 DTR1#/SBUSY/GPG1/ID7 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7
[32] AC_Protect CTX1/SOUT1/GPH2/SMDAT3/ID2
[27] EC_ODD_EJ 94 R771
CRX1/SIN1/SMCLK3/GPH1/ID1
3
Q55 100K_4
6
[8] PCH_SPI_CLK_EC 105 PJA138K
101 FSCK/GPG7
[8] SPI_CS0#_UR_ME FSCE#/GPG3 RF_EN [28]
102 EXTERNAL SERIAL FLASH ICMNT 2 BI_GATE
[8] PCH_SPI_SI_EC FMOSI/GPG4 ICMNT [32]
103 66
[8] PCH_SPI_SO_EC FMISO/GPG5 ADC0/GPI0(3)
1
67 C36 10u/6.3V_6 ECAGND
56 ADC1/GPI1(3) 68 dGPU_OPP# C773
[29] MY16 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) dGPU_OPP# [19] SW3
57 69 *0.1U/25V_4
[29] MY17 VRON [36]
2
KSO17/SMISO/GPC5(3) ADC3/GPI3(3)
3
4
32 70 BI_SW Q54
[23] TS_EN PWM6/SSCK/GPA6 ADC4/GPI4(3) IOAC_LANPWR# [25]
1
6 *PJ4N3KDW
[33,34,37] S5_ON S5_ON 100 A/D D/A
125 SSCE0#/GPG2
[29] PTP_PWR_EN# SSCE1#/GPG0 SPI ENABLE
TACH2/GPJ0(3)
76 DPWROK [7] Vgs = 1.5V Vgs = 1.5V
36 77 EC_FB_CLAMP 5
[29] MY0 KSO0/PD0 GPJ1(3) EC_FB_CLAMP [17,19]
37 78
[29] MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(3) PCH_PWROK [5,7]
B 38 79 B
[29] MY2 KSO2/PD2 DAC3/TACH1B/GPJ3(3) PCH_SUSPWRACK_R [7]
1
2
39
[29] MY3 KSO3/PD3
40
[29] MY4 41 KSO4/PD4
[29] MY5 KSO5/PD5
42 KBMX
[29] MY6 KSO6/PD6
43
[29] MY7 KSO7/PD7
44
[29] MY8 KSO8/ACK#
45
[29] MY9 KSO9/BUSY
46
[29] MY10 KSO10/PE
51 2 R95 *0_4
[29] MY11
KSI3/SLIN#
KSO11/ERR# GPJ7
KSI1/AFD#
KSI0/STB#
KSI2/INIT#
52 CLOCK 128 R98 0_4

[29] MY12 KSO12/SLCT GPJ6 TPD_INT# [2,29]
53
VCORE
[29] MY13 54 KSO13

AVSS
KSI4
KSI5
KSI6
KSI7
[29] MY14 H_PROCHOT# [4,32,36]

VSS
VSS
VSS
VSS
VSS
55 KSO14
[29] MY15 KSO15
3
IT8987 SM BUS ARRANGEMENT TABLE Q4
58
59
60
61
62
63
64
65
27
49
91
104
75
12
SM Bus 1 Battery PROCHOT_EC 2

[29] MX0
C60
[29] MX1
ECAGND
[29] MX2 SM Bus 2 PCH/VGA R62 2N7002K

0.1u/10V_4
[29] MX3
1
100K_4
[29] MX4
[29] MX5 SM Bus 3
[29] MX6
L11
[29] MX7
BLM15AG121SN1D(120,500MA)_4 SM Bus 4
[7,8,10,11,13,23,25,26,27,28,29,32,33,37,38,39] +3VPCU
HWPG(KBC) +3V
[16,18,19,39] +3V_GFX
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,26,27,28,29,30,33,34,35,36,37,38,39] +3V
[5,7,8,9,10,11,13,25,27,29,33,36,38] +3V_S5
A
https://t.me/schematicslaptop DDR=1.5V, D1 DNP and D2 POP
DDR=1.35V, D1 POP and D2 DNP R64
A
https://t.me/biosarchive [37] HWPG_1.5V

D1
D11 RB500V-40
10K_4
HWPG
D2
D15 *RB500V-40
[5] HWPG_1.05V
D13 RB500V-40
[35] HWPG_VDDR
D14 RB500V-40 PROJECT : ZRT/ZRTA
[13,34] HWPG_1.05V_S5 Size Document Number Rev
D12 RB500V-40 3A
[33] SYS_HWPG KBC IT8587
5 4 3 2 1
https://t.me/biosarchive https://t.me/schematicslaptop
5 4 3 2 1
34
VA2 PR203
VA1 PQ56 PD8 0.02/F_0612 PQ22
AOL1413 SV1040 VIN AOL1413
PJ1 1 1 1
2 5 3 1 2 2 5
1 3 2 3
2 PR202
3
1
D *short_4 D
4
PC62 PC52 PR105 24737_ACN PC139 PC138 PR117
4
Power conn 0.1u/50V_6 0.1u/50V_6 220K_4 0.1u/50V_6 2200p/50V_6 33K/F_4
PD5
P4SMAFJ20A 24737_ACP
2
PC58 PC55 PR205
0.1u/50V_6 2200p/50V_6 1 6 *short_4
PD3 PR104 2 5 PR114

D/C# [31]
1N4148WS 220K_4 10K_4
recommend 200mA at least. 3 4 PR214
*short_4
PQ55
3
IMD2AT108
2
24737_ACP
PQ21
2N7002K
24737_ACN
1
PR128
*Short_6 PC63 PC61 PC165
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
PR127
+3VPCU 63.4K/F_4
1
2
VIN
PR229 PC157
ACN
ACP
C 10K/F_4 1u/16V_6 C
24737_ACDET 6 16 24737_REGN
ACDET REGN
PR107 PR110 PR108 PC53
*10K_4 100K_4 100K_4 0.1u/25V_4 PD9
24737_VCC 20 RB500V-40
VCC PR116 PC162 PC161
PR124 PC163 *Short_6 2200p/50V_6 10u/25V_8
20_1206 0.47u/25V_6 17 24737_BST
[31] ACIN BTST
5
PC160
47n/50V_6
[7] ACPRESENT
PR99 18 24737_DH 4
HIDRV
6
*0_4 5 PQ58
[31] SB_ACDC ACOK# AON7410
PR100 19 24737_LX
PHASE
3
2
1
*short_4 PR230
0.01/F_0612
MBDATA 8 PU11 PL11
PQ18 SDA BQ24737RGRR 6.8uH_7X7X3
2N7002DW PR226 15 24737_DL 1 2 BAT-V
1
*short_4 LCDRV
PC159 MBCLK 9
SCL
5
0.1u/50V_6
+3VPCU PR225 PQ57
PR222 *short_4 14 AON7410 PR123
PC152 10K_4 PGND *4.7_6
*100p/50V_4 24737_BM# 11 4 PR224 PR223
BM# *short_4 *short_4
PR227 PC153
10K_4 24737_CMPOUT 3 PR112 10_6 0.1u/25V_4
CMPOUT
3
2
1
B BAT-V 13 24737_SRP 24737_SRP PC155 PC164 PC158 B
SRP 2200p/50V_6 10U/25V_8 10U/25V_8
PC60
24737_ILIM 10 PC156 *680p/50V_6 24737_SRN
BI [31] ILIM
C114F3-108A1-L_Batt_Conn
PJ2 0.1u/25V_4
PR221 *0_4 PR125 PR113 7.5_6
9 8 316K/F_4 24737_CMPIN 4 12 24737_SRN
7 CMPIN SRN
6 PR122 100_4 TEMP_MBAT IOUT
GND
GND
GND
GND
GND
5 TEMP_MBAT [31]
PC154
4 0.1u/25V_4
3
+3VPCU
PR115 PR228 ／ SRN
SRP／
2
7
21
22
23
24
25
PR121 1M_4 100K/F_4
10 1 *100K_4 Check with HW side
4-Cells Others
R2 +1.05V
PR119 PR120 PR118 PC54 bq24707A ／0

0／／ 7.5
10／
100_4 100_4 100K/F_4 0.01U/25V_4
3
PR220
*100K_4
PR126 bq24737 ／ 7.5
10／／ 7.5
10／
24737_BM# 2 PR111
MBCLK [31] R1 SP@51K/F_4
*0_4 H_PROCHOT# [4,31,36]
PQ20
3
*2N7002K
[31] ICMNT
MBDATA [31]
REGN MAX voltage 6.5V
1
1
2
PC56 PC57
24737_CMPOUT
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
*47p/50V_4 *47p/50V_4 PC59 PQ19
100p/50V_4 2N7002K
=0.793V for 3.965A current limit
A A
GPU_THROTTING# [19]
2
PR109
Pin10 ILIM=0.793V
Rsr = 0.01ohm
3
PD6 PD4 *short_4
PDZ5.6B PDZ5.6B R1 R2
24737_CMPOUT 2
UMA-45W 51K(CS35102FB04) 100K
[31] AC_Protect For BATT Only PQ59
*2N7002K
DIS-65W 115K(CS41152FB08) 100K 1
PROJECT : ZRT/ZRTA
2A
Charger(BQ24737RGRR)
5 4 3 2 1
https://t.me/schematicslaptop https://t.me/biosarchive
5 4 3 2 1
MAIND
MAIND [34,37]
SYS_SHDN#
SYS_SHDN# [10,37]
35
PR137
*Short_6
JP2 JP3
*short_3720 +3VPCU VL 3V_LDO *short_3720
PR10
D D
10K/F_4
1 2 +5VPCU_VIN [31] SYS_HWPG +3VPCU_VIN 1 2
VIN VIN
SYS_SHDN#
10u/6.3V_6
0.1u/25V_4
4.7u/6.3V_6
1
+
PR131 PR139 PR138

2
PC77 PC73 PC6 *short_4 *short_4 *100K/F_4 PC7 PC75

33U/25V_6x4.5 10u/25V_8 2200p/50V_6 2200p/50V_6 10u/25V_8
PC69
PC71
51225_VIN
PC70
+5VPCU +5VPCU PQ29
5
5 Volt +/- 5% AON7410 +3VPCU
5
PQ26
TDC : 6.9A AON7410 +3VPCU
3.3 Volt +/- 5%
1
PEAK : 9.1A
13
12
3
4
OCP : 11A TDC : 3A
1
4
VREG5
VREG3
VIN
Width : 280mil 7 6 SYS_SHDN#
PEAK : 4A
3
2
1
PGOOD EN2
JP7 OCP : 5A
2
1
2
3
*short_3720 51225_EN1 20 10 51225_DH2
EN1 DRVH2 PR140 PC74 Width : 120mil JP5
2
PL1 51225_DH1 16 9 51225_VBST2 PL3 *short_3720
2.2uH_7X7X3 PC67 PR132 DRVH1 VBST2 3.3uH_7X7X3
+5V_SRC 51225_VBST1 17 8 51225_SW2 1/F_6 0.1u/50V_6 +3V_SRC
VBST1 PU4 SW2
0.1u/50V_6 1/F_6 51225_SW1 18 TPS51225RUKR 11 51225_DL2
SW1 DRVL2
5
C C
PR133 51225_DL1 15 4 51225_FB2 PR136
15.4K/F_4 DRVL1 VFB2 6.81K/F_4
51225_FB1 2 21 PR12
+ PR8 4 VFB1 GND 4 *4.7_6 +
*4.7_6 14 22
PC65 PC64 VO1 GND PC80 PC90
VCLK
GND
GND
GND
GND
CS1
CS2
220u/6.3V_6X4.2 0.1u/50V_6 PQ27 PQ30 0.1u/50V_6 220u/6.3V_6X4.2
1
2
3
3
2
1
AON7752 AON7752 PC8
PR134 *680p/50V_6 PR135
19
26
25
24
23
10K/F_4 PC5 10K/F_4
*680p/50V_6
51225_CS1
51225_CS2
51225_VCLK
OCP:5A
L(ripple current)
=(9-3.3)*3.3/(3.3u*0.355M*9)
110K/F_4
48.7K/F_4
~1.784A
PC2 Iocp=5-(1.784/2)=4.108A
2
0.1u/50V_6
PD2 Vth=4.108A*14.5mOhm+1mV=60.56mV
OCP:11A 1PS302 3
1/13 Adding +3VSUS power for touch pad R(Ilim)=(60.56mV*8)/10uA
PR130 ~48.45K
L(ripple current) 1
=(9-5)*5/(2.2u*0.3M*9)
*Short_6 (By acer request)
PR4
PR11
PC1
=3.367A 0.1u/50V_6 PC66
Iocp=11-(3.367/2)=9.316A 0.1u/50V_6 PR6
2 *Short_6
B Vth=9.316A*14.5mOhm+1mV=136.082mV PD1 VIN +3VSUS +15V VIN +3VPCU B
R(Ilim)=(136.082mV*8)/10uA 1PS302 3
=108.86K 1
PR152 PR160 PR150 PR151
+15V +15V_ALWP *1M_6 *22_8 *1M_6 *1M_6
3
PR7
22_8 PC3
0.1u/50V_6 SUSD 2
3
PQ37
2 *AO3404
[31,35] SUSON
1
2 2
PR153 PQ36 PQ34 +3VSUS
1
PQ35 *1M_6 *2N7002K *2N7002K
*DTC144EU PC82
TDC : 0.038A
1
VIN +3V_S5 +5V_S5 +15V VIN +5VPCU +5VPCU +3VPCU +3VPCU *2.2n/50V_4
PEAK : 0.05A
Width : 20mil
PR3 PR16 PR1 PR9 PR5
5
1M_6 22_8 22_8 1M_6 *1M_6

3
3
S5D 2 MAIND 4 MAIND 2 S5D 2
A A
3
PQ25 PQ24 PQ6 PQ8

3
2
1
2 AO3404 MDV1528Q AO3404 AO3404

31,34,37] S5_ON
1
1
2 2 2
PR2 PQ4 PQ1 PQ3 +5V_S5 +5V +3V +3V_S5

1
PQ2 1M_6 2N7002K 2N7002K 2N7002K

DTC144EU PC4
TDC : 0.75A TDC : 3.86A TDC : 0.62A TDC : 0.68A
1
*2.2n/50V_4
PEAK : 1A PEAK : 5.14A PEAK : 0.83A PEAK : 0.91A PROJECT : ZRT/ZRTA
Width : 40mil Width : 160mil Width : 40mil Width : 40mil SYSTEM 5V/3V (TPS51225) 2A

5 4 3 2 1
5 4 3 2 1
JP8
*short_3720
36
1 2 VIN
D D
+5VPCU
+3V
PC9 PC11 PC86

1u/10V_4 PQ40 2200p/50V_6 10u/25V_8
5
PR13 AON7410
100K/F_4
7
V5IN
51211V_DRVH 4
1 9 PR17 PC10 +1.05V_S5
[13,31] HWPG_1.05V_S5 PGOOD DRVH *Short_6 0.1u/50V_6
[31,33,37] S5_ON
PR146 *short_4 51211V_EN 3 10 51211V_VBST
3
2
1
EN VBST PL4
51211V_TRIP 2 PU1 8 51211V_SW +1V_SRC 1 2
PR14 121K/F_4 TRIP TPS51211DSCR SW 1uH_7X7X3
51211V_TST 5 6 51211V_DRVL
TST DRVL
5
PR149 470K/F_4
12 11 JP9
C PR15 GND GND PR169 PR148 *short_3720 C
GND
GND
GND
GND
*100K/F_4 *4.7_6 5.1K/F_4
FB
4 +
+1.05V
*22u/6.3V_8
13
14
15
16
4
1.05 Volt +/- 5%
PC97
PC98 PC95
51211V_FB PQ38 0.1u/50V_6 330u/2.5V_6X4.2
TDC : 7.91A
3
2
1
AON7752 PC87
OCP=12A *680p/50V_6 PR145
PEAK : 10.5A
10K/F_4
L ripple current
=(19-1.05)*1.05/(1u*290k*19) OCP : 12A
=3.42A Width : 320mil
Vtrip=12-(3.42/2)*14.5mohm
=149.2mV
Rlimit=149.2mV/10uA*8=119.36Kohm VFB=0.7V
+1.05V_S5
B B
5
MAIND 4
VIN +1.05V_MODPHY +15V +1.05V_S5 [33,37] MAIND PQ43
AON6414AL
1
2
3
PR22 PR188 PR24
3
*1M_4 *22_8 *1M_4 +1.05V_MODPHY +1.05V
+1.05V
PR58 *short_8
MODPHY_D 2
TDC : 4.5A
3
3
3
PR20
*0_4 PR21
PQ50
*AO3404
PEAK : 6A
Width : 180mil
1
2 *1M_4 2 2
[10] MODPHY_EN PC13 +1.05V_MODPHY
1
PQ49 PQ10 *2.2n/50V_4

A PQ9 *2N7002K *2N7002K A
1
PC12 PR23 *PDTC143TT

1
*1u/10V_4 *100K_4
+1.05V_MODPHY Quanta Computer Inc.
2
TDC : 1.38A PROJECT : ZRT/ZRTA

PEAK : 1.84A Size Document Number Rev
Width : 60mil +1.05V_S5 (TPS51211) 2A

5 4 3 2 1
5 4 3 2 1
TDC : 0.75A
PEAK : 1A
Width : 40mil
+DDR_VTT_RUN
37
PC91 PC92
10u/6.3V_6 10u/6.3V_6
D TDC : 0.38A D
PEAK : 0.5A DDR_VTTREF
Width : 20mil
Close to IC
Greater than or equal 40mil
PC89
0.22u/10V_4
+5VPCU
+3V JP4
*short_3720
PC93 PC84
22
21
10u/6.3V_6 1u/10V_4
1
4
5
2
PR168 51216_VIN 1 2
VIN
100K/F_4
PAD
PAD
VTTSNS
VTTGND
VLDOIN
VTTREF
VTT
+1.35V_SUS
20 12
PQ32
AON7410
1.35 Volt +/- 5%
[31] HWPG_VDDR PGOOD V5IN TDC : 4.5A
5
C
PC81 PC79 C
2200p/50V_4 10u/25V_8
PR157 51216_S3 17 14 51216_DRVH
PEAK : 6A
[31,37] MAINON S3 DRVH
*0_4 PR154 PC83 OCP : 8A
2/F_6 0.1u/50V_6 4 JP1
[31,33] SUSON
PR155 51216_S5 16
S5 VBST
15 51216_VBST *short_3720 Width : 180mil
*short_4 PU5 PL2
TPS51216RUKR 2.2uH_7X7X3
3
2
1
PR166 51216_MODE 19 13 51216_SW +1.35VSUS_SRC 1 2 +1.35V_SUS
200K/F_4 MODE SW
5
PR161 51216_TRIP 18 11 51216_DRVL
TRIP DRVL +1.35V_SUS [4,5,14,15]
84.5K/F_4
VDDQSNS
PR147
26 10 4 *4.7_6
PAD PGND
REFIN
GND
PAD
PAD
PAD
REF
+
PC72 PC68
3
2
1
VREF=1.8V PC78 0.1u/50V_6 330u/2.5V_6X4.2
6
25
24
23
7 *680p/50V_6
51216_REF PQ33
AON7752
51216_REFIN
PC88 PR19
B 0.1u/10V_4 *Short_6 B
RDSon=14.5mohm
PR165
51216_S3 PR156 51216_S5 10K/F_4 Close to output cap
*0_4
51216_S3 PR163
DDR_VTTT_PG_CTRL [4]
*short_4
PR159 PC85
30.1K/F_4 0.01U/25V_4 Mode Frequency Discharge mode
200K 400K Tracking Discharge
100K 300K Tracking Discharge

OCP=8A
L ripple current
=(19-1.35)*1.35/(2.2u*400k*19) DDR=1.35V
A =1.425A PR84=10K/F_4 S3 S5 +1.35VSUS REF VTT A
Vtrip=8-(1.425/2)*14.5mohm PR86=30.1K/F_4
=105.668mV S0 1 1 ON ON ON
Rlimit=105.668mV/10uA*8=84.53Kohm Quanta Computer Inc.
S3 (mainon off) 0 1 ON ON OFF PROJECT : ZRT/ZRTA
S4/S5 0 0 OFF OFF OFF 2A
DDR 1.35V(TPS51216)
5 4 3 2 1
5 4 3 2 1
JP6
*short_3720
38
IMON offset +VIN_VCCIN
Place NTC close to the 1 2 VIN

VCORE Hot-Spot. +5V_S5
+VIN_VCCIN +3V_S5 51624_VREF +5V_S5
2200p/50V_4
100U/25V_6x4.5
1
10u/25V_8
10u/25V_8
0.1u/50V_6
PC129 +
PC42
PC43
PC132
PC134
PC137
100K/F_4_4250NTC
1u/10V_4
PR79
2M/F_4
2
20/F_6
36.5K/F_4
S28@665K/F_4
*90.9K/F_4
*39.2K/F_4
2
PR78
PR211
PR201
PR200
PR199
PR196
PR106
10K/F_4
D D
1_6
PR204
VDD
PR208 51624_SKIP# 1 5 PL8
PR80 *short_4 SKIP# VIN [email protected]_7X7X4
51624_OCP-I 51624_VRON 51624_PWM1 51624_PWM1_R 8 4 CS_SW1 1 2
DCR= 0.66mOhm
PWM VSW +VCCIN
2M/F_4 CS_BSTR1 6 3
BOOT_R PGND
4
PC149
PC49
PR74
20K/F_4
30K/F_4
39K/F_4
1000P/50V_4
1u/6.3V_4
150K/F_4
0.33u/6.3V_4
S28@100K/F_4
[email protected]/F_4
PR87 1U/10V_6 CS_BST1 7 9 +
PR81
PR85
PR89
PR90
2.2_6
9.09K/F_4
BOOT PAD
PR86
PR83
PC47
PC148
100K/F_4
*330u/2V_7343
0.1u/10V_4
22u/6.3V_8
22u/6.3V_8
*short_4
PR194 PC46 PU8
PC33
PC28
PC29
PC127
1000p/50V_6
2.2/F_6 CSD97374CQ4M
PC38
0.22u/25V_6
Add 11 GND VIAs
for thermal pad
PR71
PR67
51624_CSP1
+1.05V
PR70
51624_B-RAMP
51624_SLEWA
51624_F-IMAX
Close to VR 51624_THERM PC141
51624_O-USR
51624_VREF
*0.1u/25V_4
51624_VDD
51624_V5A
PC142
10K/F_4_3435KNTC
PR84
51624_VBAT
0.1u/10V_4
PC50
PR98
56_4
PR216
PR219
PR103
*56_4
130/F_4
*75/F_4
51624_CSN1
PR190
28
27
14
11
16
10
15
9
2
PC48
*0.1u/25V_4
VREF
V5A
THERM
O-USR
VBAT
B-RAMP
VDD
F-IMAX
SLEWA
30 6 51624_PWM1
[4,31,32] H_PROCHOT# VR_HOT PWM1
VR_SVID_CLK PR217 *short_451624_CLK 31 5 51624_PWM2 Close to the Close with
[5] VR_SVID_CLK VCLK PWM2
VR side. phase1 inductor
VR_SVID_ALERT# PR218 *short_451624_ALERT# 32 4 51624_MODE
[5] VR_SVID_ALERT# ALERT MODE
[5] VR_SVID_DATA VR_SVID_DATA PR213 *short_451624_DATA 1 17 51624_CSP1
VDIO CSP1
C 3 PU10 18 51624_CSN1 C
PGOOD TPS51624RSM CSN1
+3V +3V +3V 51624_SKIP# 7 19 51624_CSN2
SKIP CSN2 PS3 OSR
51624_VRON 8 20 51624_CSP2
VR_ON CSP2
51624_VFB 24 21
Rmode 100K Ohm ON ON
*100K/F_4
*100K/F_4
*100K/F_4
VFB NC
PR96
PR207
PR206
51624_GFB 23 22 PR94
GFB N/C 150K/F_4
DROOP
COMP
OCP-I
IMON 150K Ohm ON OFF

GND
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
51624_VREF
26
25
12
13
29
33
34
35
36
37
38
39
40
41
42
[5,10] IMVP_PWRGD
PR209 *short_4
For BW 2 Phase
51624_DROOP
51624_OCP-I
51624_IMON
51624_COMP
[31] VRON
PR198 *0_4 PR97
*short_8 +VIN_VCCIN
*short_4
*short_4
[5] VRON_CPU
PR197 *short_4
+VCCIN
For BW 1 Phase +5V_S5

PC151
PR215
PR82
10K/F_4
*100p/50V_4
S28@340K/F_4
28@2200p/50V_4
PC130
PC44
PC41
PC133
PC131
PC147 28@1u/10V_4
4700p/25V_4
PR187 *330p/50V_4
PR212
PR210
PR101
PC140
*10_4 +3V_S5
2
1500p/50V_4
VDD
1 5
PR88
51624_SKIP# PL9
PR102
39K/F_4
[5] VCC_SENSE SKIP# VIN

PC51
[email protected]_7X7X4 DCR= 0.66mOhm

51624_PWM2 8 4 CS_SW2 1 2
[12] VSS_SENSE PWM VSW +VCCIN
PR95
[email protected]_6
15@0_4 CS_BSTR2 6 3
4
BOOT_R PGND
PR73
PR186 CS_BST2 7 9
BOOT PAD
B Parallel *10_4 PC146
B
28@0_4
*0.01u/50V_4
28@1000p/50V_6
28@22u/6.3V_8
28@22u/6.3V_8
51624_CSP2 PC135 PU9
PC32
PC30
PC31
PR195 [email protected]/25V_6 28@CSD97374CQ4M
PC37
Close to the
CPU side. [email protected]/F_6 Add 11 GND VIAs
51624_PWM2
for thermal pad
PR69
PR66
51624_CSN2 51624_CSP2
PR68
PC145
*0.1u/25V_4
PR92 PR91
PC144
15@0_4 *0_4
*22.6K/F_4
28@10K/F_4_3435KNTC
PR93
51624_CSN2
PR191
PC143
*0.1u/25V_4
S28@ Close to the

VR side.
Close with
phase1 inductor
BW-U 15W (1 phase) BW-U 28W (1 phase) BW-U 28W 2 phase
Icc TDC PL2：14A Icc TDC PL2：19A
Icc Max：32A Icc Max：40A
Location Value Location Value
PL8 CV+24P0MZ00 PR85 CS35622FB10
OCP：37A OCP：47A PR71 CS21822FB14 PR101 CS22372FB11
A
Fsw：1.2MHz Fsw：800KHz PR82 CS41502FB18 PR102 CS31002FB26
A
：
VCORE L/L：：
VCORE L/L： PR70 CS22672FB12 PR200 CS42942FB13
R_DC_LL：- 2.0mV/A R_DC_LL：- 2.0mV/A PC142 CH4152K9B02 PL9 0.24uH_7X7X4

、PR93 *22.6K/F_4
PR84、
、PR95 *0_4
PR92、
R_AC_LL：- 7.0mV/A R_AC_LL：- 7.0mV/A
Block 1. Stuff 、PC145 *0.1u/25V_4
PC143、 https://t.me/schematicslaptop
PROJECT : ZRT/ZRTA
+VCCIN(TPS51624)
2A

5 4 3 2 1
1 2 3 4 5
+3VPCU
1 2
+1.5V
1.5Volt +/- 5%
+1.5V
39
+3V
TDC : 0.64A
1
JP11 PC110 PC109
JP10
*short_3720 10u/6.3V_6 0.1u/25V_6
PU7 TPS54318RTER PEAK : 0.85A *short_3720
PR181 16
VIN PH
10 Width : 40mil
A
100K/F_4 A
1 11 PL5
VIN PH
2
1uH_7X7X3
2 12
VIN PH
[31] HWPG_1.5V
MAINON
14
15
PWRGD BOOT
13
6
PR180 *Short_6
PC102
EN VSNS
PR49
*short_4
7
COMP GND
3
0.1u/50V_6 R1 PR183
100K/F_4
PC111 PC107 PC105
8 4 0.1u/10V_4 10u/6.3V_6 10u/6.3V_6
RT/CLK GND 1.5V_VSNS
PAD
PAD
PAD
PAD
PAD
PAD
PC103 9 5
1000p/50V_4 PR50 PR182 SS AGND
8.06K/F_4 121K/F_4 VFB=0.8V R2 PR184
22
21
20
19
18
17
113K/F_4
PC115 PC26 PC114

*100p/50V_4 1500p/50V_4 0.01U/25V_4
V0=0.8*(R1+R2)/R2
B B
VIN
Thermal protection
PD7
DA2J10100L
Need fine tune
for thermal protect point VIN +3V +5V +1.05V +15V
Note placement position
TEMP=85C
PR167 PR142 PR18 PR129 PR25 PR141
1M_6 1M_4 22_8 220_8 22_8 1M_4
1
PQ41
AO3409 MAINON_ON_G MAIND
2 MAIND [33,34]
3
3
3
PR144
2 PQ31 1M_4 2 2 2 2
[31,35] MAINON
3
S5_ON 2 DTC144EU PC76

[31,33,34] S5_ON
PQ5 PQ23 PQ11 PQ28 *2200p/50V_4
2N7002K 2N7002K 2N7002K 2N7002K
1
PQ39 PR170 PR143
1
1
DTC144EU *Short_6 *100K/F_6
C C
VL VL
SYS_SHDN# [10,33]
11/4 Change to 1.47K/F PR158 PC94 PR171

PR162 200K/F_4 0.1u/50V_6 200K_6
3
1.47K/F_4
8
PR185
10K/F_4_3435NTC 2.469V 3
+ 1 2
LM393_PIN2 2
- PQ42
3
PU6A 2N7002K
4
AS393MTR-E1 PC96
1
0.1u/50V_6
S5_ON 2
PR164
PQ7 200K/F_4
2N7002K
1
D 5
+ 7
https://t.me/biosarchive D
6
-
PU6B
AS393MTR-E1

For EC control thermal protection (output 3.3V) PROJECT :ZRT/ZRTA
2A
+1.5V/Thermal Protect
1 2 3 4 5
5 4 3 2 1
+5V_S5
40
JP12
PR44 *short_3720
*Short_6 +VIN_GPU_CORE
1 2 VIN
D D
EV@2200p/50V_4
EV@10u/25V_8
EV@10u/25V_8
100U/25V_6x4.5
1
PR42
18 1658R-PVCC
PR175 EV@10K/F_4 PR173 EV@20K/F_4 +
PC118
PC112
PC108
PC113
PC104
1
3V_MAIN_PWGD 1658R-VREF 1658R-BOOT1
PC22
2
EV@1U/10V_4
2
PC99 *0.01U/25V_4 PC20
5
PR176 1 2 [email protected]/25V_6
EV@100K/F_4 PU2
PR172 1 1658R-BOOT1
PVCC
+VIN_GPU_CORE 1658R-OCS/CB 9 BOOT1 1658R-UGATE1 4 PQ48
PR174 *1/F_4 OCS/CB 2 1658R-UGATE1 EV@AON6414AL
PR177 *0_4 *499K/F_4 UGATE1
[8] VGPU_EN
1
2
3
20 1658R-PHASE1 PL7
3V_MAIN_PWGD PR40 *short_4 1658R-EN 3 PHASE1 [email protected]_7X7X3
[18,39] 3V_MAIN_PWGD EN 19
DCR=1.1m ohm
1658R-LGATE1 1658R-PHASE1 +VGPU_CORE
LGATE1
DGPU_PSI PR39 *short_4 1658R-PSI 4
[19] DGPU_PSI PSI
5
EV@UP1658RQKF PR52
5 15 +
EV@330u/2V_7343
[19] PWM-VID PWM-VID PR36 *short_4 1658R-VID 1658R-BOOT2
VID BOOT2 1658R-LGATE1 4
EV@10u/6.3V_8
14 1658R-UGATE2
PC123
PC126
PC121
1 2 1658R-VREF 8 UGATE2
VREF
1
2
3
PC17 EV@1U/10V_4 16 1658R-PHASE2 PQ45 PC25
PHASE2 EV@AON6752 EV@1000p/50V_6
1658R-REFADJ 6 17 1658R-LGATE2 PR178 EV@10K_4
REFADJ LGATE2 1 2
+3V
C C
7
+3V_S5 +3VPCU R1 PR32 REFIN 13 1658R-PG PR41 *short_4
PR33 EV@20K/F_4 R2 PGOOD GPU_PWR_GD [17]
1658R-REFIN
*0.01U/25V_4
EV@20K/F_4 12 1658R-COMP
PC18
COMP
EV@4700P/25V_4
GND
PR35 PR34 10
FB
FBRTN
1
+VIN_GPU_CORE
PC19
*10K_4 *10K_4
1
PR43
11
21
DGPU_PSI PR28 [email protected]/F_6
C
EV@22P/50V_4
R3
2
1658R-FBRTN
PC14 EV@2K/F_4 1658R-BOOT2
2
1
EV@2700P/50V_4
PC100
EV@2200p/50V_4
EV@10u/25V_8
EV@10u/25V_8
EV@16K/F_6
1658R-FB
PR37
PR38 PC21
PC117
PC119
PC106
PC116
2
5
*0_4 [email protected]/25V_6
1658R-UGATE2 4
PR27
[email protected]/F_4 R4
1
2
3
Phase Number of Operation *22P/50V_4 PQ47 PL6
1
EV@AON6414AL [email protected]_7X7X3 DCR=1.1m ohm
*short_4
*short_4
PR29 1658R-PHASE2
PC16
PR31
PR30
+VGPU_CORE
*5.1K/F_4
2
5
PR26 PR51
PWM-SVID : Config B R5 + +
EV@330u/2.5V_6X4.2
EV@0_4 [email protected]/F_6
EV@330u/2V_7343
Check PWM-SVID by SKU
3
1658R-LGATE2 4
EV@10u/6.3V_8
PC124
PC125
PC120
PC122
B B
1
2
3
2 PQ46 PC24
PQ12 EV@AON6752 EV@1000p/50V_6
*2N7002K
1
Standby PC15
Function
1
*1U/10V_4
2
+VGPU_CORE
PR53 N16S-GT(23W)
*short_4
PR54 *short_4 +VGPU_CORE

[16] VGA_VCCSENSE Countinue current:26A
Peak current:51A
[16] VGA_VSSSENSE
PR55 *short_4 https://t.me/schematicslaptop OCP:A
PR56
*short_4 https://t.me/biosarchive FSW:300KHz
L/L=0mV/A
A
Parallel A

PROJECT : ZRT/ZRTA
2A
+VGPU_CORE(UP1642PQAG)
5 4 3 2 1
5 4 3 2 1
[16,17,18] +1.05V_GFX
[17,20,21,27] +1.5V_GFX
[16,18,19,31] +3V_GFX 41
D D
VIN +1.05V_GFX +15V +1.05V_S5
5
PR75 PR189 PR65
EV@1M_4 EV@22_8 EV@1M_4
dGPU_D1 4 PQ52
EV@MDV1528Q
3
3
PR192
+1.05V_GFX
3
2
1
*short_4 PR72
[18,38] 3V_MAIN_PWGD
2 EV@1M_4 2 2
PC34 +1.05V_GFX TDC : 1.57A
PEAK : 2.1A
1
PQ51 PQ17 *2.2n/50V_4
PQ16 EV@2N7002K EV@2N7002K
Width : 80mil
1
PC128 PR193 EV@PDTC143TT
1
*1u/10V_4 EV@100K_4
2
VIN +3V_GFX +15V +3VPCU
C PR45 PR57 PR179 C
3
EV@1M_4 EV@22_8 EV@1M_4
dGPU_D 2
3
3
PR47 PQ14
*short_4 PR46 EV@AO3404 +3V_GFX
1
+3V_GFX
[10] DGPU_PWR_EN
2 EV@1M_4 2 2
PC101
TDC : 0.05A
PEAK : 0.06A
1
PQ15 PQ44 *2.2n/50V_4

PQ13 EV@2N7002K EV@2N7002K
Width : 20mil
1
PC23 PR48 EV@PDTC143TT
1
*1u/10V_4 EV@100K_4
2
VIN
+5V_S5
+3V
PC35 PC39 PC45

B EV@2200p/50V_6 EV@10u/25V_8 B
EV@1u/10V_4
5
PR61
EV@100K/F_4
7
PQ53
V5IN
1.5GFX_DRVH 4 EV@AON7410
HWPG_1.5VGFX 1 9 PR76 PC36 +1.5V_GFX
[18] HWPG_1.5VGFX PGOOD DRVH *Short_6 [email protected]/50V_6
1.5GFX_EN 3 10 1.5GFX_VBST PL10
3
2
1
[17] FBVDDQ_EN EN VBST
PR59 *short_4 [email protected]_7X7X3
1.5GFX_TRIP 2 PU3 8 1.5GFX_SW
PR64 [email protected]/F_4 TRIP EV@TPS51211DSCR
SW
1.5GFX_TST 5 6 1.5GFX_DRVL
PC27 PR63 EV@470K/F_4 TST DRVL
5
*1u/10V_4 12 11
GND GND PR77 PR60 +1.5V_GFX
GND
GND
GND
GND
*4.7_6 [email protected]/F_4 1.5 Volt +/- 5%

FB
+
4 TDC : 3.06A
13
14
15
16
OCP=8A 1.5GFX_FB
PC136
PC150
EV@330u/2V_7343
PEAK : 4.08A
L ripple current PQ54 PC40 OCP : 5A
3
2
1
EV@AON7752 *680p/50V_6 PR62

=(19-1.5)*1.5/(2.2u*290k*19) EV@10K/F_4 Width : 140mil
=2.165A
Vtrip=8-(2.165/2)*14.5mohm
=100.3mV
Rlimit=100.3mV/10uA*8=80.2Kohm
VFB=0.704V
A A
https://t.me/biosarchive PROJECT : ZRT/ZRTA
2A
+1.5V_GFX/+1.05V_GFX/+3V_GFX
5 4 3 2 1
1 2 3 4 5 6 7 8
VGA power up sequence

39
VGA_VID
+3VPCU
PCH MOSFET +3V_GFX VIN

+VGPU_CORE
A dGPU_PWR_EN A
VIN +1.35V_GFX
3V_MAIN_PWGD PWM
PWM
GPU_PWR_GD
OR FBVDDQ_EN
Gate HWPG_1.5VGFX DGPU_PWROK
+3V_GFX
MOSFET
EC_FB_CLAMP
+3V_MAIN EC
GPU 3V_MAIN_EN
MOSFET
3V_MAIN_PWGD
+1.05V_S5
MOSFET +1.05V_GFX
3V_MAIN_PWGD
B B
VGA Reset Power States

Thermal Follow Chart
CONTROL
POWER PLANE VOLTAGE DESCRIPTION SIGNAL ACTIVE IN
PLTRST# VIN +10V~+19V MAIN POWER ALWAYS ALWAYS

PEGX_RST#
PCH DGPU_HOLD_RST#
+3V_RTC +3V~+3.3V RTC POWER ALWAYS ALWAYS
+3VPCU +3.3V EC POWER ALWAYS ALWAYS
PEX_RST timing +5VPCU +5V USB CHARGE POWER ALWAYS ALWAYS
+15V +15V CHARGE PUMP POWER ALWAYS ALWAYS

CPU H_PROCHOT# PM_THRMTRIP# SYS_SHDN# 3V/5 V
I/O 3.3V +3V_S5 +3.3V LAN/BT POWER S5_ON S0-S5 CORE PWR H/W Throttling WIRE-AND SYS PWR
PEX_RST +5V_S5 +5V USB POWER S5_ON S0-S5
HSW ULT
+5V +5V HDD/SPK/HDMI POWER MAINON S0
Trise >= 1uS Tfail <=500nS
+3V +3.3V PCH/GPU/Peripheral component POWER MAINON S0
+1.35VSUS +1.35V CPU/SODIMM/MD POWER SUSON S0-S3

C C
+DDR_VTT_RUN +0.675V SODIMM/MD Termination POWER MAINON S0

SM-Bus1
LCDVCC +3.3V LCD POWER LVDS_VDDEN S0
+1.5V +1.5V MINI CARD/NEW CARD POWER MAINON S0
+1.05V +1.05V PCH CORE VCCST POWER MAINON S0

FAN_PWM CPU FAN
+VCCIN variation CPU CORE POWER VRON S0 EC
+3V_GFX variation External GPU POWER DGPU_PWR_EN S0
+1.05V_GFX +3.3V External GPU POWER 3V_MAIN_EN S0
dGPU_OPP#
dGPU_OTP#
dGPU_ALT#
SM-Bus1
+VGPU_CORE +1.35V External GPU POWER 3V_MAIN_EN S0
+1.35V_GFX +1.05V External GPU POWER FBVDDQ_EN S0

GPIO12 HW throttle
over power protect
GPIO12_ACIN
dGPU
D
https://t.me/schematicslaptop D
https://t.me/biosarchive dGPU_OPP# EC notify HW throttle over power protect

dGPU_OTP# VGA thrmtrip# => inform EC over temperature protect

PROJECT : ZRT/ZRTA
3A
PWR Status & GPU PWR CRL & THRM
1 2 3 4 5 6 7 8
5 4 3 2 1
Battery Mode 3
+3VPCU
VIN 1
+5VPCU
VL
3 3
+3VPCU
5b
+3.3V_DSW
1
VIN BAT-V
40
3V_LDO 3V/5V 2
+5VPCU +5V_S5 11 2 VR depend on A measure +3.3V_DSW
3 +15V
result to implement EN CHARGER Battery
EN2
EN1
D
+3VPCU S5 PWR +3V_S5 10 4 for B test D
3
3
S5_ON 8 NBSWON# 5a DSW_ON +3VPCU or +3.3V_DSW
1 VIN +3VCC_S5
Delay DSW power well 10ms
PWR 6 DPWROK DPWROK
DSW PWR
SUS PWR
+1.35V_SUS 18 BTN 13 RSMRST# +1.05V
DDR VDDQ RSMRST#
VR 7 14 SB_ACDC ASW PWR
DDR_VTTREF 19 EC ACPRESENT +3V_S5
30 DNBSWON#
15 PWRBTN#
HWPG SUSC# 16 SPI PWR
+DDR_VTT_RUN 23 SLP_S4# +V1.05DX_MODPHY
SUSB# 20 SLP_S3#
HSIO PWR
PCH_SUSACK# SUSACK +1.05V
HWPG_VDDR 24
PG PCH_SUSPWARN# SUSWRAN
PLL PWR
S5
S3
PCH_SLP_SUS# SLP_SUS# +1.05V

PCH
DDR_PG_CTRL APWROK CORE PWR
C 22 +3V C
31 EC_PWROK PCH_PWROK
MAINON
21 PCH_CLK SDIO PWR
35 +3V_S5
VRON
SUSON
S5_ON
MAINON
EC_PWROK
HWPG_1.05V_EC#
+0.75V_ON PLTRST#
+0.75V_ON
? PLTRST#
38 SYS_PWROK HDA PWR
SUSON SYS_PWROK
17 34 IMVP_PWRGD
+3VPCU 24 HWPG_VDDR
3 36
26 HWPG_1.05V 31 EC_PWROK 38
+1.5V 12 30a 31 32b 21 17 8
1.5V
PLTRST#
HWPG_1.5V
VR 29 29
HWPG_1.5V ?
PG
EN
+VCCIN
MAINON CORE PWR

21 +1.35V_SUS
RESET#
CPU
VDDQ PWR
+1.05V_VCCST
RUN PWR +1.05V
+1.05V_VCCST PROCPWRGD
B
3 +5VPCU +5V 28 VCCST PWR B
MOS1
SM_PG_CNTL1
VCCST_PWRGD
0 ohm
3 +3VPCU +3V 27
VR_READY
MOS2
VR_EN
10K ohm
SVID
+1.05V_S5 +1.05V
9 25
MOS3
G
HWPG_1.05V
1 VIN 12
MAINON
VRON_CPU
DDR_PG_CTRL
21
IMVP_PWRGD
VCCST_PWRGD_EN
33
SVID
+VCCIN EC_PWROK VCCST_PWRGD_EN
IMVP 31
VIN
1 9 VR
SYS_PWROK
+1.05V_S5 36
+1.05V_S5
VR 34
12 IMVP_PWRGD HWPG_1.05V_EC# 37 22 34 32a
HWPG_1.05V PG 30a
EN
PG
EN
A A
8 SVID VRON_CPU 32a HWPG+1ms

S5_ON
37 VRON 32b
PCH MAINON 21
CPU Quanta Computer Inc.
PROJECT : ZRT/ZRTA
3A
Power Sequence
5 4 3 2 1
1 2 3 4 5 6 7 8
+3V_S5 +3V 41
SDRAM
2.2K 2.2K 4.7K 4.7K
+3.3V_RUN
AP2 SMB_PCH_CLK CLK_SCLK
2N7002DW
A AH1 SMB_PCH_DAT Level shift CLK_SDATA WLAN A
XDP
Brodwell
ULT
+3V_S5
2.2K 2.2K
AN1 SMB_ME0_CLK https://t.me/schematicslaptop https://t.me/schematicslap
B
AK1 SMB_ME0_DAT https://t.me/biosarchive https://t.me/biosarchive B
+3V_S5
*2.2K *2.2K
+3V_S5
AU3 SMB_ME1_CLK
*2N7002DW
AH3 SMB_ME1_DAT Level shift
+3V_S5 3V3MISC
4.7K 4.7K 4.7K 4.7K
C C
+3V_GFX
116 2ND_MBDATA
2N7002DW
115 2ND_MBCLK Level shift dGPU
+3VPCU
100
10K 10K Battery

100
110 MBCLK
111 MBDATA Charger
+G_SEN_PW
SIO
ITE8987
D *4.7K *4.7K D
94 G_MBCLK
95 G_MBDATA *Accelerometer Sensor

PROJECT : ZRT/ZRTA
3A
Block Diagram
1 2 3 4 5 6 7 8
5 4 3 2 1
實實實defult
虛實實reserve
SYS_HWPG S5D
MDV1528Q
+5V_S5 45
2 VGPU_PWRGD
7
3V_LDO PWRGD
+5VPCU MDV1528Q
1 PWR EN! +5V PWRGD
D S5_Vout D
3V/5V MAIND VIN Vin VGPU Core Vout

+VGPU_CORE
uP1642
TPS51225 4
3V_LDO EN
1 EN2 3V_MAIN_PWGD
Vin S3_Vout 6
+3VPCU AO3404 +3V_S5
VIN
S5D
2
HWPG_1.5VGFX
AO3404 +3V 9
MAIND PWRGD
4
VIN Vin
+1.35V_GFX Vout
TPS51211 +1.35V_GFX
EC_FB_CLAMP EN
C
AO3404 +3V_GFX EC OR Gate FBVDDQ_EN
C
GPU_PWR_GD
dGPU_PWR_EN 8
PCH
HWPG_1.05V
AO3430 +1.05V
PWRGD
VIN +1.05V_S5 MAIND

Vin Vout +1.05V_S5
TPS51211 4
IMVP_PWRGD
EN
S5_ON MDV1528Q +1.05V_GFX
2 EC PWRGD
B VIN Vin CPU VCCIN Vout +VCCIN B

MAINON 3V_MAIN_PWGD AND Gate dGPU_D1 TPS51622
4 EC 6 EN
VRON_CPU
5
VRON
HWPG_VDDR
HWPG_1.5V
SUSON PWRGD
3 EC S5 EN +1.35V_SUS
S5_Vout
PWRGD
+1.35V_SUS DDR_VTTREF
TPS51216
+3VPCU Vin +1.5V Vout
DDR_VTTT_PG_CTRL TPS54318
+1.5V
PCH S3 EN
S3_Vout
EN
Vin +DDR_VTT_RUN
MAINON MAINON
A 4 4 A
+0.75V_ON
EC
VIN https://t.me/schematicslaptop PROJECT : ZRT/ZRTA
https://t.me/biosarchive Date:
ULT PWR CONTROL
Wednesday, February 11, 2015 Sheet 43 of 44
3A
5 4 3 2 1
5 4 3 2 1
Model Version CHANGE LIST

ZQ0 1A-1 1 2013/10/15 change pin define and add pwm IC.(page31)
2 2013/10/15 Change VGA ITE solution to NXP.(page 23)
3 2013/10/15 power board CN change to 6pin.(Page 23)
4 2013/10/15 U5017.12 change 27M crystal to VGA IC.(Page 23)
5 2013/10/15 U5017.14 add power rail +3V_RTC(page23)
6 2013/10/15 strap0 R672 DG 50k PU.(Page 19)
7 2013/10/15 Change AND gat to Q63 D-MOS.(Page 19)
8 2013/10/15 change pin define and add pwm IC U17.(Page 46) https://t.me/schematicslaptop
9 2013/10/15 for GC6 stuff R228\R1013\R226\R1012.un-stuff Q24\Q26\R227\R1011. (Page19)
D
10 20131015 For GC6 NV DG GC6_FB_EN PD.(Page10) D
11 2013/10/15 following up acer define and swap USB3 and USB2 port.(Page9)
12 2013/10/15 swap CAP C8579/C8580 to Vrefo and resistor R5214/R5215 to Line in.(Page30)
13 2013/10/15 U27.30/U27.31 del fan Pwm signal.(Page32)
14 20131015 change LVDS\USB3\RJ45\FAN\TPD\USB DB CN\DC-IN CN\Power Button\Cardreader\KB BLK CN\Power board, footprint.
1 2013/10/16 JDIM5 Swap M_B_DQS2/M_B_DQS3 and swap M_B_DQS#2/M_B_DQS#3.(page15)

1A-2
2 2013/10/16 JDIM6 Chage net name M_B_DQS#[7:0] to M_A_DQS#[7:0].(page14)
3 2013/10/16 Add RTC charge circuit.(page8)
4 2013/10/16 BT1.1 Chage +3V_RTC_0 to VCCTC_2.(page8)
5 2013/10/15 change power rail from +3V_RTC_0 to VCCRTC_2.(page23)
C C
B B
A A
DOC NO.
PROJECT MODEL Quanta Computer Inc.
ZQ0 APPROVED BY: DATE:
: PROJECT : ZRT/ZRTA
3A
PART NUMBER: DRAWING BY: REVISON: Change list-1
5 4 3 2 1

Acer Aspire E5-573G V3-574G Quanta ZRT ZRTA DA0ZRTMB6D0

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5 4 3 2 1

ZRT/ZRTA_GDDR3 BWD ULT SYSTEM BLOCK DIAGRAM

DDR3L-SODIMM CHB IMC

USB2 IO*1 I/O Board Conn. CLK

Universal HP Speaker*2 Touch PAD Fan Driver TPS51211DSCR PS51211DSCR

Haswell ULT (DISPLAY,eDP)

[24] INT_HDMITX1N DDI1_TXN1 EDP_TXN1 EDP_TXN1 [23]

C53 DDI2_TXP0 EDP_AUXN B45 EDP_AUXP

Quanta Computer Inc.

Change Data and DQS to interleave.

Haswell ULT (DDR3L) Haswell Processor (DDR3)

[14] M_A_DQ0 M_A_DQ0 AH63 AU37 M_A_CLK0# [14]

Quanta Computer Inc.

DRAM COMP XDP PU/PD DDR3L ODT GENERATION +1.35V_SUS

PU/PD of CPU DRAMRST

H_PROCHOT# R663 *62_4

CPU_DRAMRST# R552 *short_4

H_PWRGOOD_R R682 10K_4 C488

Size Document Number Rev

VDDQ Output Decoupling Recommendations

D Haswell ULT (POWER) VCCST_PWRGD R503 *short_4VCCST_PWRGD_R 4

C72 *MMBT3904-7-F C73 Q7

*1000p/50V_4 *1000p/50V_4 *DTC144EU

Haswell ULT (CFG,RSVD)

D CFG0 AC60 AV63 D

CFG3 DISABLED ENABLED CFG3 R610 *1K_4

CFG 8 DISABLED(DEFAULT); IN THIS CASE, NOA ENABLED; NOA WILL BE AVAILABLE

CFG9 NO VR SUPPORTING SVID IS PRESENT. THE

Date: Wednesday, February 11, 2015 Sheet 6 of 44

Haswell ULT PCH (PM)

https://t.me/schematicslaptop EC_PWROK R284 *0_4 SYS_PWROK_R

PCH PM PU/PD PLTRST# Buffer Deep Sx Circuit Non Deep Sx

SYS_RESET# R612 10K_4

DPWROK_R R553 100K/F_4 TC7SH08FU R227

PCH_BATLOW# R255 8.2K_4

R293 *10K_4 TC7SH08FU R297

RTC Clock 32.768KHz (RTC)

BT1 SRTC_RST# AY10 AUDIO SATA C15 Y4 AD2 CL_DAT

C185 C186 AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17 PCH_SPI_IO2 Y6 SPI_MISO

1A-22013/10/16 Chage +3V_RTC_0 to VCCTC_2. +3V SATA0GP/GPIO34

0 = Enable an external display [31] PCH_SPI_SO_EC PCH_SPI_SO_EC R649 15_4

Date: Wednesday, February 11, 2015 Sheet 8 of 44

[16] PEG_RX#0 F10 DSW AN8 USBP0- [30]

[16] PEG_RX#1 F8 DSW AR8

VGA WLAN LAN

USB3RP1 USB3_RXP0 [30] [16] CLK_PCIE_VGA CLKOUT_PCIE_P4

[28] PCIE_RX4-_WLAN PERN4 CLKOUT_PCIE_P5

Quanta Computer Inc.

Haswell ULT PCH (GPIO,CPU/MISC,NCTF)

GPU power is control by PCH

Date: Wednesday, February 11, 2015 Sheet 10 of 44

Haswell ULT PCH (Power) +3VCC_S5

+V1.05S_VCCUSBCORE R291 *short_8 +1.05V

1A-1 2013/10/11 del LDO change to MOS.

+1.05V +V1.05S_APLLOPI L20 2.2uH/210mA_8

C303 C293 C282

PCH HDA Power L19 2.2uH/210mA_8

Haswell ULT (GND)

HSW_ULT_DDR3L HSW_ULT_DDR3L HSW_ULT_DDR3L HSW_ULT_DDR3L

DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3

1000p/50V_4 1000p/50V_4 *DTC144EU

0.1U/10V_4 0.1U/10V_4 4.7U/6.3V_6 4.7U/6.3V_6