This paper summarizes an algorithm and the implementation of a Switch-LeVEL TEst generation system (SVELTE) for synchronous sequential circuits. Features of the ...

Abstract: Switch level test generation (SLTG) is potentially more powerful than conventional gate level test generation (GLTG) or CMOS circuits.

This paper presents a switch-level test generation system for synchronous sequential circuits in which a new algorithm for switch-level test generation and ...

For test generation, a switch-level circuit is modeled as a logic network that correctly models the behavior of the switch-level including bidirectionality, ...

For test generation, a switch-level circuit is modeled as a logic network that correctly models the behavior of the switch-level including bidirectionality, ...

The authors present a switch level test generation system called SWiTEST. SWiTEST deals with bridging, breaking, stuck-open/on and stuck-at-faults.

The test generator presented is the only known sequential switch-level test generator that is both fully automatic and provides an interface to an existing ...

Dec 16, 1993 · For test generation, a switch-level circuit is modeled as a logic network that correctly models the behavior of the switch-level including ...

For test generation, a switch-level circuit is modeled as a logic network that correctly models the behavior of the switch-level including bidirectionality, ...

SWiTEST: a switch level test generation system for CMOS combinational circuits.