This is the first detailed design of a high-performance asynchronous IEEE-754 compliant double-precision floating-point multiplier.
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A floating-point multiplier consumes significantly more energy compared to a floating-point adder (FPA) [21,24]. This combined with the knowledge that the ...
“Energy-efficient pipeline templates for high-performance asynchronous circuits.” ACM JETC, special issue on asynchrony in system design, 7(4), December 2011.
We present the details of our energy-efficient asynchronous floating-point multiplier (FPM). We discuss design trade-offs of various multiplier implementations.
Aug 27, 2015 · Floating point multiplier is a key element in most digital applications such as filters, processors, embedded systems and control units.
When compared against a custom synchronous FPM design, our asynchronous FPM consumes 3X less energy per operation while operating at 2.3X higher throughput. To ...
We present the details of our energy-efficient asynchronous floating-point multiplier (FPM). We discuss design trade-offs of various multiplier ...
Aug 18, 2019 · This article explains an asynchronous hardware architecture for floating point multiply-accumulate circuit (MAC) that is exploited in many ...
Abstract— A fast and energy efficient floating point unit is always needed in major applications like digital signal processing, image processing, and real ...
Feb 2, 2022 · A floating point unit does addition, subtraction, multiplication, and division operations on floating point numbers. In many implementations the ...