A high-performance inference accelerator on FPGA for MobileNet is proposed in this paper. With respect to the three types of convolution operations, multiple ...
An FPGA-based MobileNet Accelerator Considering Network ...
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A high-performance inference accelerator on FPGA for MobileNet is proposed in this paper and a dedicated architecture is proposed to reduce data ...
FPGA accelerators can follow GPU-like [32, 34] architecture, which maps computation to compute cores with repetitive use. While beneficial, this approach ...
Firstly, this paper proposes a dedicated hardware architecture for the bottleneck block of MobileNet, which can make full use of on-chip storage resources and ...
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Feb 22, 2024 · An FPGA-based inference accelerator is proposed for the efficient deployment of CNNs with arbitrary kernel sizes.
Duration: 14:18
Posted: Aug 15, 2021
Posted: Aug 15, 2021
An FPGA-based MobileNet Accelerator Considering Network Structure Characteristics. DOI PDF 被引用文献1件. Shun Yan · Zhengyan Liu · Yun Wang · Chenglong Zeng.
This article proposes an efficient inference accelerator on Field Programmable Gate Array (FPGA) for CNNs with depthwise separable convolutions.
Dec 24, 2022 · In Section 3.2, we introduce MobileNet and MobileNetV2 as examples of efficient networks that are based on DSC. Their specific structures and ...
2022. TLDR. The proposed convolution neural network acceleration architecture based on FPGA has the characteristics of low power consumption and low delay ...
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