The LVTSCR has the advantage of low trigger voltage and strong robustness, but the holding voltage is 2–3 V. Low holding voltage will be very prone to latch ...

Jul 24, 2024 · The test results show that the triggering voltage of LVTSCRTSCR is determined by the traditional LVTSCR, with a value of 9.850 V. The holding ...

Design of a LVTSCR triggered SCR device for low voltage ESD protection · Wei Liu, Hongjiao Yang, +3 authors. Zhiwen Zeng · Published in Microelectronics Journal 1 ...

Jul 3, 2024 · Three kinds of low voltage triggered SCR-based ESD protection circuits are proposed and verified in this paper. All the devices are fabricated ...

The proposed NLVTSCR in the TLP test has a low trigger voltage and an adjustable high holding voltage from 3.44 V to 4.93 V. In addition, it does not require ...

Design of a LVTSCR triggered SCR device for low voltage ESD protection ... Authors: Wei Liu; Hongjiao Yang; Yang Wang; Shuang Li; Hongke Tao; Zhiwen Zeng. List of ...

By integrating a GGNMOS in the SCR, a low-voltage-triggered SCR (LVTSCR) with reduced Vt1 can be obtained, while its small Vh may lead to the logic disorder or ...

Silicon Controlled Rectifiers (SCRs) in low voltage triggered configurations (LVTSCR) are the popular protection elements that are used for on-chip ESD.

In this paper, the ESD protection circuit design integrated into the Low Drop Out (LDO) regulator presents an alternative to the reliability of the internal IC.

Compared with the conventional LVTSCR, the parasitic capacitance of the new device reduces 58%. It also has tunable trigger voltage (2.0V∼6.5V), low leakage ...