The MONTIUM is a prototype of a novel coarsegrain reconfigurable processor. The SoC template offers a balance between flexibility, efficiency and performance.

Energy-Efficiency of the MONTIUM Reconfigurable Tile Processor. Conference Paper. Full-text available. Jan 2004.

Apr 25, 2024 · Energy-Efficiency of the MONTIUM Reconfigurable Tile Processor. ERSA 2004: 38-44. [c4]. view. electronic edition via DOI · unpaywalled version ...

Introduction. In the Chameleon project we developed a framework for a tiled heterogeneous SoC for energy-efficient wireless devices such as handheld devices ...

Abstract ± Architectures for mobile multimedia devices need to find a balance between energy-efficiency, flexibility and performance.

Paul M. Heysters, Gerard J. M. Smit, Egbert Molenkamp: Energy-Efficiency of the MONTIUM Reconfigurable Tile Processor. ERSA 2004: 38-44.

Introduction. In the Chameleon project we developed a framework for a tiled heterogeneous SoC for energy-efficient wireless devices such as handheld devices ...

In this paper a heterogeneous architecture of domain specific processing tiles is proposed. The focal point is the coarse-grained reconfigurable architecture of ...

An application is modeled as a series of communicating parallel processes to be applied for each element in a stream of data. ▫. Dynamically determine HW/SW.

This paper introduces the Hydra: a network interface for the MONTIUM TP, a coarse-grained reconfigurable processor designed for DSP algorithms. We show that the ...