Post layout simulations revealed that the optimal sparse carry tree adders provide up to 50% and 22% improvement in energy at same performance over full carry ...
Jun 22, 2015 · Post layout simulations revealed that the optimal sparse carry tree adders provide up to 50% and 22% improvement in energy at same performance ...
... A method for minimizing power consumption by obtaining the optimal structure of the parallel Kogge-Stone and Ladner-Fischer adder for 32-, 64-, 128, and 256 ...
Minimizing energy by achieving optimal sparseness in parallel adders. M Aktan, D Baran, VG Oklobdzija. 2015 IEEE 22nd Symposium on Computer Arithmetic, 10-17, ...
Carry tree sparseness is used in high-performance binary adders to achieve better energy-delay trade-off. To determine the energy optimal degree of ...
Apr 25, 2024 · A 70-to-2 V Triboelectric Energy Harvesting System Utilizing Parallel ... Minimizing Energy by Achieving Optimal Sparseness in Parallel Adders.
Mustafa Aktan's 10 research works with 157 citations, including: Minimizing Energy by Achieving Optimal Sparseness in Parallel Adders.
The proposed compressors provide up to 20% energy reduction depending on the target delay at 65nm CMOS technology.
Our goal is to reduce overall energy consumption by scaling the volt- ages/frequencies of those processors that are not in the critical path; i.e., our approach ...
A General Design Framework for Sparse Parallel Prefix Adders
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A framework to design a plethora of sparse PPA designs is proposed, providing significant boost in the PPA design trade-off space.