Abstract: The function of a circuit under test (CUT) is represented as a transformation on the probability density function of its input excitation, ...
Test and Diagnosis of Analog Circuits using. Moment Generating Functions. Suraj Sindia. ∗. , Vishwani D. Agrawal. †. Department of Electrical and Computer ...
Nov 23, 2011 · Wish list for an analog circuit test signature. Suitable for large class of circuits. Detects sufficiently small parametric faults – high ...
With the proposed scheme, we are able to detect all catastrophic faults and single parametric faults that are off from their nominal value by just over 10%.
Suraj Sindia, Vishwani D. Agrawal, Virendra Singh: Test and Diagnosis of Analog Circuits Using Moment Generating Functions. Asian Test Symposium 2011: 371- ...
With the proposed scheme, we are able to detect all catastrophic faults and single parametric faults that are off from their nominal value by just over 10%.
ABSTRACT: This paper focuses on the production testing of Memristor Ratioed Logic (MRL) gates. MRL is afamily that uses memristors along with CMOS inverters to ...
Method reported in this paper paves way for future research in circuit diagnosis, leveraging moments of the output to diagnose parametric faults in analog ...
Method reported in this paper paves way forfuture research in circuit diagnosis, leveraging moments of theoutput to diagnose parametric faults in analog ...
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Test and diagnosis of analog circuits using moment generating functions. S Sindia, VD Agrawal, V Singh. 2011 Asian Test Symposium, 371-376, 2011. 18, 2011.