During low voltage operation, they sacrifice cache capacity by 50% and 25%, respectively, to reduce Vccmin below 500mV. Compared to current designs with a ...

Both mechanisms trade off cache capacity at low voltages, where performance (and cache capacity) might be less important, to gain the improved reliability ...

In this paper, we propose two architectural techniques that enable microprocessor caches (L1 and L2), to operate at low voltages despite very high memory cell ...

Two proposed techniques let microprocessors operate at low voltages despite high memory-cell failure rates. They identify and disable defective portions of the ...

Two architectural techniques are proposed that enable microprocessor caches (L1 and L2), to operate at low voltages despite very high memory cell failure ...

Oct 22, 2024 · Our results also show that a system with a Parichute-protected L2 cache can achieve a 34% reduction in system energy (processor and DRAM) ...

•Use whole cache at high Vcc. •¼ of cache lines store repair info for other lines when operating at low voltage. –Identify failing bits with a boot time ...

Trading off Cache Capacity for Reliability to Enable Low Voltage Operation · 10 · 20 · 50 · 100.

In this paper, we propose a novel adaptive technique to improve cache lifetime reliability and enable low voltage operation. This technique, multi-bit segmented ...

Reducing the Cache capacity to allow for low voltage operation [17] by disabling ... Trading off cache capacity for reliability to enable low voltage operation.