The authors define a general framework for the parallel simulation of digital systems and develop and evaluate tools for logic and fault simulation that ...
The aims of our work are: 1) to define a general framework for the parallel simulation of digital systems; and 2) to develop and evaluate tools for logic and ...
Jan 1, 1993 · Abstract. With the advances in very large scale integration (VLSI) technology there is an increased need for simulation tools that are able ...
The authors define a general framework for the parallel simulation of digital systems and develop and evaluate tools for logic and fault simulation that ...
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What is parallel fault simulation?
What is logic simulation in VLSI?
Fast, efficient logic simulators are an essential tool in modern VLSI system design. Logic simulation is used extensively for design verification prior to ...
In the following, we report the results of two application studies. We first address parallel gate-level logic and fault simulation and then investigate ...
VLSI logic and fault simulation on general-purpose parallel computers. IEEE Trans. Computer-Aided Design of Integrated Circuits and Sys- tems, 12(3):446–460 ...
The aim of the paper is to construct analytical estimations of the working time for parallel fault simulation methods of digital devices for logic level ...
Logic and fault simulation are crucial steps in the design process for verifying the correctness of a circuit and generating high quality manufacturing tests.
Parallel Fault Simulation · Most effective when: · Circuit consists of only logic gates. · Stuck-at faults are modeled. · Signals assume only binary, 0 or 1, values ...