CMP network-on-chip overlaid with multi-band RF-interconnect MF Chang, J Cong, A Kaplan, M Naik, G Reinman, E Socher, SW Tam 2008 IEEE 14th International Symposium on High Performance Computer …, 2008 | 366 | 2008 |
Selective value prediction B Calder, G Reinman, DM Tullsen Proceedings of the 26th annual international symposium on computer …, 1999 | 329 | 1999 |
A scalable micro wireless interconnect structure for CMPs SB Lee, SW Tam, I Pefkianakis, S Lu, MF Chang, C Guo, G Reinman, ... Proceedings of the 15th annual international conference on Mobile computing …, 2009 | 270 | 2009 |
A quantitative analysis on microarchitectures of modern CPU-FPGA platforms Y Choi, J Cong, Z Fang, Y Hao, G Reinman, P Wei Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 191 | 2016 |
Fetch directed instruction prefetching G Reinman, B Calder, T Austin MICRO-32. Proceedings of the 32nd Annual ACM/IEEE International Symposium on …, 1999 | 186 | 1999 |
CACTI 2.0: An integrated cache timing and power model G Reinman, NP Jouppi Western Research Lab Research Report 7, 40, 2000 | 170 | 2000 |
Customizable domain-specific computing J Cong, V Sarkar, G Reinman, A Bui IEEE Design & Test of Computers 28 (2), 6-15, 2010 | 163 | 2010 |
A scalable front-end architecture for fast instruction delivery G Reinman, T Austin, B Calder ACM SIGARCH Computer Architecture News 27 (2), 234-245, 1999 | 161 | 1999 |
Architecture support for accelerator-rich CMPs J Cong, MA Ghodrat, M Gill, B Grigorian, G Reinman Proceedings of the 49th Annual Design Automation Conference, 843-849, 2012 | 136 | 2012 |
Steerbench: a benchmark suite for evaluating steering behaviors S Singh, M Kapadia, P Faloutsos, G Reinman Computer Animation and Virtual Worlds 20 (5‐6), 533-548, 2009 | 131 | 2009 |
Predictive techniques for aggressive load speculation G Reinman, B Calder Proceedings. 31st Annual ACM/IEEE International Symposium on …, 1998 | 130 | 1998 |
Charm: A composable heterogeneous accelerator-rich microprocessor J Cong, MA Ghodrat, M Gill, B Grigorian, G Reinman Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012 | 129 | 2012 |
Supporting address translation for accelerator-centric architectures Y Hao, Z Fang, G Reinman, J Cong 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 127 | 2017 |
Accelerator-rich architectures: Opportunities and progresses J Cong, MA Ghodrat, M Gill, B Grigorian, K Gururaj, G Reinman Proceedings of the 51st annual design automation conference, 1-6, 2014 | 126 | 2014 |
An integrated cache timing and power model G Reinman, N Jouppi Compaq WRL Report, 1999 | 107 | 1999 |
Dynamically reconfigurable hybrid cache: An energy-efficient last-level cache design YT Chen, J Cong, H Huang, B Liu, C Liu, M Potkonjak, G Reinman 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 45-50, 2012 | 105 | 2012 |
A modular framework for adaptive agent-based steering S Singh, M Kapadia, B Hewlett, G Reinman, P Faloutsos Symposium on interactive 3D graphics and games, 141-150 PAGE@ 9, 2011 | 99 | 2011 |
RF interconnects for communications on-chip MCF Chang, E Socher, SW Tam, J Cong, G Reinman Proceedings of the 2008 international symposium on Physical design, 78-83, 2008 | 99 | 2008 |
BRAINIAC: Bringing reliable accuracy into neurally-implemented approximate computing B Grigorian, N Farahpour, G Reinman 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 93 | 2015 |
Power reduction of CMP communication networks via RF-interconnects MCF Chang, J Cong, A Kaplan, C Liu, M Naik, J Premkumar, G Reinman, ... 2008 41st IEEE/ACM International Symposium on Microarchitecture, 376-387, 2008 | 91 | 2008 |