| Electromagnetic fault injection: towards a fault model on a 32-bit microcontroller N Moro, A Dehbaoui, K Heydemann, B Robisson, E Encrenaz 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 77-88, 2013 | 280 | 2013 |
| An inverse method for parametric timed automata É André, T Chatain, L Fribourg, E Encrenaz International Journal of Foundations of Computer Science 20 (05), 819-836, 2009 | 136 | 2009 |
| Formal verification of a software countermeasure against instruction skip attacks N Moro, K Heydemann, E Encrenaz, B Robisson Journal of Cryptographic Engineering 4, 145-156, 2014 | 135 | 2014 |
| Data decision diagrams for Petri net analysis JM Couvreur, E Encrenaz, E Paviot-Adet, D Poitrenaud, PA Wacrenier Application and Theory of Petri Nets 2002: 23rd International Conference …, 2002 | 113 | 2002 |
| Experimental evaluation of two software countermeasures against fault attacks N Moro, K Heydemann, A Dehbaoui, B Robisson, E Encrenaz 2014 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2014 | 42 | 2014 |
| Timed verification of the generic architecture of a memory circuit using parametric timed automata R Chevallier, E Encrenaz-Tiphene, L Fribourg, W Xu Formal Methods in System Design 34, 59-81, 2009 | 40 | 2009 |
| A tool for automatic detection of deadlock in wormhole networks on chip S Taktak, JL Desbarbieux, E Encrenaz ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (1 …, 2008 | 40 | 2008 |
| An inverse method for parametric timed automata É André, T Chatain, L Fribourg, E Encrenaz Electronic Notes in Theoretical Computer Science 223, 29-46, 2008 | 24 | 2008 |
| Efficient design and evaluation of countermeasures against fault attacks using formal verification L Goubet, K Heydemann, E Encrenaz, R De Keulenaer Smart Card Research and Advanced Applications: 14th International Conference …, 2016 | 21 | 2016 |
| Complementary formal approaches for dependability analysis S Baarir, C Braunstein, R Clavel, E Encrenaz, JM Ilié, R Leveugle, ... 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2009 | 21 | 2009 |
| Fault attack vulnerability assessment of binary code JB Bréjon, K Heydemann, E Encrenaz, Q Meunier, ST Vu Proceedings of the Sixth Workshop on Cryptography and Security in Computing …, 2019 | 20 | 2019 |
| Symbolic approach for side-channel resistance analysis of masked assembly codes IB El Ouahma, QL Meunier, K Heydemann, E Encrenaz Security Proofs for Embedded Systems, 2017 | 16 | 2017 |
| A polynomial algorithm to prove deadlock-freeness of wormhole networks S Taktak, E Encrenaz, JL Desbarbieux 2010 18th Euromicro Conference on Parallel, Distributed and Network-based …, 2010 | 16 | 2010 |
| A symbolic relation for a subset of vhdl'87 descriptions and its application to symbolic model checking E Encrenaz Correct Hardware Design and Verification Methods: IFIP WG 10.5 Advanced …, 1995 | 16 | 1995 |
| Formal verification of a software countermeasure against instruction skip attacks. K Heydemann, N Moro, E Encrenaz, B Robisson IACR Cryptol. ePrint Arch. 2013, 679, 2013 | 13 | 2013 |
| Side-channel robustness analysis of masked assembly codes using a symbolic approach I Ben El Ouahma, QL Meunier, K Heydemann, E Encrenaz Journal of Cryptographic Engineering 9, 231-242, 2019 | 12 | 2019 |
| Design validation of zcsp with spin V Beaudenon, E Encrenaz, JL Desbarbieux Third International Conference on Application of Concurrency to System …, 2003 | 11 | 2003 |
| Formal verification of timed VHDL programs A Bara, P Bazargan-Sabet, R Chevallier, E Encrenaz, D Ledu, P Renault 2010 Forum on Specification & Design Languages (FDL 2010), 1-6, 2010 | 10 | 2010 |
| Verification of the generic architecture of a memory circuit using parametric timed automata R Chevallier, E Encrenaz-Tiphene, L Fribourg, W Xu International Conference on Formal Modeling and Analysis of Timed Systems …, 2006 | 10 | 2006 |
| Timing analysis of an embedded memory: SPSMALL R Chevallier, E Encrenaz-Tiphene, L Fribourg, W Xu Proceedings of the 10th WSEAS international conference on Circuits, 302-307, 2006 | 10 | 2006 |
Karine Heydemannmaître de conférences en informatique, Sorbonne Université / LIP6Verified email at lip6.fr
