Joseph Zuckerman

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Luca CarloniProfessor and Chair of Computer Science, Columbia UniversityVerified email at cs.columbia.edu
Davide GiriColumbia UniversityVerified email at columbia.edu
Paolo MantovaniGoogle Research - Brain TeamVerified email at google.com
Gu-Yeon WeiRobert and Suzanne Case Professor of EE and CS, Harvard UniversityVerified email at eecs.harvard.edu
Tianyu JiaAssistant Professor of School of Integrated Circuits, Peking UniversityVerified email at pku.edu.cn
David BrooksHaley Family Professor of Computer Science, Harvard UniversityVerified email at eecs.harvard.edu
Maico Cassel dos SantosGraduate Research Assistant, Columbia UniversityVerified email at columbia.edu
Kenneth ShepardLau Family Professor of Electrical Engineering and Professor of Biomedical Engineering, ColumbiaVerified email at ee.columbia.edu
Erik LoscalzoColumbia UniversityVerified email at columbia.edu
Gabriele TombesiColumbia UniversityVerified email at cs.columbia.edu
Karthik SwaminathanIBM Watson ResearchVerified email at us.ibm.com
Martin CochetIBM ResearchVerified email at ibm.com
Jeff J. ZHANGArizona State UniversityVerified email at seas.harvard.edu
John-David WellmanIBMVerified email at us.ibm.com
Christian PilatoAssociate Professor, Politecnico di MilanoVerified email at polimi.it
Luca PiccolboniColumbia UniversityVerified email at columbia.edu
Emilio G. CotaGoogleVerified email at cs.columbia.edu
Giuseppe Di GuglielmoSr. ASIC Engineer - Fermilab, PPD, ASIC Dept.Verified email at fnal.gov
Nandhini ChandramoorthyIBM TJ Watson Research CenterVerified email at ibm.com
Jihye KwonPrincipal Software Engineer, Cadence Design SystemsVerified email at cadence.com

Joseph Zuckerman

Columbia University

Verified email at cs.columbia.edu - Homepage

Computer Architecture System-on-Chip Heterogeneous Computing Hardware Accelerators


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Agile SoC development with open ESP P Mantovani, D Giri, G Di Guglielmo, L Piccolboni, J Zuckerman, EG Cota, ... Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020	129	2020
A 12nm agile-designed SoC for swarm-based perception with heterogeneous IP blocks, a reconfigurable memory hierarchy, and an 800MHz multi-plane NoC T Jia, P Mantovani, MC Dos Santos, D Giri, J Zuckerman, EJ Loscalzo, ... ESSCIRC 2022-IEEE 48th European Solid State Circuits Conference (ESSCIRC …, 2022	24	2022
Cohmeleon: Learning-based orchestration of accelerator coherence in heterogeneous SoCs J Zuckerman, D Giri, J Kwon, P Mantovani, LP Carloni MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021	24	2021
22.9 A 12nm 18.1 TFLOPs/W sparse transformer processor with entropy-based early exit, mixed-precision predication and fine-grained power management T Tambe, J Zhang, C Hooper, T Jia, PN Whatmough, J Zuckerman, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 342-344, 2023	14	2023
DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including … F Gao, TJ Chang, A Li, M Orenes-Vera, D Giri, PJ Jackson, A Ning, ... 2023 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2023	12	2023
A scalable methodology for agile chip development with open-source hardware components MC Santos, T Jia, M Cochet, K Swaminathan, J Zuckerman, P Mantovani, ... Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022	8	2022
Enabling heterogeneous, multicore soc research with RISC-V and ESP J Zuckerman, P Mantovani, D Giri, LP Carloni arXiv preprint arXiv:2206.01901, 2022	8	2022
A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management, and Flexible NoC-Based Data Orchestration MC Dos Santos, T Jia, J Zuckerman, M Cochet, D Giri, E Loscalzo, ... IEEE International Solid-State Circuits Conference, 2024	3*	2024
BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs M Cochet, K Swaminathan, E Loscalzo, J Zuckerman, MC Dos Santos, ... 2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture …, 2024	1	2024
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs G Tombesi, J Zuckerman, P Mantovani, D Giri, MC Dos Santos, T Jia, ... IEEE Design & Test, 2023	1	2023
Mozart: Taming Taxes and Composing Accelerators with Shared-Memory V Suresh, B Mishra, Y Jing, Z Zhu, N Jin, C Block, P Mantovani, D Giri, ... Proceedings of the 2024 International Conference on Parallel Architectures …, 2024		2024
Towards Generalized On-Chip Communication for Programmable Accelerators in Heterogeneous Architectures J Zuckerman, JD Wellman, A Vanamali, M Shankar, G Tombesi, ... arXiv preprint arXiv:2407.04182, 2024		2024
A 400-ns-Settling-Time Hybrid Dynamic Voltage Frequency Scaling Architecture and Its Application in a 22-Core Network-on-Chip SoC in 12-nm FinFET Technology E Loscalzo, M Cochet, J Zuckerman, S Zalias, M Lekas, S Cahill, T Jia, ... 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2024		2024

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