Automatic test generation using genetically-engineered distinguishing sequences

MS Hsiao, EM Rudnick, JH Patel - Proceedings of 14th VLSI …, 1996 - ieeexplore.ieee.org
MS Hsiao, EM Rudnick, JH Patel
Proceedings of 14th VLSI Test Symposium, 1996ieeexplore.ieee.org
A fault-oriented sequential circuit test generator is described in which various types of
distinguishing sequences are derived, both statically and dynamically, to aid the test
generation process. A two-phase algorithm is used during test generation. The first phase
activates the target fault, and the second phase propagates the fault effects (FE's) from the
flip-flops with assistance from the distinguishing sequences. This strategy improves the
propagation of FE's to the primary outputs, and the overall fault coverage is greatly …
A fault-oriented sequential circuit test generator is described in which various types of distinguishing sequences are derived, both statically and dynamically, to aid the test generation process. A two-phase algorithm is used during test generation. The first phase activates the target fault, and the second phase propagates the fault effects (FE's) from the flip-flops with assistance from the distinguishing sequences. This strategy improves the propagation of FE's to the primary outputs, and the overall fault coverage is greatly increased. In our new test generator, DIGATE, genetic algorithms are used to derive both activating and distinguishing sequences during test generation. Our results show very high fault coverages for the ISCAS89 sequential benchmark circuits and several synthesized circuits.
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