A ROM‐less reverse RNS converter for moduli set {2q ± 1, 2q ± 3}
G Jaberipur, HR Ahmadifar - IET Computers & Digital …, 2014 - Wiley Online Library
IET Computers & Digital Techniques, 2014•Wiley Online Library
Numerous contributions on reverse conversion methods based on the Chinese Remainder
Theorem (CRT), for residue number systems (RNS), have been regularly appearing in
relevant literature. Reverse conversion is known as a slow RNS operation that becomes
more complicated and slower for larger moduli sets. In this study, the authors examine four
previous reverse converters for moduli set ƒ={2q− 1, 2q+ 3, 2q+ 1, 2q− 3}. Three of these
converters heavily utilise Read Only Memories (ROM), and the other one uses a …
Theorem (CRT), for residue number systems (RNS), have been regularly appearing in
relevant literature. Reverse conversion is known as a slow RNS operation that becomes
more complicated and slower for larger moduli sets. In this study, the authors examine four
previous reverse converters for moduli set ƒ={2q− 1, 2q+ 3, 2q+ 1, 2q− 3}. Three of these
converters heavily utilise Read Only Memories (ROM), and the other one uses a …
Numerous contributions on reverse conversion methods based on the Chinese Remainder Theorem (CRT), for residue number systems (RNS), have been regularly appearing in relevant literature. Reverse conversion is known as a slow RNS operation that becomes more complicated and slower for larger moduli sets. In this study, the authors examine four previous reverse converters for moduli set ƒ = {2q − 1, 2q + 3, 2q + 1, 2q − 3}. Three of these converters heavily utilise Read Only Memories (ROM), and the other one uses a Montgomery multiplier. In order to cut the costs and improve performance, the authors propose an adder‐only two‐stage New CRT conversion scheme that uses conjugate grouping of the moduli as {{2q ± 1, 2q ± 3}}. Also, manipulation of multiplicative inverse coefficients that are expressed as a series of power‐of‐two terms takes place via multi‐operand addition instead of using ROMs and/or multipliers. This leads to roughly 22, 19 and 8% improvement in delay, area consumption and power dissipation, respectively, in comparison to the only previous ROM‐less design for ƒ. Moreover, use of no ROMs allows for pipelining, if desired. They also address four state‐of‐the‐art converters and compare their performance with the authors (i.e. that of ƒ), where none is faster than the proposed converter. They support their claims with analytical gate‐level comparisons and via synthesis results.
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