A clock boosting scheme for low voltage circuits
AE Behradfar, S Zeinolabedinzadeh… - 2008 15th IEEE …, 2008 - ieeexplore.ieee.org
AE Behradfar, S Zeinolabedinzadeh, K HajSadeghi
2008 15th IEEE International Conference on Electronics, Circuits …, 2008•ieeexplore.ieee.orgLimitations in operation of analog switches at very low voltages have caused many
problems in design of these types of switched capacitor circuits and data converters. In this
paper by modifying a recently proposed clock boosting circuit, we could obtain a new
structure with better performance for very low voltage circuits. This method requires simpler
digital circuits in comparison with previously reported structures, as well as less number of
transistors and smaller chip area. This method can be used for sampling the full swing …
problems in design of these types of switched capacitor circuits and data converters. In this
paper by modifying a recently proposed clock boosting circuit, we could obtain a new
structure with better performance for very low voltage circuits. This method requires simpler
digital circuits in comparison with previously reported structures, as well as less number of
transistors and smaller chip area. This method can be used for sampling the full swing …
Limitations in operation of analog switches at very low voltages have caused many problems in design of these types of switched capacitor circuits and data converters. In this paper by modifying a recently proposed clock boosting circuit, we could obtain a new structure with better performance for very low voltage circuits. This method requires simpler digital circuits in comparison with previously reported structures, as well as less number of transistors and smaller chip area. This method can be used for sampling the full swing signals with supply voltages as low as 0.4 volt.
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