Adjacent wires in a VLSI chip become closer as the fabrication technology rapidly evolves. Accordingly it becomes important to consider crosstalk caused by the coupling capacitance between adjacent wires in the layout design for the fast and safe VLSI circuits. The crosstalk is a function of coupling length and distance. The coupling length can be reduced by segment rearrangement technique. This paper presents a crosstalk minimization technique by adjusting the space between adjacent wires. An example is shown in this paper to demonstrate the effectiveness of the technique.