Beyond the limits of typical strategies: Resources efficient FPGA-based TCAM
H Mahmood, Z Ullah, O Mujahid… - IEEE Embedded …, 2018 - ieeexplore.ieee.org
IEEE Embedded Systems Letters, 2018•ieeexplore.ieee.org
This letter proposes a novel approach to design a ternary content-addressable memory
(TCAM) on a field-programmable gate array (FPGA). The proposed architecture uses slice
registers (SRs) for storage instead of lookup tables and static random-access memory, and a
control signal in place of a memory element to accommodate a don't care state. The
proposed architecture is implemented on Xilinx Virtex-6 FPGA. Compared with the latest
prior work, the proposed TCAM reduces the number of SRs by 50.04% while not …
(TCAM) on a field-programmable gate array (FPGA). The proposed architecture uses slice
registers (SRs) for storage instead of lookup tables and static random-access memory, and a
control signal in place of a memory element to accommodate a don't care state. The
proposed architecture is implemented on Xilinx Virtex-6 FPGA. Compared with the latest
prior work, the proposed TCAM reduces the number of SRs by 50.04% while not …
This letter proposes a novel approach to design a ternary content-addressable memory (TCAM) on a field-programmable gate array (FPGA). The proposed architecture uses slice registers (SRs) for storage instead of lookup tables and static random-access memory, and a control signal in place of a memory element to accommodate a don’t care state. The proposed architecture is implemented on Xilinx Virtex-6 FPGA. Compared with the latest prior work, the proposed TCAM reduces the number of SRs by 50.04% while not compromising on throughput.
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