Low-power scan testing and test data compression for system-on-a-chip

A Chandra, K Chakrabarty - IEEE Transactions on Computer …, 2002 - ieeexplore.ieee.org
Test data volume and power consumption for scan vectors are two major problems in system-
on-a-chip testing. Since static compaction of scan vectors invariably leads to higher power
for scan testing, the conflicting goals of low-power scan testing and reduced test data
volume appear to be irreconcilable. We tackle this problem by using test data compression
to reduce both test data volume and scan power. In particular, we show that Golomb coding
of precomputed test sets leads to significant savings in peak and average power, without …

Combining low-power scan testing and test data compression for system-on-a-chip

A Chandra, K Chakrabarty - Proceedings of the 38th annual Design …, 2001 - dl.acm.org
We present a novel technique to reduce both test data voluem and scan power dissipation
using test data compression for system-on-a-chip testing. Power dissipation during test
mode using ATPG-compacted test patterns is much higher than during functional mode. We
show that Golomb coding of precomputed test sets leads to significant savings in peak and
average power, without requiring either a slower scan clock or blocking logic in the scan
cells. We also improve upon prior work on Golomb coding by showing that a separate …
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