Design of a fault tolerant reversible compact unidirectional barrel shifter
2013 26th International Conference on VLSI Design and 2013 12th …, 2013•ieeexplore.ieee.org
This paper demonstrates reversible logic synthesis for (n, k) unidirectional logarithmic barrel
shifters, where n is the number of data bits and k= log 2 n. The circuits are designed using
only reversible fault tolerant Fredkin gates. Thus, the entire scheme inherently becomes fault
tolerant. Several lower bounds on the numbers of garbage outputs and constant inputs have
been proposed. The comparative results show that the proposed method is much better in
terms of numbers of gates, garbage outputs, quantum cost, hardware complexity and has …
shifters, where n is the number of data bits and k= log 2 n. The circuits are designed using
only reversible fault tolerant Fredkin gates. Thus, the entire scheme inherently becomes fault
tolerant. Several lower bounds on the numbers of garbage outputs and constant inputs have
been proposed. The comparative results show that the proposed method is much better in
terms of numbers of gates, garbage outputs, quantum cost, hardware complexity and has …
This paper demonstrates reversible logic synthesis for (n, k) unidirectional logarithmic barrel shifters, where n is the number of data bits and k=log 2 n. The circuits are designed using only reversible fault tolerant Fredkin gates. Thus, the entire scheme inherently becomes fault tolerant. Several lower bounds on the numbers of garbage outputs and constant inputs have been proposed. The comparative results show that the proposed method is much better in terms of numbers of gates, garbage outputs, quantum cost, hardware complexity and has significantly better scalability than the existing approaches.
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