Enabling heterogeneous, multicore soc research with RISC-V and ESP
Heterogeneous, multicore SoC architectures are a critical component of today's computing
landscape. However, supporting both increasing heterogeneity and multicore execution are
significant design challenges. Meanwhile, the growing RISC-V and open-source hardware
(OSH) movements have resulted in an increased number of open-source RISC-V processor
implementations; however, there are fewer open source SoC design platforms that integrate
these processor cores. We present modifications to ESP, an open-source SoC design …
landscape. However, supporting both increasing heterogeneity and multicore execution are
significant design challenges. Meanwhile, the growing RISC-V and open-source hardware
(OSH) movements have resulted in an increased number of open-source RISC-V processor
implementations; however, there are fewer open source SoC design platforms that integrate
these processor cores. We present modifications to ESP, an open-source SoC design …
[CITATION][C] Enabling Heterogeneous, Multicore SoC Research with RISC-V and ESP. arXiv (6 2022)
J Zuckerman, P Mantovani, D Giri, LP Carloni - 2022
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