FPGA-based ultra-low latency background remover
Y Oshima, Y Yamaguchi, R Tsugami… - 2024 IEEE …, 2024 - ieeexplore.ieee.org
Y Oshima, Y Yamaguchi, R Tsugami, T Fujiwara, T Fukui, S Narikawa
2024 IEEE International Conference on Consumer Electronics (ICCE), 2024•ieeexplore.ieee.orgThe advances in information and communication technology have opened the opportunities
for seamless communication over distances. To enhance the user experience, minimizing
communication latency and ensuring personal privacy is imperative. This research
introduces an innovative approach to background removal in video communication using a
Field Programmable Gate Array (FPGA), achieving processing speeds in milliseconds, a feat
unattainable with traditional software methods.
for seamless communication over distances. To enhance the user experience, minimizing
communication latency and ensuring personal privacy is imperative. This research
introduces an innovative approach to background removal in video communication using a
Field Programmable Gate Array (FPGA), achieving processing speeds in milliseconds, a feat
unattainable with traditional software methods.
The advances in information and communication technology have opened the opportunities for seamless communication over distances. To enhance the user experience, minimizing communication latency and ensuring personal privacy is imperative. This research introduces an innovative approach to background removal in video communication using a Field Programmable Gate Array (FPGA), achieving processing speeds in milliseconds, a feat unattainable with traditional software methods.
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