The implementation of high-speed wireless networks, such as currently used fourth generation (4G) systems and future 5G systems, feature challenging processing. Field programmable gate arrays (FPGAs) can straddle research and development for these current and future networks since they provide scaling through reconfigurable logic, high parallelism, and low power consumption. This brief demonstrates an FPGA circuit implementation, with measurements, of a minimal system (a 5G element or “unit cell”): a single-user mobile with antenna diversity and a distributed antenna system (DAS) at the base station. The demonstration system has a bandwidth of 20 MHz, runs at 2.4 GHz, and has two antennas at both the transmitting base station and at the receiving mobile. The modulation is orthogonal frequency division multiplexing (OFDM) with space-time block coding (STBC). The FPGA is a Virtex-6, used for software defined radio (SDR), and this can readily be scaled to handle larger-dimensioned, higher-capacity systems. The receiver has time-offset synchronization, frequency-offset, and channel estimation. The high-level algorithm design (Xilinx System Generator) for these functions and the OFDM-STBC, and the resources consumed on the FPGA during real-time implementation, are included. We also compare the use of coax and fiber for linking the distributed antennas, using off-the-shelf components. The approach used here of combining simulations with physical measurement of a minimal system is a practical way forward for assessing candidate systems for 5G.