Carbon Nanotube Field-Effect Transistors (CNFETs) are highly promising to improve the
energy efficiency of digital logic circuits. Here, we quantify the Very-Large-Scale Integrated (…

With the consideration of III-V channels for future CMOS, an urgent need for standard metrics
to assess the maturity of III-V MOSFETs and to investigate their suitability for future CMOS …

We investigate scalability, performance and variability of high aspect ratio trigate FinFETs
fabricated with 193 nm immersion lithography and conventional dry etch. FinFETs with fin …

The Distributed ASCI Supercomputer (DAS) is a homogeneous wide-area distributed system
consisting of four cluster computers at different locations. DAS has been used for research …

We report scaled Ge p-channel FinFETs fabricated on a 300-mm Si wafer using the aspect-ratio-trapping
technique. For long-channel devices, a combination of a trap-assisted …

Low-dimensional semiconductors such as one-dimensional carbon nanotubes could be
used to shrink the gate length of metal–oxide–semiconductor field-effect transistors (MOSFETs) …

We demonstrate that for aggressively scaled FinFETs, with 2nm HfO 2 and TiN metal gate (ie,
workfunction close to midgap), several parasitic leakage mechanisms that impact the off-…

Using a tight-binding mode-space NEGF technique, we explore the essential physics,
design and performance potential of the III-V core-shell (CS) nanowire (NW) heterojunction …

The bulk CMOS technology is expected to scale down to about 32 nm node and likely the
successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor …

This study combines direct measurements of strain, electrical mobility measurements, and a
rigorous modeling approach to provide insights about strain-induced mobility enhancement …