Goldmine: Automatic assertion generation using data mining and static analysis
S Vasudevan, D Sheridan, S Patel… - … , Automation & Test …, 2010 - ieeexplore.ieee.org
S Vasudevan, D Sheridan, S Patel, D Tcheng, B Tuohy, D Johnson
2010 Design, Automation & Test in Europe Conference & Exhibition …, 2010•ieeexplore.ieee.orgWe present GOLDMINE, a methodology for generating assertions automatically. Our method
involves a combination of data mining and static analysis of the Register Transfer Level
(RTL) design. We present results of using GoldMine for assertion generation of the RTL of a
1000-core processor design that is still in an evolving stage. Our results show that GoldMine
can generate complex, high coverage assertions in RTL, thereby minimizing human effort in
this process.
involves a combination of data mining and static analysis of the Register Transfer Level
(RTL) design. We present results of using GoldMine for assertion generation of the RTL of a
1000-core processor design that is still in an evolving stage. Our results show that GoldMine
can generate complex, high coverage assertions in RTL, thereby minimizing human effort in
this process.
We present GOLDMINE, a methodology for generating assertions automatically. Our method involves a combination of data mining and static analysis of the Register Transfer Level (RTL) design. We present results of using GoldMine for assertion generation of the RTL of a 1000-core processor design that is still in an evolving stage. Our results show that GoldMine can generate complex, high coverage assertions in RTL, thereby minimizing human effort in this process.
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